CN216721285U - Negative voltage protection circuit of amplifier - Google Patents
Negative voltage protection circuit of amplifier Download PDFInfo
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- CN216721285U CN216721285U CN202122026626.8U CN202122026626U CN216721285U CN 216721285 U CN216721285 U CN 216721285U CN 202122026626 U CN202122026626 U CN 202122026626U CN 216721285 U CN216721285 U CN 216721285U
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- voltage
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- protection circuit
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Abstract
The utility model discloses an amplifier negative voltage protection circuit, which mainly solves the problems of complex structure and high circuit cost of the existing amplifier negative voltage protection circuit. The utility model comprises a PMOS tube, a current-limiting resistor, a triode, two VBE voltage setting resistors, a linear voltage stabilizer and two linear voltage stabilizer output voltage setting resistors. The utility model can effectively realize the negative voltage protection of the amplifier, has simple realization mode, adopts a domestic chip as a circuit and has low overall cost.
Description
Technical Field
The utility model belongs to the technical field of electronic power, and particularly relates to a negative voltage protection circuit of an amplifier.
Background
With the development of mobile communication technology, the application of microwave radio frequency technology is also more and more extensive. Modules required in hardware engineering often need power amplification, and when the power amplifier requires power-on, grid voltage is firstly added, and then leakage voltage is added; when the power is removed, the leakage voltage is reduced firstly, and then the grid voltage is reduced, otherwise, the device is easy to damage, and the working stability of the solid-state power amplifier is ensured. The negative voltage protection circuit has the characteristic of always ensuring that the drain voltage can be started after the grid voltage is added to the amplifier, and the situation that the current of the amplifier is too large and is burnt out when the amplifier only has the drain voltage but does not have the grid voltage is prevented. However, the conventional negative voltage protection circuit also has the problems of complex circuit structure and high overall circuit cost.
SUMMERY OF THE UTILITY MODEL
The utility model aims to provide a negative voltage protection circuit of an amplifier, which mainly solves the problems of complex structure and high circuit cost of the traditional negative voltage protection circuit of the amplifier.
In order to achieve the purpose, the technical scheme adopted by the utility model is as follows:
an amplifier negative voltage protection circuit comprises
A PMOS tube, the source end is connected with a power VCC, and the drain end outputs a voltage VD;
the current limiting resistor is connected between the grid electrode and the source electrode of the PMOS tube;
a triode, the collector of which is connected with the grid of the PMOS tube and the base of which is grounded;
two VBE voltage setting resistors, one end of each VBE voltage setting resistor is connected with the emitting electrode of the triode after being connected in common and used for setting the VBE voltage of the triode, and the other end of one VBE voltage setting resistor is grounded;
a linear voltage stabilizer, the input end pin of which is connected with the other end of the other VBE voltage setting resistor;
the output voltage setting resistors of the two linear voltage regulators are connected between an OUT pin and an NC pin of the linear voltage regulator; and one end of the other linear voltage stabilizer output voltage setting resistor is connected with the NC pin of the linear voltage stabilizer, and the other end of the other linear voltage stabilizer output voltage setting resistor is grounded.
Further, in the present invention, the negative voltage circuit further includes a plurality of power supply filter capacitors.
Further, in the present invention, the negative voltage circuit further includes a voltage dividing resistor connected between the VIN pin and the EN pin of the linear regulator.
Further, in the utility model, the model of the PMOS tube is WPM 1483.
Further, in the present invention, the type of the triode is FHT 5551.
Further, in the present invention, the linear regulator is model SGM 2209.
Compared with the prior art, the utility model has the following beneficial effects:
the utility model utilizes the resistor to adjust the voltage of the VBE of the triode, so that the VBE of the U2 can enable the U2 to reach a saturated starting state, and the VG voltage of the amplifier reaches the optimal range interval required by the amplifier. When the circuit detects-VCC, the B, E port of U2 generates voltage difference, the triode is saturated, so that CE of U2 is conducted, the G port and S port of U1 generate voltage difference, both ends of S, D are conducted, the voltage is conducted, and the switch is in an on state. When the circuit does not detect-VCC, VBE of U2 is approximately equal to 0V, IB is approximately equal to 0A, both ends of C, E are cut off, R1 plays a role of a pull-up resistor, and the voltages of a G port and an S port of U1 are almost equal, so that the differential pressure of VGS of U2 is approximately equal to 0V, both ends of S, D are cut off, the voltage cannot be conducted, VD is equal to 0V, the amplifier cannot be in a working state and is in a cut-off state, negative voltage protection of the amplifier is realized through the mode, the realization mode is simple, a domestic chip is adopted by the circuit, and the overall cost of the circuit is low.
Drawings
FIG. 1 is a schematic structural diagram of the present invention.
Detailed Description
The present invention will be further described with reference to the following description and examples, including but not limited to the following examples.
Examples
As shown in fig. 1, the amplifier negative voltage protection circuit disclosed by the present invention includes a PMOS transistor U1 with model WPM1483, a source of the PMOS transistor U1 is connected to a dc input voltage VCC, and an input interval of the VCC is + 3.3V- + 8V; and the source electrode of the PMOS tube U1 is also connected with power supply filter capacitors C1-C3 in parallel, a current-limiting resistor R1 is connected between the source electrode and the grid electrode of the PMOS tube U1, and the resistance value of R1 is set according to the actual voltage. The drain electrode of the PMOS tube U1 outputs VD voltage of the amplifier, and the drain electrode of the PMOS tube U1 is also connected with power supply filter capacitors C4 and C5 in parallel. The gate of the PMOS tube U1 is connected with the collector of an NPN type triode U2, the model of the triode U2 is FHT5551, the base of the triode U2 is grounded, the drain of the triode U2 is connected with VBE voltage setting resistors R2 and R3, the other end of the resistor R3 is grounded, the other end of the resistor R2 is connected with a linear voltage regulator U3 with the model of SGM2209, and an LDO output voltage setting resistor R5 is connected between the OUT pin and the NC pin of the linear voltage regulator; and one end of the other linear voltage regulator output voltage setting resistor R6 is connected with the NC pin of the linear voltage regulator, and the other end of the other linear voltage regulator output voltage setting resistor R6 is grounded. A power supply filter capacitor C6 and C7 are connected between the resistor R2 and the linear voltage regulator in parallel; the OUT pin of the linear voltage regulator U3 is also connected with power supply filter capacitors C8 and C9 in parallel.
In the circuit, the input voltage of the input pin end of the linear voltage stabilizer is-VCC, and the voltage range is negative voltage of-2.7V to-24V. When the circuit works, firstly, according to-VCC and the voltage required by the amplifier, R2, R3, R5 and R6 are adjusted, so that the VBE of U2 can enable U2 to reach a saturation starting state, and the VG voltage of the amplifier reaches the optimal range interval required by the amplifier.
When the circuit detects-VCC, the B, E port of U2 generates voltage difference, the triode is saturated, so that CE of U2 is conducted, the G port and S port of U1 generate voltage difference, both ends of S, D are conducted, the voltage is conducted, and the switch is in an on state.
When the circuit does not detect-VCC, VBE of U2 is approximately equal to 0V, IB is approximately equal to 0A, both ends of C, E are cut off, R1 functions as a pull-up resistor, and voltages of G port and S port of U1 are almost equal, so that a voltage difference of VGS of U2 is approximately equal to 0V, both ends of S, D are cut off, the voltage cannot be conducted, VD is equal to 0V, and the amplifier is not in a working state and is in an off state.
U1 adopts a device WPM1483 of a Weir semiconductor of a domestic manufacturer, U2 adopts a device FHT5551 of a Fenghua high-tech of the domestic manufacturer, and an SGM2209 of a Saint Pont microelectronic of an LDO domestic manufacturer, and resistors and capacitors are all devices of the Fenghua Pont of the domestic manufacturer. The whole circuit structure is simplified, corresponding functions can be realized by adopting domestic electronic devices, and the design and manufacturing cost of the circuit is greatly reduced. Thus, the present invention provides substantial features and improvements over the prior art.
The above-mentioned embodiment is only one of the preferred embodiments of the present invention, and should not be used to limit the scope of the present invention, but all the insubstantial modifications or changes made within the spirit and scope of the main design of the present invention, which still solve the technical problems consistent with the present invention, should be included in the scope of the present invention.
Claims (6)
1. An amplifier negative voltage protection circuit is characterized by comprising
A PMOS tube, the source end is connected with a power VCC, and the drain end outputs a voltage VD;
the current limiting resistor is connected between the grid electrode and the source electrode of the PMOS tube;
a triode, the collector of which is connected with the grid of the PMOS tube and the base of which is grounded;
two VBE voltage setting resistors, one end of each VBE voltage setting resistor is connected with the emitting electrode of the triode after being connected in common and used for setting the VBE voltage of the triode, and the other end of one VBE voltage setting resistor is grounded;
a linear voltage stabilizer, the input end pin of which is connected with the other end of the other VBE voltage setting resistor;
the output voltage setting resistors of the two linear voltage regulators are connected between an OUT pin and an NC pin of the linear voltage regulator; and one end of the other linear voltage stabilizer output voltage setting resistor is connected with the NC pin of the linear voltage stabilizer, and the other end of the other linear voltage stabilizer output voltage setting resistor is grounded.
2. The amplifier negative voltage protection circuit of claim 1, further comprising a plurality of power supply filter capacitors.
3. The negative amplifier protection circuit of claim 2, further comprising a voltage divider resistor coupled between the VIN and EN pins of the linear regulator.
4. The amplifier negative voltage protection circuit as claimed in claim 1, wherein the PMOS transistor is model WPM 1483.
5. The negative voltage protection circuit of claim 1, wherein the transistor is FHT 5551.
6. The amplifier negative voltage protection circuit of claim 1, wherein the linear regulator is model SGM 2209.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202122026626.8U CN216721285U (en) | 2021-08-26 | 2021-08-26 | Negative voltage protection circuit of amplifier |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202122026626.8U CN216721285U (en) | 2021-08-26 | 2021-08-26 | Negative voltage protection circuit of amplifier |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN216721285U true CN216721285U (en) | 2022-06-10 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202122026626.8U Active CN216721285U (en) | 2021-08-26 | 2021-08-26 | Negative voltage protection circuit of amplifier |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN216721285U (en) |
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2021
- 2021-08-26 CN CN202122026626.8U patent/CN216721285U/en active Active
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