CN216672847U - PWM signal enhancement circuit - Google Patents
PWM signal enhancement circuit Download PDFInfo
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- CN216672847U CN216672847U CN202123291787.6U CN202123291787U CN216672847U CN 216672847 U CN216672847 U CN 216672847U CN 202123291787 U CN202123291787 U CN 202123291787U CN 216672847 U CN216672847 U CN 216672847U
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Abstract
The utility model relates to the technical field of circuits, in particular to a PWM (pulse width modulation) signal enhancement circuit, which comprises a signal generator IC (integrated circuit), a first control IC (integrated circuit) and a second control IC, wherein 4 paths of output signals of the signal generator IC are a first path of output signal PWM1, a second path of output signal PWM2, a third path of output signal PWM3 and a fourth path of output signal PWM4 in sequence, the 4 paths of output signals are amplified by a first PWM signal enhancement driving circuit, a second WM signal enhancement driving circuit, a third WM signal enhancement driving circuit and a fourth WM signal enhancement driving circuit respectively, and the amplified signals are driven and connected to the first control chip IC and the second control chip IC, and the PWM signal enhancement circuit has the following beneficial effects that: according to the utility model, the plurality of PWM signal enhancement driving circuits are added, so that the PWM signal current output by the signal generator IC can be amplified and then can drive other control chips or circuits, the signal amplification and circuit coupling isolation effects are realized, and the circuit is protected while the signal is amplified, so that the circuit is safer.
Description
Technical Field
The utility model relates to the technical field of circuits, in particular to a PWM signal enhancement circuit.
Background
The signal generator IC in the control mainboard circuit of the inverter is directly connected with a plurality of control ICs, and because the multi-path PWM output signals of the signal generator IC often generate signal attenuation and the PWM signals which cannot be led to the signal generator IC cannot drive the control ICs, the improvement is needed, so that the multi-path PWM output signals can directly drive the control IC chips.
SUMMERY OF THE UTILITY MODEL
The present invention mainly solves the technical problems of the prior art, and provides a PWM signal enhancement circuit, which solves the problem that a signal generator IC cannot drive a control IC.
In order to achieve the purpose, the utility model provides the following technical scheme: the utility model provides a PWM signal reinforcing circuit, includes signal generator IC, first control IC and second control IC, 4 way output signal of signal generator IC are output signal PWM1, second way output signal PWM2, third way output signal PWM3 and fourth way output signal PWM4 in proper order, 4 way output signal is enlargied through first PWM signal reinforcing drive circuit, second WM signal reinforcing drive circuit, third WM signal reinforcing drive circuit and fourth WM signal reinforcing drive circuit respectively, and the signal drive after the amplification is connected to first control chip IC and second control chip IC.
As a specific scheme of the PWM signal enhancement circuit, the first PWM signal enhancement driving circuit includes a resistor R1, a resistor R2, and a transistor Q1, one end of the resistor R1 is connected to a first output signal PWM1 of the signal generator IC, the other end of the resistor R1 is connected to a B pole of the transistor Q1, a C pole of the transistor Q1 is connected to the 5V dc voltage, an E pole of the transistor Q1 is connected to a high-level signal input pin of the first control chip IC, one end of the resistor R2 is connected to the B pole of the transistor Q1, and the other end of the resistor R2 is grounded.
As a specific scheme of the PWM signal enhancement circuit, the second PWM signal enhancement driving circuit includes a resistor R3, a resistor R4 and a transistor Q2, one end of the resistor R3 is connected to a pin of the second output signal PWM2 of the signal generator IC, the other end of the resistor R3 is connected to a B pole of the transistor Q2, a C pole of the transistor Q2 is connected to the 5V dc voltage, an E pole of the transistor Q2 is connected to the low-level signal input pin of the first control chip IC, one end of the resistor R4 is connected to the B pole of the transistor Q2, and the other end of the resistor R4 is grounded.
As a specific scheme of the PWM signal enhancement circuit, the third PWM signal enhancement driving circuit includes a resistor R5, a resistor R6, and a transistor Q3, one end of the resistor R5 is connected to a pin of the third output signal PWM3 of the signal generator IC, the other end of the resistor R5 is connected to a B pole of the transistor Q3, a C pole of the transistor Q3 is connected to the 5V dc voltage, an E pole of the transistor Q3 is connected to the high-level signal input pin of the second control chip IC, one end of the resistor R6 is connected to the B pole of the transistor Q2, and the other end of the resistor R5 is grounded.
As a specific solution of the PWM signal enhancement circuit, the fourth PWM signal enhancement driving circuit includes a resistor R7, a resistor R8 and a transistor Q4, one end of the resistor R7 is connected to the fourth output signal PWM4 of the signal generator IC, the other end of the resistor R7 is connected to the B pole of the transistor Q4, the C pole of the transistor Q4 is connected to the 5V dc voltage, the E pole of the transistor Q4 is connected to the low-level signal input pin of the second control chip IC, one end of the resistor R8 is connected to the B pole of the transistor Q4, and the other end of the resistor R5 is grounded
Compared with the prior art, the utility model has the following beneficial effects: according to the utility model, the plurality of PWM signal enhancement driving circuits are added, so that the PWM signal current output by the signal generator IC can be amplified and then can drive other control chips or circuits, the signal amplification and circuit coupling isolation effects are realized, and the circuit is protected while the signal is amplified, so that the circuit is safer.
Drawings
FIG. 1 is a circuit diagram of the present invention;
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1, an embodiment of a PWM signal enhancement circuit includes a signal generator IC, a first control IC, and a second control IC, where 4 output signals of the signal generator IC sequentially include a first output signal PWM1, a second output signal PWM2, a third output signal PWM3, and a fourth output signal PWM4, the 4 output signals are amplified by a first PWM signal enhancement driving circuit, a second WM signal enhancement driving circuit, a third WM signal enhancement driving circuit, and a fourth WM signal enhancement driving circuit, and the amplified signals are driven and connected to the first control chip IC and the second control chip IC.
More specifically, the first PWM signal enhancement driving circuit includes a resistor R1, a resistor R2, and a transistor Q1, one end of the resistor R1 is connected to the pin of the first output signal PWM1 of the signal generator IC, the other end of the resistor R1 is connected to the B pole of the transistor Q1, the C pole of the transistor Q1 is connected to the 5V dc voltage, the E pole of the transistor Q1 is connected to the high-level signal input pin of the first control chip IC, one end of the resistor R2 is connected to the B pole of the transistor Q1, and the other end of the resistor R2 is grounded.
More specifically, the second PWM signal enhancement driving circuit includes a resistor R3, a resistor R4, and a transistor Q2, wherein one end of the resistor R3 is connected to a pin of the second output signal PWM2 of the signal generator IC, the other end of the resistor R3 is connected to a B pole of the transistor Q2, a C pole of the transistor Q2 is connected to the 5V dc voltage, an E pole of the transistor Q2 is connected to the low-level signal input pin of the first control chip IC, one end of the resistor R4 is connected to the B pole of the transistor Q2, and the other end of the resistor R4 is grounded.
More specifically, the third PWM signal enhancement driving circuit includes a resistor R5, a resistor R6, and a transistor Q3, wherein one end of the resistor R5 is connected to a pin of a third output signal PWM3 of the signal generator IC, the other end of the resistor R5 is connected to a B pole of the transistor Q3, a C pole of the transistor Q3 is connected to the 5V dc voltage, an E pole of the transistor Q3 is connected to a high-level signal input pin of the second control chip IC, one end of the resistor R6 is connected to the B pole of the transistor Q2, and the other end of the resistor R5 is grounded.
More specifically, the fourth PWM signal enhancement driving circuit includes a resistor R7, a resistor R8, and a transistor Q4, wherein one end of the resistor R7 is connected to a pin of the fourth output signal PWM4 of the signal generator IC, the other end of the resistor R7 is connected to a B pole of the transistor Q4, a C pole of the transistor Q4 is connected to the 5V dc voltage, an E pole of the transistor Q4 is connected to the low-level signal input pin of the second control chip IC, one end of the resistor R8 is connected to the B pole of the transistor Q4, and the other end of the resistor R5 is grounded.
The working principle is as follows: the circuit is generally used in an inverter circuit, the signal generator IC mainly has the main function of outputting multi-path PWM signals to drive the control IC, when the PWM signals are weaker and cannot drive other chips or circuits, the PWM signal drive enhancing circuit is added, so that the other chips or circuits can be driven after the current of the PWM signals is amplified, and the effects of signal amplification and circuit coupling isolation are realized.
Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the utility model, the scope of which is defined in the appended claims and their equivalents.
Claims (5)
1. A PWM signal enhancement circuit, comprising: including signal generator IC, first control IC and second control IC, signal generator IC's 4 output signal are first output signal PWM1, second output signal PWM2, third output signal PWM3 and fourth output signal PWM4 in proper order, 4 output signal are enlargied through first PWM signal enhancement drive circuit, second WM signal enhancement drive circuit, third WM signal enhancement drive circuit and fourth WM signal enhancement drive circuit respectively, and the signal drive after the amplification is connected to first control chip IC and second control chip IC.
2. A PWM signal enhancement circuit according to claim 1, wherein: the first PWM signal enhancement driving circuit comprises a resistor R1, a resistor R2 and a triode Q1, one end of the resistor R1 is connected with a pin of a first path output signal PWM1 of the signal generator IC, the other end of the resistor R1 is connected with a pole B of the triode Q1, a pole C of the triode Q1 is connected with 5V direct-current voltage, a pole E of the triode Q1 is connected with a high-level signal input pin of the first control chip IC, one end of the resistor R2 is connected with a pole B of the triode Q1, and the other end of the resistor R2 is grounded.
3. A PWM signal enhancement circuit according to claim 2, wherein: the second PWM signal enhancement driving circuit comprises a resistor R3, a resistor R4 and a triode Q2, wherein one end of the resistor R3 is connected with a pin of a second output signal PWM2 of the signal generator IC, the other end of the resistor R3 is connected with a pole B of the triode Q2, a pole C of the triode Q2 is connected with 5V direct-current voltage, a pole E of the triode Q2 is connected with a low-level signal input pin of the first control chip IC, one end of the resistor R4 is connected with a pole B of the triode Q2, and the other end of the resistor R4 is grounded.
4. A PWM signal enhancement circuit according to claim 3, wherein: the third PWM signal enhancement driving circuit comprises a resistor R5, a resistor R6 and a triode Q3, wherein one end of the resistor R5 is connected with a pin of a third output signal PWM3 of the signal generator IC, the other end of the resistor R5 is connected with a B pole of the triode Q3, a C pole of the triode Q3 is connected with 5V direct-current voltage, an E pole of the triode Q3 is connected with a high-level signal input pin of the second control chip IC, one end of the resistor R6 is connected with the B pole of the triode Q2, and the other end of the resistor R5 is grounded.
5. The PWM signal enhancement circuit of claim 4, wherein: the fourth PWM signal enhancement driving circuit includes a resistor R7, a resistor R8, and a transistor Q4, wherein one end of the resistor R7 is connected to a pin of the fourth output signal PWM4 of the signal generator IC, the other end of the resistor R7 is connected to a B pole of the transistor Q4, a C pole of the transistor Q4 is connected to the 5V dc voltage, an E pole of the transistor Q4 is connected to a low-level signal input pin of the second control chip IC, one end of the resistor R8 is connected to the B pole of the transistor Q4, and the other end of the resistor R5 is grounded.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202123291787.6U CN216672847U (en) | 2021-12-25 | 2021-12-25 | PWM signal enhancement circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202123291787.6U CN216672847U (en) | 2021-12-25 | 2021-12-25 | PWM signal enhancement circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN216672847U true CN216672847U (en) | 2022-06-03 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202123291787.6U Active CN216672847U (en) | 2021-12-25 | 2021-12-25 | PWM signal enhancement circuit |
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|---|---|
| CN (1) | CN216672847U (en) |
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2021
- 2021-12-25 CN CN202123291787.6U patent/CN216672847U/en active Active
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