CN216624313U - Epitaxial structure with waveguide strain and LED chip - Google Patents
Epitaxial structure with waveguide strain and LED chip Download PDFInfo
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- CN216624313U CN216624313U CN202123222776.2U CN202123222776U CN216624313U CN 216624313 U CN216624313 U CN 216624313U CN 202123222776 U CN202123222776 U CN 202123222776U CN 216624313 U CN216624313 U CN 216624313U
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Abstract
The utility model provides an epitaxial structure with waveguide strain and an LED chip, wherein a first type semiconductor layer, a first waveguide layer, an active region, a second waveguide layer and a second type semiconductor layer are sequentially stacked on the surface of a growth substrate; the active region comprises quantum barriers and quantum wells which are alternately formed, and the lattice constants of the quantum barriers and the quantum wells are smaller than the inherent lattice constant of the substrate, so that the quantum barriers and the quantum wells have compressive strain; the stress of the first waveguide layer or the second waveguide layer is greater than the stress of the substrate, and the stress of the first waveguide layer or the second waveguide layer is not greater than the stress of the quantum barrier; the transition and the release of stress are facilitated, and the internal quantum efficiency of the active region is improved.
Description
Technical Field
The utility model relates to the field of light emitting diodes, in particular to an epitaxial structure with waveguide strain and an LED chip.
Background
Light Emitting Diodes (LEDs) have the advantages of high luminous intensity, high efficiency, small size, long service life, etc., and are considered to be one of the most potential light sources at present. In recent years, LEDs have been widely used in daily life, for example, in the fields of illumination, signal display, backlight, vehicle lights, and large screen display, and these applications also put higher demands on the brightness and light emitting efficiency of LEDs.
Existing light emitting diodes include a horizontal type and a vertical type. The vertical type light emitting diode is obtained by a process of transferring the semiconductor barrier stack to another substrate such as a silicon, silicon carbide or metal substrate and removing the original epitaxially grown substrate, and can effectively improve the technical problems of light absorption, current crowding or poor heat dissipation caused by the epitaxially grown substrate compared with the horizontal type. The substrate is generally transferred by a bonding process, and the bonding is mainly performed by metal-metal high-temperature high-pressure bonding, that is, a metal bonding layer is formed between one side of the semiconductor barrier lamination and the substrate. The other side of the semiconductor barrier crystal lamination layer provides a light-emitting side, a wire electrode is arranged on the light-emitting side to provide current injection or outflow, and a substrate below the semiconductor barrier crystal lamination layer provides current outflow or inflow, so that a light-emitting diode with current passing through the semiconductor barrier crystal lamination layer vertically is formed.
In order to improve the light extraction efficiency, a reflecting layer is generally adopted, and because the layers of the epitaxial structure have larger refractive index difference, a lateral radiation light field is mainly distributed in an active layer region; however, since the light reflected from the bottom layer by the reflective layer needs to pass through a plurality of interfaces, and is reflected again at the interfaces, so as to increase the incident angle, many incident light rays pass through the transverse waveguide formed by the dielectric interface layer along with the increase of the incident angle, and are guided to emit light laterally or absorbed by the crystal, so that the light-emitting efficiency is weakened.
In view of the above, the present inventors have specially designed an epitaxial structure with waveguide strain and an LED chip, and have resulted from the present disclosure.
SUMMERY OF THE UTILITY MODEL
The utility model aims to provide an epitaxial structure with waveguide strain, an LED chip and a method for manufacturing the epitaxial structure, and aims to solve the technical problem that the light emitting efficiency of the existing LED chip with a vertical structure is low.
In order to achieve the purpose, the technical scheme adopted by the utility model is as follows:
an epitaxial structure with waveguide strain, comprising:
growing a substrate;
the first type semiconductor layer, the first waveguide layer, the active region, the second waveguide layer and the second type semiconductor layer are sequentially stacked on the surface of the growth substrate; the active region comprises quantum barriers and quantum wells which are alternately formed, and the lattice constants of the quantum barriers and the quantum wells are smaller than the inherent lattice constant of the substrate, so that the quantum barriers and the quantum wells have compressive strain; the stress of the first waveguide layer or the second waveguide layer is greater than the stress of the substrate, and the stress of the first waveguide layer or the second waveguide layer is not greater than the stress of the quantum barrier.
Preferably, in the active region, a quantum barrier is used as a contact surface of the active region with the first waveguide layer and the second waveguide layer respectively.
Preferably, the aluminum composition of the quantum barrier is not less than the aluminum composition of the first or second waveguide layers, such that the active region forms a high barrier through the quantum barrier to form an electron block; at the same time, the first waveguide layer and the second waveguide layer with lower aluminum composition are utilized to reduce the energy band bending of the active region and increase the wave function overlapping of electrons and holes in the active region.
Preferably, the quantum barrier, the quantum well, the first waveguide layer and the second waveguide layer each comprise an undoped semiconductor layer.
Preferably, a thickness of the first waveguide layer or the second waveguide layer is greater than a thickness of the quantum barrier.
The present invention also provides an LED chip, comprising:
a substrate;
the bonding layer, the metal reflector, the dielectric layer and the epitaxial lamination layer are sequentially stacked on the surface of the substrate; the dielectric layer is provided with a dielectric hole, and the metal reflector is embedded into the dielectric hole to be connected with the epitaxial lamination layer; wherein the epitaxial stack is obtained by peeling off the growth substrate from the epitaxial structure, and the metal reflector is embedded in the dielectric hole to form connection with the second-type semiconductor layer;
a first electrode laminated on a surface of the first type semiconductor layer on a side away from the active region;
and a second electrode laminated on the back surface of the substrate.
Preferably, the substrate comprises a silicon substrate.
Preferably, the medium layer is provided with a plurality of medium holes distributed in an array, and the medium holes are columnar or conical.
According to the technical scheme, the epitaxial structure with the waveguide strain and the LED chip provided by the utility model are characterized in that a first type semiconductor layer, a first waveguide layer, an active region, a second waveguide layer and a second type semiconductor layer are sequentially stacked on the surface of the growth substrate; the active region comprises quantum barriers and quantum wells which are alternately formed, and the lattice constants of the quantum barriers and the quantum wells are smaller than the inherent lattice constant of the substrate, so that the quantum barriers and the quantum wells have compressive strain; the stress of the first waveguide layer or the second waveguide layer is greater than the stress of the substrate, and the stress of the first waveguide layer or the second waveguide layer is not greater than the stress of the quantum barrier; the transition and the release of stress are facilitated, and the internal quantum efficiency of the active region is improved.
Secondly, the aluminum component of the quantum barrier is not less than that of the first waveguide layer or the second waveguide layer, so that the active region forms a high potential barrier through the quantum barrier to form an electron barrier; meanwhile, the first waveguide layer and the second waveguide layer with lower aluminum components are utilized to reduce the energy band bending of the active region and increase the wave function overlapping of electrons and holes in the active region, so that the radiation recombination rate of the active region is improved, and the quantum efficiency of the LED chip is improved.
Then, a thickness of the first waveguide layer or the second waveguide layer is greater than a thickness of the quantum barrier; facilitating the transmission of light at the interface of the epitaxial structure.
Furthermore, the quantum barrier, the quantum well, the first waveguide layer and the second waveguide layer all comprise undoped semiconductor layers, so that attenuation of an active region is reduced, and reliability of the LED chip is improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
Fig. 1 is a schematic structural diagram of an epitaxial structure with waveguide strain according to embodiment 1 of the present invention;
fig. 2.1 to 2.2 are schematic structural diagrams corresponding to steps of a method for manufacturing an epitaxial structure with waveguide strain according to embodiment 1 of the present invention;
fig. 3 is a schematic structural diagram of an LED chip applied to an epitaxial structure with waveguide strain provided in embodiment 1 according to embodiment 2 of the present invention;
fig. 4.1 to 4.9 are schematic structural diagrams corresponding to steps of a method for manufacturing an LED chip applied to an epitaxial structure with waveguide strain according to embodiment 1, provided in embodiment 2 of the present invention;
the symbols in the drawings illustrate that: 1. the semiconductor device comprises a growth substrate, 2, a first type semiconductor layer, 3, a first waveguide layer, 4, an active region, 41, a quantum barrier, 42, a quantum well, 5, a second waveguide layer, 6, a second type semiconductor layer, 7, a dielectric layer, 71, a dielectric hole, 8, a metal reflector, 9, a bonding layer, 10, a substrate, 11, a first electrode, 12 and a second electrode.
Detailed Description
In order to make the content of the present invention clearer, the content of the present invention is further explained below with reference to the attached drawings. The utility model is not limited to this specific embodiment. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Example 1
As shown in fig. 1, an epitaxial structure with waveguide strain comprises:
a growth substrate 1;
a first type semiconductor layer 2, a first waveguide layer 3, an active region 4, a second waveguide layer 5 and a second type semiconductor layer 6 which are sequentially stacked on the surface of a growth substrate 1; the active region 4 includes quantum barriers 41 and quantum wells 42 alternately formed, and lattice constants of the quantum barriers 41 and the quantum wells 42 are smaller than an intrinsic lattice constant of the substrate, so that the quantum barriers 41 and the quantum wells 42 have compressive strain; the stress of the first waveguide layer 3 or the second waveguide layer 5 is greater than the stress of the substrate, and the stress of the first waveguide layer 3 or the second waveguide layer 5 is not greater than the stress of the quantum barrier 41.
In this embodiment, the quantum barrier 41, the quantum well 42, the first waveguide layer 3, and the second waveguide layer 5 each include an undoped semiconductor layer.
The epitaxial structure is a semiconductor barrier crystal lamination obtained by MOCVD or other growth methods, the semiconductor barrier crystal lamination is a semiconductor material capable of providing conventional radiation such as ultraviolet, blue, green, yellow, red, infrared light and the like, specifically, a material of 200-950 nm such as common nitride, specifically, a gallium nitride-based semiconductor barrier crystal lamination, the gallium nitride-based barrier crystal lamination is commonly doped with elements such as aluminum and indium, and mainly provides radiation of 200-550 nm wave bands; or common AlGaInP-based or AlGaAs-based semiconductor barrier crystal lamination, which mainly provides radiation in the wavelength band of 550-950 nm. The semiconductor barrier stack mainly comprises a second type semiconductor layer 6, an active region 4 and a first type semiconductor layer 2. The first type semiconductor layer 2 and the second type semiconductor layer 6 may be doped by n-type doping or P-type doping, respectively, to realize a material layer providing at least electrons or holes, respectively. The n-type semiconductor layer may be doped with an n-type dopant such as Si, Ge, or Sn, and the P-type doped semiconductor layer may be doped with a P-type dopant such as Mg, Zn, Ca, Sr, or Ba. The second-type semiconductor layer 6, the active region 4 and the first-type semiconductor layer 2 may be made of AlGaInN, GaN, AlGaN, AlGaInP, GaAs or AlGaAs. The second-type semiconductor layer 6 and the first-type semiconductor layer 2 include a capping layer providing electrons or holes, and may include other layer materials such as a current spreading layer, a window layer, an ohmic contact layer, etc., and are arranged in different layers according to the doping concentration or the composition content. The active region 4 is a region for providing light radiation by electron and hole recombination, different materials can be selected according to different light emitting wavelengths, and the active region 4 can be a periodic structure of a single quantum well 42 or a multi-quantum well 42. By adjusting the composition ratio of the semiconductor material in the active region 4, light of different wavelengths is expected to be radiated.
Meanwhile, the present embodiment does not limit the number of layers of the quantum barrier 41 and the quantum well 42 in the active region 4.
In the present embodiment, in the active region 4, the quantum barrier 41 serves as a contact surface between the active region 4 and each of the first waveguide layer 3 and the second waveguide layer 5.
In this embodiment, the aluminum composition of the quantum barrier 41 is not less than that of the first waveguide layer 3 or the second waveguide layer 5, so that the active region 4 forms a high barrier through the quantum barrier 41 to form an electron block; at the same time, the first waveguide layer 3 and the second waveguide layer 5 having a lower aluminum composition are used to reduce band bending of the active region 4 and to increase the wave function overlap of electrons and holes in the active region 4.
In this embodiment, the thickness of the first waveguide layer 3 or the second waveguide layer 5 is larger than the thickness of the quantum barrier 41.
The embodiment of the utility model also provides a manufacturing method of the epitaxial structure with the waveguide strain, which comprises the following steps:
step a01, as shown in fig. 2.1, providing a growth substrate 1;
step a02, as shown in fig. 2.2, sequentially growing a first type semiconductor layer 2, a first waveguide layer 3, an active region 4, a second waveguide layer 5 and a second type semiconductor layer 6 on the surface of a growth substrate 1; the active region 4 includes quantum barriers 41 and quantum wells 42 alternately formed, and lattice constants of the quantum barriers 41 and the quantum wells 42 are smaller than an intrinsic lattice constant of the substrate, so that the quantum barriers 41 and the quantum wells 42 have compressive strain; the stress of the first waveguide layer 3 or the second waveguide layer 5 is greater than the stress of the substrate, and the stress of the first waveguide layer 3 or the second waveguide layer 5 is not greater than the stress of the quantum barrier 41;
the quantum barrier 41, the quantum well 42, the first waveguide layer 3 and the second waveguide layer 5 each comprise an undoped semiconductor layer;
in the active region 4, the quantum barrier 41 serves as a contact surface between the active region 4 and each of the first waveguide layer 3 and the second waveguide layer 5.
The epitaxial structure is a semiconductor barrier lamination obtained by MOCVD or other growth methods, the semiconductor barrier lamination is a semiconductor material capable of providing conventional radiation such as ultraviolet, blue, green, yellow, red, infrared light and the like, specifically, a material of 200-950 nm, such as common nitride, specifically, gallium nitride-based semiconductor barrier lamination, the gallium nitride-based barrier lamination is commonly doped with elements such as aluminum, indium and the like, and mainly provides radiation of 200-550 nm wave band; or common AlGaInP-based or AlGaAs-based semiconductor barrier crystal lamination, which mainly provides radiation in the wavelength band of 550-950 nm. The semiconductor barrier stack mainly comprises a second type semiconductor layer 6, an active region 4 and a first type semiconductor layer 2. The first type semiconductor layer 2 and the second type semiconductor layer 6 may be doped by n-type doping or P-type doping, respectively, to realize a material layer providing at least electrons or holes, respectively. The n-type semiconductor layer may be doped with an n-type dopant such as Si, Ge, or Sn, and the P-type doped semiconductor layer may be doped with a P-type dopant such as Mg, Zn, Ca, Sr, or Ba. The second-type semiconductor layer 6, the active region 4 and the first-type semiconductor layer 2 may be made of AlGaInN, GaN, AlGaN, AlGaInP, GaAs or AlGaAs. The second-type semiconductor layer 6 and the first-type semiconductor layer 2 include a capping layer providing electrons or holes, and may include other layer materials such as a current spreading layer, a window layer, an ohmic contact layer, etc., and are arranged in different layers according to the doping concentration or the composition content. The active region 4 is a region for providing light radiation by electron and hole recombination, different materials can be selected according to different light emitting wavelengths, and the active region 4 can be a periodic structure of a single quantum well 42 or a multi-quantum well 42. By adjusting the composition ratio of the semiconductor material in the active region 4, light of different wavelengths is expected to be radiated.
In this embodiment, the aluminum composition of the quantum barrier 41 is not less than that of the first waveguide layer 3 or the second waveguide layer 5, so that the active region 4 forms a high barrier through the quantum barrier 41 to form an electron block; at the same time, the first waveguide layer 3 and the second waveguide layer 5 having a lower aluminum composition are used to reduce band bending of the active region 4 and to increase the wave function overlap of electrons and holes in the active region 4.
According to the above technical solution, the epitaxial structure with waveguide strain provided by the present invention includes a first type semiconductor layer 2, a first waveguide layer 3, an active region 4, a second waveguide layer 5 and a second type semiconductor layer 6 sequentially stacked on a surface of a growth substrate 1; the active region 4 includes quantum barriers 41 and quantum wells 42 alternately formed, and lattice constants of the quantum barriers 41 and the quantum wells 42 are smaller than an intrinsic lattice constant of the substrate, so that the quantum barriers 41 and the quantum wells 42 have compressive strain; the stress of the first waveguide layer 3 or the second waveguide layer 5 is greater than the stress of the substrate, and the stress of the first waveguide layer 3 or the second waveguide layer 5 is not greater than the stress of the quantum barrier 41; the transition and the release of stress are facilitated, and the internal quantum efficiency of the active region 4 is improved.
Secondly, the aluminum composition of the quantum barrier 41 is not less than that of the first waveguide layer 3 or the second waveguide layer 5, so that the active region 4 forms a high barrier through the quantum barrier 41 to form an electron block; meanwhile, the first waveguide layer 3 and the second waveguide layer 5 with lower aluminum components are utilized to reduce the energy band bending of the active region 4 and increase the wave function overlapping of electrons and holes in the active region 4, so that the radiation recombination rate of the active region 4 is improved, and the quantum efficiency of the LED chip is improved.
Then, the thickness of the first waveguide layer 3 or the second waveguide layer 5 is larger than the thickness of the quantum barrier 41; facilitating the transmission of light at the interface of the epitaxial structure.
Further, the quantum barrier 41, the quantum well 42, the first waveguide layer 3, and the second waveguide layer 5 all include undoped semiconductor layers, so that attenuation of the active region 4 is reduced, and reliability of the LED chip is improved.
The manufacturing method of the epitaxial structure with the waveguide strain provided by the utility model has the beneficial effects that the manufacturing method is simple and convenient in process manufacturing, saves the cost and is convenient to produce while the beneficial effects of the LED chip are realized.
Example 2
An embodiment of the present invention further provides an LED chip, as shown in fig. 3, including:
a substrate 10;
the bonding layer 9, the metal reflector 8, the dielectric layer 7 and the epitaxial lamination are sequentially laminated on the surface of the substrate 10; the dielectric layer 7 is provided with a dielectric hole 71, and the metal reflector 8 is embedded in the dielectric hole 71 and connected with the epitaxial lamination; wherein the epitaxial stack is obtained by taking off the growth substrate 1 from the epitaxial structure of embodiment 1, and the metal mirror 8 is embedded in the dielectric hole 71 to form a connection with the second-type semiconductor layer 6;
a first electrode 11 laminated on a surface of the first type semiconductor layer 2 on a side away from the active region 4;
and a second electrode 12 laminated on the back surface of the substrate 10.
The dielectric layer 7 may be made of at least one of fluoride, nitride, or oxide, such as ZnO and SiO, for example2、SiOx、SiOxNy、Si3N4、Al2O3、TiOxMgF or GaF, etc. The dielectric layer 7 is formed by at least one or a combination of dielectric layer 7 materials with different refractive indexes, the dielectric layer 7 is more preferably a light-transmitting dielectric layer 7, and at least 50% of light can pass through the dielectric layer 7. More preferably, the refractive index of the dielectric layer 7 is lower than the refractive index of the epitaxial stack.
The first electrode 11 is disposed on the light exit side of the epitaxial stack. The first electrode 11 mainly includes a pad portion, which is mainly used for external wire bonding in front electrode packaging. The bonding pad of the front electrode can be designed into different shapes, such as a cylinder or a square or other polygons, according to the actual routing requirement. As a preferred embodiment, the front electrode may further include an extension portion extending from the pad, the extension portion may be formed in a predetermined pattern shape, and the extension portion may have various shapes, particularly, a stripe shape.
The second electrode 12 in this embodiment is formed on the back side of the substrate 10 in a full-surface manner, the substrate 10 in this embodiment is a conductive support substrate 10, and the first electrode 11 and the second electrode 12 are formed on both sides of the substrate 10, so as to realize that current flows vertically through the epitaxial stack, thereby providing a uniform current density.
The first electrode 11 and the second electrode 12 are preferably made of a metal material. The pad portion and the extension portion of the first electrode 11 may further include a metal material that achieves good ohmic contact with the semiconductor epitaxial material.
In the present embodiment, the substrate 10 includes a silicon substrate 10.
In this embodiment, the dielectric layer 7 has a plurality of dielectric holes 71 distributed in an array, and the dielectric holes 71 are in a cylindrical or conical shape.
In the present embodiment, the bonding layer 9 includes one or more of Ti, In, and Au.
In the present embodiment, the metal mirror 8 may be formed of at least one metal or alloy of Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Au, and Hf.
The embodiment of the utility model also provides a manufacturing method of the LED chip, which is used for manufacturing any one of the LED chips and comprises the following steps:
s01, as shown in fig. 4.1, providing the epitaxial structure with waveguide strain described in example 1;
s02, as shown in figure 4.2, evaporating a dielectric layer 7 on the surface of the epitaxial structure; patterning the dielectric layer 7 by photolithography and development processes, as shown in fig. 4.3, to form a plurality of dielectric holes 71, wherein the second type semiconductor layer 6 is exposed from the dielectric holes 71;
s03, as shown in fig. 4.4, making a metal reflector 8, wherein the metal reflector 8 completely fills the dielectric hole 71 and covers the dielectric layer 7;
s04, as shown in fig. 4.5, providing a substrate 10; and the surface of the metal reflector 8 is bonded with the substrate 10 through the bonding layer 9 to form a whole, so as to obtain the structure shown in fig. 4.6;
s05, as shown in fig. 4.7, the growth substrate 1 is peeled off to expose the first type semiconductor layer 2;
s06, as shown in fig. 4.8, forming a first electrode 11 on the exposed surface of the first type semiconductor layer 2;
s07, as shown in fig. 4.9, forming a second electrode 12 on the surface of the substrate 10 facing away from the bonding layer 9.
As can be seen from the above technical solutions, the LED chip provided by the present invention, based on the application of the epitaxial structure with waveguide strain described in embodiment 1, is formed by sequentially stacking a first type semiconductor layer 2, a first waveguide layer 3, an active region 4, a second waveguide layer 5, and a second type semiconductor layer 6 on the surface of a growth substrate 1; the active region 4 includes quantum barriers 41 and quantum wells 42 alternately formed, and lattice constants of the quantum barriers 41 and the quantum wells 42 are smaller than an intrinsic lattice constant of the substrate, so that the quantum barriers 41 and the quantum wells 42 have compressive strain; the stress of the first waveguide layer 3 or the second waveguide layer 5 is greater than the stress of the substrate, and the stress of the first waveguide layer 3 or the second waveguide layer 5 is not greater than the stress of the quantum barrier 41; the transition and the release of stress are facilitated, and the internal quantum efficiency of the active region 4 is improved.
Secondly, the aluminum composition of the quantum barrier 41 is not less than that of the first waveguide layer 3 or the second waveguide layer 5, so that the active region 4 forms a high barrier through the quantum barrier 41 to form an electron block; meanwhile, the first waveguide layer 3 and the second waveguide layer 5 with lower aluminum components are utilized to reduce the energy band bending of the active region 4 and increase the wave function overlapping of electrons and holes in the active region 4, so that the radiation recombination rate of the active region 4 is improved, and the quantum efficiency of the LED chip is improved.
Then, the thickness of the first waveguide layer 3 or the second waveguide layer 5 is larger than the thickness of the quantum barrier 41; facilitating the transmission of light at the interface of the epitaxial structure.
Further, the quantum barrier 41, the quantum well 42, the first waveguide layer 3, and the second waveguide layer 5 all include undoped semiconductor layers, so that attenuation of the active region 4 is reduced, and reliability of the LED chip is improved.
Finally, the LED chip is connected with the second type semiconductor layer 6 by embedding the metal reflector 8 into the medium hole 71, and the medium hole 71 is columnar or conical; and the formed ODR structure enables the light reflection angle of the metal reflector to be increased, and the light output rate and the light output angle are effectively improved.
The manufacturing method of the LED chip provided by the utility model has the beneficial effects that the manufacturing process is simple and convenient, the cost is saved, and the production is convenient while the beneficial effects of the LED chip are realized.
The device provided by the embodiment of the present invention has the same implementation principle and technical effect as the method embodiments, and for the sake of brief description, reference may be made to the corresponding contents in the method embodiments without reference to the device embodiments. It is clear to those skilled in the art that, for convenience and brevity of description, the specific working processes of the foregoing systems, apparatuses and units may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.
The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.
It is further noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that an article or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such article or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in an article or device that comprises the element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (8)
1. An epitaxial structure with waveguide strain, comprising:
growing a substrate;
the first type semiconductor layer, the first waveguide layer, the active region, the second waveguide layer and the second type semiconductor layer are sequentially stacked on the surface of the growth substrate; the active region comprises quantum barriers and quantum wells which are alternately formed, and the quantum barriers and the quantum wells have compressive strain; the stress of the first waveguide layer or the second waveguide layer is greater than the stress of the substrate, and the stress of the first waveguide layer or the second waveguide layer is not greater than the stress of the quantum barrier.
2. The waveguide strained epitaxial structure of claim 1 wherein in the active region, a quantum barrier is the interface of the active region with the first and second waveguide layers, respectively.
3. The waveguide strained epitaxial structure of claim 1 wherein the quantum barrier, quantum well, first waveguide layer and second waveguide layer each comprise undoped semiconductor layers.
4. The waveguide strained epitaxial structure of claim 1 wherein the thickness of the first or second waveguide layer is greater than the thickness of the quantum barrier.
5. An LED chip, comprising:
a substrate;
the bonding layer, the metal reflector, the dielectric layer and the epitaxial lamination layer are sequentially stacked on the surface of the substrate; the dielectric layer is provided with a dielectric hole, and the metal reflector is embedded into the dielectric hole to be connected with the epitaxial lamination layer; wherein the epitaxial stack is obtained by taking off the growth substrate from the epitaxial structure of any one of claims 1 to 4, and the metal mirror is embedded in the dielectric hole to form a connection with the second-type semiconductor layer;
a first electrode laminated on a surface of the first type semiconductor layer on a side away from the active region;
and a second electrode laminated on the back surface of the substrate.
6. The LED chip of claim 5, wherein said substrate comprises a silicon substrate.
7. The LED chip of claim 5, wherein the dielectric layer has a plurality of dielectric holes distributed in an array, and the dielectric holes are in a shape of a column or a cone.
8. The LED chip of claim 5, wherein said dielectric layer comprises at least one stack of a fluoride layer, a nitride layer, or an oxide layer.
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