CN216565595U - Micro-electro-mechanical packaging structure and system - Google Patents

Micro-electro-mechanical packaging structure and system Download PDF

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Publication number
CN216565595U
CN216565595U CN202122995368.4U CN202122995368U CN216565595U CN 216565595 U CN216565595 U CN 216565595U CN 202122995368 U CN202122995368 U CN 202122995368U CN 216565595 U CN216565595 U CN 216565595U
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substrate
interlayer conductive
interlayer
conductive structure
chip
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张敏
梅嘉欣
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Shanghai Xinyi Chunchang Microelectronics Technology Co ltd
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Suzhou Xinyi Microelectronics Technology Co ltd
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Abstract

Disclosed are a micro-electromechanical packaging structure and a system, wherein the packaging structure comprises: the shell is provided with a first substrate, a third substrate and a second substrate positioned between the first substrate and the third substrate, and a conductive area is arranged on the surface of the first substrate and/or the surface of the third substrate; at least one electrode located on a side of the housing; and an interlayer conductive structure for electrically connecting the conductive regions of the surface of the first substrate and the surface of the second substrate; wherein the interlayer conductive structure electrically connects the electrodes to the respective conductive regions through the second substrate. Through the arrangement of the interlayer electrodes, the conductive regions on the three layers of substrates are electrically connected, so that only one layer of substrate is connected to the electrodes, the whole wiring of the micro-electro-mechanical system is simplified, the complexity of the process flow is reduced, and the cost is reduced.

Description

Micro-electro-mechanical packaging structure and system
Technical Field
The present disclosure relates to the field of semiconductor technologies, and in particular, to a micro-electromechanical package structure and a system.
Background
Microphones manufactured based on Micro Electro Mechanical Systems (MEMS) are called MEMS microphones, and generally include a MEMS structure and an Application Specific Integrated Circuit (ASIC) chip electrically connected to the MEMS structure. In order to protect the chip and reduce the interference of the external environment to the chip, a package structure is usually required to protect the micro-electromechanical structure and the chip, and the chip is required to be electrically connected with the outside through the package structure.
The conventional microphone packaging structure is divided into: the Top structure and the Bottom structure, i.e. the sound inlet hole and the polar conductive area (pad) for the microphone patch, are respectively arranged on the upper and lower surfaces of the microphone packaging structure. In order to adapt to some special terminal applications, the sound hole and the patch conductive area (pad) need to be in the vertical direction, so as to realize a side sound inlet structure.
In some prior art, microelectromechanical package structures implement side-entering structures. However, in the prior art, the arrangement of the traces for transmitting the output signals of the mems is complicated, and the interference between the traces is large, thereby reducing the reliability of the mems, improving the complexity of the process flow, and increasing the cost.
SUMMERY OF THE UTILITY MODEL
In view of the foregoing, it is an object of the present disclosure to provide a mems package structure and a system, so as to simplify the lead structure of the mems and improve the reliability of the system.
The present disclosure provides a micro-electromechanical packaging structure, comprising:
the shell is provided with a first substrate, a third substrate and a second substrate positioned between the first substrate and the third substrate, and a conductive area is arranged on the surface of the first substrate and/or the surface of the third substrate;
at least one electrode located on a side of the housing; and
an interlayer conductive structure for electrically connecting the conductive regions of the surface of the first substrate and the surface of the second substrate;
wherein the interlayer conductive structure electrically connects the electrodes to the respective conductive regions through the second substrate.
Preferably, the interlayer conductive structure is located inside and/or on the surface of the first substrate, the second substrate, and the third substrate, respectively.
Preferably, on the first substrate, the interlayer conductive structure is electrically connected to the conductive region on the first substrate in the interior of the first substrate and exposed to the surface of the first substrate opposite to the second substrate;
on the second substrate, the interlayer conductive structure penetrates through the thickness direction of the second substrate and is exposed to the surface of the second substrate opposite to the first substrate and the third substrate;
on the third substrate, the interlayer conductive structure is electrically connected to the conductive region on the third substrate in the interior of the third substrate and exposed to the surface of the third substrate opposite to the second substrate.
Preferably, when the first substrate, the second substrate and the third substrate are combined together, the interlayer conductive structure exposed on the surface of the second substrate opposite to the first substrate is correspondingly connected with the interlayer conductive structure exposed on the inner surface of the first substrate, and the interlayer conductive structure exposed on the surface of the second substrate opposite to the third substrate is correspondingly connected with the interlayer conductive structure exposed on the inner surface of the third substrate.
Preferably, the interlayer conductive structure is a metal via.
Preferably, the electrodes are located at least at the sides of the second substrate.
Preferably, the package structure further includes a ring conductor located on any one or more of an inner surface of the first substrate, an inner surface of the third substrate, and a surface of the second substrate opposite to the first substrate and the third substrate.
Preferably, when the first substrate, the second substrate and the third substrate are fixed, the interlayer conductive structure is located outside the annular conductor.
Preferably, the interlayer conductive structure is disposed adjacent to the side having the electrode.
Preferably, the micro-electromechanical packaging structure further comprises at least one sound hole, and the sound hole is arranged on at least one surface of the shell, which is adjacent to the surface where the electrode is located.
A microelectromechanical system, comprising:
a packaging structure; and
and the micro-electromechanical chip and the ASIC chip are electrically connected.
Preferably, the micro-electromechanical chip comprises at least one of a microphone chip, a pressure sensor chip and a bone conduction chip.
According to the micro-electromechanical packaging structure and the system provided by the embodiment of the disclosure, the packaging structure comprises an interlayer conductive structure, so that the conductive regions on the surfaces of the first substrate and the second substrate are electrically connected, and therefore only one layer of substrate is required to be connected to the side electrode, wiring of the micro-electromechanical packaging structure is simplified, and wiring difficulty and manufacturing cost are reduced; meanwhile, the electrodes can be only distributed on the side face of the substrate provided with the conducting wires, so that the processing difficulty is reduced, and the processing procedure is saved.
In the embodiment of the disclosure, the interlayer conductive structure electrically connects the electrodes to the corresponding conductive regions through the second substrate, which avoids the arrangement of wires in the inner/outer surface/board of the first substrate and the inner/outer surface/board of the third substrate, and reduces the wiring difficulty and the manufacturing cost.
In the embodiment of the disclosure, the interlayer conductive structure on the surface of the second substrate is L-shaped, so that the interlayer conductive structure on the surface of the second substrate is conveniently connected to the electrode while the interlayer conductive structure on the surface of the second substrate is connected to the interlayer conductive structures on the surfaces of the first substrate and the third substrate.
In this embodiment, the interlayer conductive structure is located outside the annular conductor, and no electrode needs to be designed in the substrate annular conductor, so that the finished product width value of the product can be reduced to a greater extent, the assembly space of the terminal customer complete machine is saved, and meanwhile, the interlayer conductive structure is arranged close to the side face with the electrode, so that the interlayer conductive structure on the surface of the second substrate can be conveniently connected to the electrode.
In the embodiment of the disclosure, the sound holes are arranged on the first substrate and/or the third substrate, so that the sound holes and the electrodes can be located on different surfaces of the housing, the sound holes and the electrodes are not opposite to each other, the sound holes are arranged on at least one surface adjacent to the surface where the electrodes are located, and the side sound inlet function of the micro electro mechanical system can be realized by the positions of the electrodes and the sound holes on the housing.
Drawings
The above and other objects, features and advantages of the present disclosure will become more apparent from the following description of embodiments of the present disclosure with reference to the accompanying drawings, in which:
fig. 1 shows a schematic structural diagram of a housing of an encapsulation structure according to an embodiment of the disclosure.
FIG. 2 is a schematic structural diagram illustrating a first angle between a first substrate and a third substrate of a housing according to an embodiment of the disclosure;
fig. 3 is a schematic structural diagram illustrating a second angle between the first substrate and the third substrate of the housing according to the embodiment of the disclosure.
Fig. 4 shows a schematic structural diagram of a second substrate of an embodiment of the present disclosure;
FIG. 5 illustrates a schematic structural diagram of a load-bearing platform of an embodiment of the present disclosure;
FIG. 6 illustrates a schematic structural view of a first angle of a micro-electromechanical system according to an embodiment of the present disclosure;
FIG. 7 illustrates a second angle structural schematic of a micro-electromechanical system in accordance with an embodiment of the present disclosure;
FIG. 8 is a schematic view of the first substrate and the connection board shown in FIG. 6 after being connected;
FIG. 9 is a schematic view of the first substrate of FIG. 6;
fig. 10 shows a schematic structural view of the second substrate in fig. 6.
Detailed Description
The present disclosure will be described in more detail below with reference to the accompanying drawings. Like elements in the various figures are denoted by like reference numerals. For purposes of clarity, the various features in the drawings are not necessarily drawn to scale. In addition, certain well known components may not be shown. For simplicity, the semiconductor structure obtained after several steps can be described in one figure.
It will be understood that when a layer or region is referred to as being "on" or "over" another layer or region in describing the structure of the device, it can be directly on the other layer or region or intervening layers or regions may also be present. And, if the device is turned over, that layer, region, or regions would be "under" or "beneath" another layer, region, or regions.
If for the purpose of describing the situation directly on another layer, another area, the expressions "directly on … …" or "on … … and adjacent thereto" will be used herein.
Numerous specific details of the present disclosure, such as structure, materials, dimensions, processing techniques and techniques of the devices, are set forth in the following description in order to provide a more thorough understanding of the present disclosure. However, as will be understood by those skilled in the art, the present disclosure may be practiced without these specific details.
The present disclosure may be presented in various forms, some examples of which are described below.
The housing structure of the mems package structure according to the first embodiment of the disclosure will be described in detail with reference to fig. 1, fig. 2, fig. 3, fig. 4 and fig. 5.
The package structure 100 includes a housing, which is substantially a rectangular parallelepiped, and the housing includes a top surface 101, a bottom surface 102 opposite to the top surface 101, and four side surfaces respectively adjacent to the top surface 101 and the bottom surface 102.
In the embodiment of the present disclosure, in order to reduce the processing difficulty, the housing 100 is composed of a first substrate 110, a second substrate 120, and a third substrate 130 which are separately disposed.
In this embodiment, the first substrate 110, the second substrate 120, and the third substrate 130 are plate-shaped base materials, and a through hole is formed in the middle of the second substrate 120. The first substrate 110, the second substrate 120 and the third substrate 130 are stacked together, wherein the outer surface of the first substrate 110 constitutes the top surface 101 of the housing, and the outer surface of the third substrate 130 constitutes the bottom surface 102 of the housing; the second substrate 120 is located between the first substrate 110 and the third substrate 130, has two surfaces 122 opposite to the first substrate 110 and the third substrate 130, and is connected to the first substrate 110 and the third substrate 130 through the two surfaces 122, respectively. The inner surface 111 of the first substrate 110, the inner surface 131 of the third substrate 130, and the inner surface 121 of the second substrate 120 form a cavity, and the cavity is used for packaging the micro-electromechanical chip 200, the ASIC chip 300, and the like.
In some other embodiments, the second substrate 120 may also surround at least one of the first substrate 110 and the third substrate 130. In some other embodiments, the first substrate 110 and the second substrate 120 are a unitary structure, for example, a preformed cover-shaped structure is formed by integrating the first substrate 110 and the second substrate 120. In still other embodiments, the second substrate 120 and the third substrate 130 are a unitary structure, for example, a pre-formed manner is used to form the second substrate 120 and the third substrate 130 into a unitary cavity structure.
In the present embodiment, the side surfaces 103 include one side surface 113 of the first substrate 110 (a surface extending in the thickness direction of the first substrate 110), one side surface 123 of the outer surface of the second substrate 120 (a surface extending in the thickness direction of the second substrate 120), and one side surface 133 of the third substrate 130 (a surface extending in the thickness direction of the third substrate 130).
The side surface 103 of the housing has a groove 103a and a plane 103b separating the groove 103a, correspondingly, the side surface 113 has a groove 113a and a plane 113b, the side surface 123 has a groove 123a and a plane 123b, and the side surface 123 has a groove 133a and a plane 133b, and after the first substrate 110, the second substrate 120 and the third substrate 130 are combined, the groove 113a, the groove 123a and the groove 133a together form the groove 103 a.
The shape of the groove 103a can be set to an arc-shaped groove, a square-shaped groove, a trapezoid-shaped groove, a triangular groove, etc. as required. After the package structure is fixed on the supporting platform 900, the protrusion 901 of the supporting platform is engaged with the groove 103a of the side surface 103 of the housing, so that the stability of the product after being fixed is improved.
The package structure 100 includes a sound hole 140, in this embodiment, the package structure 100 includes a sound hole 140, and the sound hole 140 is disposed on the top surface 101 of the housing and penetrates through the thickness direction of the first substrate 110. It is understood that the package structure 100 may further include a plurality of sound holes, and the one or more sound holes are located on at least one surface of the housing, and the location and number of the sound holes 140 are not limited by the present disclosure.
The sound holes are formed in the first substrate and/or the third substrate, the electrodes are arranged on the side face of the shell, so that the sound holes and the electrodes can be located on different surfaces of the shell and cannot be opposite to each other, the sound holes are formed in at least one face adjacent to the face where the electrodes are located, and the side face sound inlet function of the micro-electro-mechanical system can be achieved by the positions of the electrodes and the sound holes on the shell.
The structure of the mems according to the embodiment of the present disclosure will be described in detail with reference to fig. 6, 7, 8, 9, and 10.
The micro-electromechanical system of the disclosed embodiment includes: package structure, microelectromechanical chip 200, and ASIC chip 300. The package structure includes: a housing, a sound aperture 140, and at least one electrode 150. The housing of the package structure can refer to the descriptions of fig. 1, fig. 2, fig. 3, and fig. 4, and is not described herein again.
Referring to fig. 6, in the present embodiment, the electrode 150 is disposed on the side surface 103, and is disposed on two adjacent surfaces to the sound hole 140 on the top surface 101, so as to realize side-entry sound.
In this embodiment, the number of the electrodes 150 is 3, wherein two electrodes 150 are used as conventional electrodes for leading out electrical signals of the mems, such as an output signal and a ground signal. The other electrode 150 acts as a back-up electrode for drawing electrical signals out of the mems when needed instead of the conventional electrode. However, the present embodiment is not limited thereto, and those skilled in the art can make other arrangements for the number of electrodes 150 and the corresponding electrical signal functions as needed.
In some embodiments, the electrode 150 comprises a plated layer formed on the side 103 of the housing using a plating process. Each electrode 150 covers the surface of a corresponding recess 103a, with adjacent electrodes 150 separated by a plane 103 b.
Referring to fig. 8 and 9, in the present embodiment, the micro-electromechanical chip 200 and the ASIC chip 300 are fixed on the inner surface 111 of the first substrate 110. Wherein the micro-electromechanical chip 200 is electrically connected to the ASIC chip 300 through the leads 301, and the ASIC chip 300 is electrically connected to the corresponding one or more first conductive regions 161.
However, the embodiment of the present disclosure is not limited thereto, and those skilled in the art may also dispose a portion of the first conductive region 161 on the inner surface 131 of the third substrate 130 as needed, and flexibly dispose the micro-electromechanical chip 200 and the ASIC chip 300 on the first substrate 110 and the third substrate 130.
In some other embodiments, discrete devices, such as capacitors, resistors, inductors, etc., may be further included, the discrete devices being connected to the corresponding first conductive regions 161, and the capacitors, resistors, inductors, etc., may be integrated with the first substrate 110 and/or the third substrate 130.
Referring to fig. 7, a second conductive region 162 is disposed on the bottom surface 102, and the second conductive region 162 is used for bonding the mems.
The micro-electromechanical chip 200, the ASIC chip 300, the first conductive region 161 of the discrete device, and the second conductive region 162 on the bottom surface 102 need to be electrically connected to the electrode 150, so as to be electrically connected to the outside.
In order to simplify the wiring inside the board, in the embodiment, the first conductive region 161 on the first substrate 110 and the conductive region 162 on the third substrate 130 are electrically connected through the interlayer conductive structure 180, and thus only the conductive region or the interlayer conductive structure on one substrate needs to be electrically connected to the electrode 150.
The interlayer conductive structure 180 is located inside and/or on the surface of the first substrate 110, the second substrate 120, and the third substrate 130, respectively.
Specifically, on the first substrate 110, the interlayer conductive structure 180 is electrically connected to the first conductive region 161 at the inside of the first substrate 110 and exposed to the inner surface 111 of the first substrate 110; on the second substrate 120, the interlayer conductive structure 180 penetrates through a thickness direction of the second substrate and is exposed to a surface of the second substrate 120 opposite to the first substrate 110 and the third substrate 130; on the third substrate 130, the interlayer conductive structure 180 is electrically connected to the second conductive region 162 inside the third substrate 130 and exposed to the inner surface 131 of the third substrate 130.
When the first substrate 110, the second substrate 120 and the third substrate 130 are combined together, the interlayer conductive structure 180 exposed on the surface 122 of the second substrate 120 opposite to the first substrate 110 is correspondingly connected to the interlayer conductive structure 180 exposed on the inner surface 111 of the first substrate 110, and the interlayer conductive structure 180 exposed on the surface 122 of the second substrate 120 opposite to the third substrate 130 is correspondingly connected to the interlayer conductive structure 180 exposed on the inner surface 131 of the third substrate 130, so as to achieve the electrical connection between the conductive regions of the package structure 100.
In this embodiment, the package structure includes an interlayer conductive structure, and since the conductive regions on the first substrate 110, the second substrate 120, and the third substrate 130 are electrically connected through the interlayer conductive structure 180, and then the conductive regions/interlayer conductive structures 180 of any one or more layers of substrates are connected to the electrodes 150, the conductive regions on the first substrate 110, the second substrate 120, and the third substrate 130 can be connected to the electrodes 150, so that only one layer of substrate is needed to be connected to the side electrodes, wiring of the micro-electromechanical package structure is simplified, and wiring difficulty and manufacturing cost are reduced.
In this embodiment, the interlayer conductive structure 180 on the surface of the second substrate 120 is connected to the electrode 150, thereby avoiding the arrangement of wires on the inner/outer surface/inner surface of the first substrate 110 and the inner/outer surface/inner surface of the third substrate 130, and reducing the wiring difficulty and the manufacturing cost.
In this embodiment, the interlayer conductive structure 180 on the surface of the second substrate 120 is L-shaped, and one of the legs of the L-shaped interlayer conductive structure 180 is connected to the lateral electrode 150. It is understood that in other embodiments, the shape of the interlayer conductive structure 180 may also be other shapes, such as a rectangle, an irregular pattern, etc., and the present embodiment does not limit the shape of the interlayer conductive structure 180.
The electrode 150 at least covers the corresponding groove 123a of the second substrate 120, so as to connect the interlayer conductive structure 180 on the surface of the second substrate 120 with the electrode 150.
In this embodiment, the interlayer conductive structure is L-shaped, so that the interlayer conductive structure on the surface of the second substrate is conveniently connected to the electrode while the interlayer conductive structure on the surface of the second substrate is connected to the interlayer conductive structures on the surfaces of the first substrate and the third substrate.
Furthermore, the electrodes are only distributed on the side face of the substrate provided with the conducting wires, so that the processing difficulty is reduced, and the processing procedure is saved.
Specifically, the electrode 150 may be located only on the side 123 of the second substrate 120, may be located on the side 123 of the second substrate 120 and the side 113 of the first substrate 110, may be located on the side 123 of the second substrate 120 and the side 133 of the third substrate 130, or may be located on the side 123 of the second substrate 120, the side 113 of the first substrate 110, and the side 133 of the third substrate 130.
In this embodiment, the inner surface 111 of the first substrate 110 further has a ring-shaped conductor 180a, the ring-shaped conductor 180a is located at the edge of the inner surface 111 of the first substrate 110, and surrounds the micro electromechanical chip 200, the ASIC chip 300 and the conductive region 160, and the ring-shaped conductor 180a is not connected to the electromechanical chip 200, the ASIC chip 300 and the conductive region 160, and plays a role of shielding; meanwhile, when the first substrate 110 and the second substrate 120 are assembled together, the thickness of the annular conductor 180a is engaged between the first substrate 110 and the second substrate 120, so as to perform a sealing function.
Correspondingly, the surface 122 of the second substrate 120 opposite to the third substrate 130 and/or the inner surface 131 of the third substrate 130 also has a ring-shaped conductor 180a, and when the second substrate 120 is fixed to the third substrate 130, the thickness of the ring-shaped conductor 180a is engaged between the second substrate 120 and the third substrate 130.
To facilitate the connection of the interlayer conductive structure 180 to the electrode 150, the interlayer conductive structure 180 is located outside the annular conductor 180a and adjacent to the side surface 103 when the first substrate 110, the second substrate 120 and the third substrate 130 are assembled together.
Specifically, the interlayer conductive structure 180 on the surface of the second substrate 120 is disposed adjacent to the side surface 123 so as to be adjacent to the electrode 150. Accordingly, the interlayer conductive structure 180 on the surface of the first substrate 110 is disposed adjacent to the side surface 113; the interlayer conductive structure 180 on the surface of the third substrate 130 is disposed adjacent to the side 133.
In this embodiment, the interlayer conductive structure is located outside the annular conductor, and no electrode needs to be designed in the substrate annular conductor, so that the finished product width value of the product can be reduced to a greater extent, the assembly space of the terminal customer complete machine is saved, and meanwhile, the interlayer conductive structure is arranged close to the side face with the electrode, so that the interlayer conductive structure on the surface of the second substrate can be conveniently connected to the electrode.
In this embodiment, the interlayer conductive structures 180 are, for example, metal vias, and there are three interlayer conductive structures 180 on each layer of substrate. In other embodiments, the interlayer conductive structures 180 may also be in other forms, and the interlayer conductive structures 180 on each layer of the substrate may also be one or more, and the form and the number of the interlayer conductive structures 180 are not limited in this embodiment.
The package structure further includes an electromagnetic shielding layer 190, the electromagnetic shielding layer 190 is located on the inner surface 121 of the second substrate 120 and extends to two surfaces 122 opposite to the first substrate 110 and the second substrate 120, respectively, and when the surface 122 of the second substrate 120 has the annular conductor 180a, the electromagnetic shielding layer 190 is connected to the annular conductor 180a on the second substrate 120; when the first substrate 110 is fixed to the second substrate 120, the annular conductor 180a on the first substrate 110 is in contact with the electromagnetic shield layer 180.
Of course, in some environments where the mems is not sensitive to electromagnetic interference, the electromagnetic shielding layer 180 and the annular conductive body 180a may not be provided.
In some preferred embodiments, after electrically connecting the ASIC chip 300 with the conductive region 160 of the first substrate 110, a protection layer needs to be disposed on the ASIC chip 300, and the protection layer is made of a material such as glue, so as to protect the ASIC chip 300 and fix the ASIC chip 300 on the first substrate 110 more firmly.
The mems chip 200 is a microphone chip, but may be a pressure sensor chip, a bone conduction chip, or other mems chips. The present disclosure is not limited as to the type of microelectromechanical chip 200.
In accordance with the embodiments of the present disclosure, as set forth above, these embodiments are not exhaustive of all of the details, nor are they limited to the specific embodiments described. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the disclosure and the practical application, to thereby enable others skilled in the art to best utilize the disclosure and various modifications as are suited to the particular use contemplated. The present disclosure is to be limited only by the claims and their full scope and equivalents.

Claims (14)

1. A microelectromechanical package structure, comprising:
the shell is provided with a first substrate, a third substrate and a second substrate positioned between the first substrate and the third substrate, and a conductive area is arranged on the surface of the first substrate and/or the surface of the third substrate;
at least one electrode located on a side of the housing; and
an interlayer conductive structure for electrically connecting the conductive structures of the surface of the first substrate and the surface of the second substrate;
wherein the interlayer conductive structure electrically connects the electrodes to the respective conductive regions through the second substrate.
2. The microelectromechanical package structure of claim 1, characterized in that the interlayer conductive structures are located inside and/or on the surface of the first substrate, the second substrate, and the third substrate, respectively.
3. The microelectromechanical package structure of claim 1 or 2, characterized in that on the first substrate, the interlayer conductive structure is electrically connected to the conductive region on the first substrate inside the first substrate and exposed to the surface of the first substrate opposite to the second substrate;
on the second substrate, the interlayer conductive structure penetrates through the thickness direction of the second substrate and is exposed to the surface of the second substrate opposite to the first substrate and the third substrate;
on the third substrate, the interlayer conductive structure is electrically connected to the conductive region on the third substrate in the interior of the third substrate and exposed to the surface of the third substrate opposite to the second substrate.
4. The microelectromechanical package structure of claim 3, characterized in that when the first substrate, the second substrate, and the third substrate are combined together, the interlayer conductive structures exposed on the surface of the second substrate opposite to the first substrate are correspondingly connected to the interlayer conductive structures exposed on the inner surface of the first substrate, and the interlayer conductive structures exposed on the surface of the second substrate opposite to the third substrate are correspondingly connected to the interlayer conductive structures exposed on the inner surface of the third substrate.
5. The microelectromechanical package structure of claim 1, characterized in that the interlayer conductive structure on the surface of the second substrate is electrically connected to the electrodes.
6. The microelectromechanical package structure of claim 5, characterized in that the interlayer conductive structure on the surface of the second substrate is L-shaped, and one leg of the L-shaped interlayer conductive structure is connected to the electrode.
7. The microelectromechanical package structure of claim 1, characterized in that the interlayer conductive structure is a metal via.
8. The microelectromechanical package structure of claim 1, characterized in that the electrodes are located at least on a side of the second substrate.
9. The microelectromechanical package structure of claim 1, characterized in that the package further comprises a ring conductor located on any one or more of an inner surface of the first substrate, an inner surface of the third substrate, and a surface of the second substrate opposite the first and third substrates.
10. The microelectromechanical package structure of claim 9, characterized in that the interlayer conductive structure is located outside the ring conductor when the first substrate, the second substrate, and the third substrate are fixed.
11. The microelectromechanical package structure of claim 1, characterized in that the interlayer conductive structure is disposed adjacent to the side having the electrodes.
12. The microelectromechanical package of claim 1, characterized in that the microelectromechanical package further comprises at least one sound hole disposed on at least one surface of the housing adjacent to a surface of the electrode.
13. A microelectromechanical system, comprising:
an encapsulation structure according to any one of claims 1 to 12; and
and the micro-electromechanical chip and the ASIC chip are electrically connected.
14. The mems of claim 13, wherein the mems chip comprises at least one of a microphone chip, a pressure sensor chip, and a bone conduction chip.
CN202122995368.4U 2021-12-01 2021-12-01 Micro-electro-mechanical packaging structure and system Active CN216565595U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202122995368.4U CN216565595U (en) 2021-12-01 2021-12-01 Micro-electro-mechanical packaging structure and system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202122995368.4U CN216565595U (en) 2021-12-01 2021-12-01 Micro-electro-mechanical packaging structure and system

Publications (1)

Publication Number Publication Date
CN216565595U true CN216565595U (en) 2022-05-17

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Application Number Title Priority Date Filing Date
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