CN216527159U

CN216527159U - Communication isolation circuit and device

Info

Publication number: CN216527159U
Application number: CN202123347075.1U
Authority: CN
Inventors: 陈月华; 李秀楼; 王越天
Original assignee: Shenzhen Honor Electronic Co ltd
Current assignee: Shenzhen Honor Electronic Co ltd
Priority date: 2021-12-28
Filing date: 2021-12-28
Publication date: 2022-05-13
Anticipated expiration: 2031-12-28

Abstract

The application provides a communication buffer circuit and device, its buffer circuit includes: the communication processor comprises two communication signal terminals and a power supply terminal; the two communication signal input ends are respectively and independently coupled with a communication signal terminal correspondingly and used for inputting a communication signal, a power supply and the isolation module. This application is through setting up the isolation module during power failure, the disconnection is every the signal input of communication signal input to the communication signal terminal that corresponds, and then solved traditional I2C communication signal and not kept apart the reliability decline problem that handles and lead to redundant power, simple quick mutual isolation and independent operation between power module on the I2C communication line have been realized, avoided because the communication problem of single power and lead to other power module's communication all to be in the inefficacy, whole redundancy work's reliability has been promoted.

Description

Communication isolation circuit and device

Technical Field

The application relates to the field of communication isolation circuits, in particular to a communication isolation circuit and a device.

Background

The I2C (Inter-Integrated Circuit) bus is a two-wire serial bus used for communication in the electronics industry, and is mainly used for information transmission connecting a microcontroller and peripheral devices thereof. The I2C bus, which was originally developed for audio and video equipment in the 80 s, is now being used in both switching power supplies and system servers, including the communication of single and multiple power module status. For example, an administrator may query each power module to manage the configuration of the system or to master the functional status of components, such as the output voltage of the power supply and the fan speed of the system. And a plurality of parameters such as input and output of the switching power supply, fan rotating speed and temperature condition can be monitored at any time, and the safety of the system and the convenience of management are improved.

The I2C bus is a serial bus consisting of a data line SDA and a clock SCL, which can transmit and receive data. The bidirectional transmission is performed between a Central Processing Unit (CPU) and a controlled Integrated Circuit (IC) and between the ICs, and the maximum transmission rate is 100 kbps. The various controlled circuits are connected in parallel on the bus, but just like a telephone set, the controlled circuits can work only by dialing respective numbers, so that each circuit and each module have unique addresses, and each module circuit connected in parallel on the I2C bus is a master controller (or a slave controller) and a transmitter (or a receiver) in the process of information transmission, which depends on the functions to be completed. The control signal sent by CPU is divided into two parts of address code and control quantity, the address code is used for selecting address, that is, the circuit to be controlled is switched on, and the kind of control is determined; the control amount determines the type of adjustment (e.g., contrast, brightness, etc.) and the amount of adjustment required. Thus, the control circuits are independent and independent of each other although hung on the same bus.

The I2C bus has three types of signals in common during data transfer, which are: a start signal, an end signal and a response signal.

Start signal: when SCL is high, SDA transitions from high to low to begin transmitting data.

An end signal: when SCL is low, SDA jumps from low level to high level to finish transmitting data.

Response signal: after receiving 8-bit data, the IC receiving the data sends a specific low-level pulse to the IC transmitting the data, indicating that the data has been received. After the CPU sends a signal to the controlled unit, the CPU waits for the controlled unit to send a response signal, and after receiving the response signal, the CPU judges whether to continuously transmit the signal according to the actual condition. If the answer signal is not received, the controlled unit is judged to be in fault.

The I2C protocol uses master/slave two-way communication. A device sends data to the bus, defined as a transmitter, and a device receives data, defined as a receiver. Both the master and slave devices may operate in a receive and transmit state. The bus must be controlled by a master device (typically a microcontroller) that generates a Serial Clock (SCL) to control the direction of transmission of the bus and to generate start and stop conditions. The data state on the SDA line can only change during periods when SCL is low, and changes in the SDA state during periods when SCL is high are used to indicate start and stop conditions.

In the server power supply, in order to better compatible with system operation and flexible regulation and control, the power supply ends use the I2C communication and system to report and read information and make corresponding response to corresponding instructions, but if the power supply fails, normal communication of the system is affected.

SUMMERY OF THE UTILITY MODEL

In order to solve at least one of the above problems, the present application provides a communication isolation circuit comprising:

the communication processor comprises two communication signal terminals and a power supply terminal;

two communication signal input ends which are respectively and independently coupled with a communication signal terminal correspondingly and used for inputting a communication signal;

the power supply is respectively coupled with the two communication signal input ends, the corresponding communication signal terminals and the power supply terminal; and

and the isolation module is used for disconnecting the signal input from each communication signal input end to the corresponding communication signal terminal when the power supply fails.

In an optional embodiment, the isolation module includes a first isolation unit and a second isolation unit, each of the isolation units is coupled to the power supply and conducts the communication signal input terminal to a signal input channel of a corresponding communication signal terminal based on a high level generated by the power supply.

In an alternative embodiment, the first isolation unit includes a first switching element and a first diode element, and the second isolation unit includes a second switching element and a second diode element;

the control end and the input end of the first switch element are coupled with a power supply, the output end of the first switch element is coupled with the corresponding communication signal input end, the input end of the first diode element is coupled with the input end of the first switch element and is coupled with the corresponding communication signal terminal, and the output end of the first diode element is coupled with the output end of the first switch element;

the control terminal and the input terminal of the second switching element are coupled to a first node, the output terminal of the second switching element is coupled to the corresponding communication signal input terminal, the input terminal of the second diode element is coupled to the first node, and the output terminal of the second diode element is coupled to the output terminal of the second switching element.

In an alternative embodiment, the communication processor further comprises a plurality of ground terminals, each coupled to ground and each coupled to a second node.

In an optional embodiment, the method further comprises:

and one end of the capacitor is coupled with the ground wire end, and the other end of the capacitor is coupled with the second node.

In an alternative embodiment, the first diode element and/or the second diode element is a schottky diode element.

In an optional embodiment, the method further comprises:

and the first resistor is coupled between the first switching element and a corresponding power supply end.

In an optional embodiment, the method further comprises:

the second resistor is coupled between the first switch element and the corresponding communication signal input end.

In an optional embodiment, the method further comprises:

a third resistor coupled between the first node and the supply terminal.

In an optional embodiment, the method further comprises:

and the fourth resistor is coupled between the second switch element and the corresponding communication signal input end.

In an alternative embodiment, the communication isolation circuit is used for an I2C bus, the communication signals include data signals of the I2C bus and clock signals of the I2C bus, and correspondingly, the communication signal terminals include data signal terminals and clock signal terminals.

The present application further provides a communication isolation device comprising an isolation circuit as described above.

The beneficial effect of this application is as follows:

the application provides a communication isolation circuit and device, through setting up isolation module during power failure, the disconnection is every the signal input of communication signal input to the communication signal terminal that corresponds, and then solved traditional I2C communication signal and not kept apart the reliability decline problem that handles and lead to redundant power supply, simple quick mutual isolation and the independent operation between power module on the I2C communication line have been realized, avoided because the communication problem of single power and lead to other power module's communication all to be in the inefficacy, whole redundancy work's reliability has been promoted.

Drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts. In the drawings:

fig. 1 is a schematic structural diagram of a prior art communication isolation circuit according to an embodiment of the present application.

Fig. 2 is a schematic structural diagram of a communication isolation circuit according to another embodiment of the present application.

Detailed Description

To make the objects, technical solutions and advantages of the embodiments of the present application more apparent, the embodiments of the present application are further described in detail below with reference to the accompanying drawings. The exemplary embodiments and descriptions of the present application are provided herein to explain the present application and not to limit the present application. It should be noted that the embodiments and features of the embodiments in the present application may be arbitrarily combined with each other without conflict.

In the server power supply, in order to better compatible with system operation and flexible regulation and control, the power supply end uses I2C communication and system to report and read information and make corresponding response to corresponding instructions.

The scheme of the conventional I2C communication circuit is shown in fig. 1, where SDA and SCL are respectively pulled up to 3.3V by resistors R11 and R14 of 10K Ω, an internal Micro Control Unit (MCU) and external SDA and SCL signals are serially connected to a 22 Ω anti-static resistor R12 and R13, a 3.3V power supply is coupled to a Vcc terminal of the MCU, and a ground terminal quality inspection connection capacitor C1 (C1 parameter is 1uF/25V in the figure) but the server power supply usually involves multiple power modules for parallel use, and if the internal 3.3V power supply of one module power supply is abnormal, other power modules cannot normally communicate with the system, which seriously reduces the reliability of the redundant power supply.

Based on this, the present application provides a communication isolation circuit, comprising:

The application provides a communication isolation circuit, through setting up isolation module during power failure, the disconnection is every the signal input of communication signal input to the communication signal terminal that corresponds, and then solved traditional I2C communication signal and not kept apart the reliability decline problem of handling and lead to redundant power, simple quick mutual isolation and the independent operation between power module on the I2C communication line have been realized, avoided because the communication problem of single power and lead to other power module's communication all to be in the inefficacy, promoted the reliability of whole redundant work.

In this application, it is understood that the communication processor may be a processor commonly used in the art, such as a microprocessor MCU, and the like, which is not limited in this application.

The present application is described in detail below with reference to fig. 2.

In the embodiment of the application, the communication isolation circuit is used for an I2C bus, the communication signals comprise data signals of an I2C bus and clock signals of an I2C bus, and correspondingly, the communication signal terminals comprise data signal terminals and clock signal terminals. As shown in fig. 2, the two communication signals are an SDA signal and an SCL signal, respectively, where the SDA signal refers to a data signal line of the I2C bus, and the SCL signal refers to a clock signal, which are not described herein again.

It is understood that the present application is not limited to the I2C bus, but may be used for other bus lines, etc. The isolation circuit is developed by solving the problem of the I2C bus, and can be used for communication lines similar to the I2C bus, namely, lines requiring two communication signals to complete signal interaction can be used for the isolation circuit, and the isolation circuit is not described in detail in the application.

It is obvious to those skilled in the art that, in the embodiment of the present application, the 3.3V power line in fig. 2 includes two power lines, but both the two power lines are led from the same power source, that is, the present power source provides two 3.3V power lines and the level output of the power supply line of the MCU, which is not described herein in detail.

Specifically, in this application, the isolation module includes a first isolation unit and a second isolation unit, each of the isolation units is coupled to the power supply, and conducts the communication signal input terminal to the signal input channel of the corresponding communication signal terminal based on the high level generated by the power supply.

For example, in the present application, please continue to refer to fig. 2, the isolation module includes a first isolation unit and a second isolation unit, the first isolation unit includes a first switch element Q4 and a first diode element D3, and the second isolation unit includes a second switch element Q5 and a second diode element D4.

As shown in fig. 2, a control terminal (pin No. 2 of Q4 in fig. 2) and an input terminal (pin No. 1 of Q4 in fig. 2) of the first switching element Q4 are coupled to corresponding power supply terminals (terminal a in fig. 2), an output terminal (pin No. 3 of Q4 in fig. 2) thereof is coupled to a corresponding communication signal input terminal (SDA input terminal), an input terminal (pin No. 1 of D3 in fig. 2) of the first diode element D3 is coupled to an input terminal (pin No. 1 of Q4 in fig. 2) of the first switching element Q4 and is coupled to a corresponding communication signal terminal (SDA terminal of MCU in fig. 2, that is, pin No. 5 of MCU 828232 in fig. 2), and an output terminal (pin No. 2 of D3 in fig. 2) thereof is coupled to an output terminal (pin No. 3 of Q4) of the first switching element Q4.

In the embodiment of fig. 2, the control terminal (pin No. 2 of Q5 in fig. 2) and the input terminal (pin No. 1 of Q5 in fig. 2) of the second switching element Q5 are coupled to the first node (node M1), the output terminal (pin No. 3 of Q5 in fig. 2) thereof is coupled to the corresponding communication signal input terminal (SCL input terminal), the input terminal (pin No. 1 of D4 in fig. 2) of the second diode element D4 is coupled to the first node (node M1), and the output terminal (pin No. 2 of D4 in fig. 2) thereof is coupled to the output terminal (pin No. 3 of Q5 in fig. 2) of the second switching element Q5.

It can be understood that, in the present application, the two power source terminals are two terminals on the same power source, and it is obvious to those skilled in the art that, in the whole transmission process of the I2C communication signal, each communication isolation circuit corresponds to one power source, the server power source usually involves a plurality of power source modules connected in parallel, and in the present application, each communication isolation circuit corresponds to one power source module.

When the communication processor MCU is specifically used, when two communication signals are low level, namely the SDA signal and the SCL signal are both input low level, the control ends of the first switch element Q4 and the second switch element Q5 are both driven by 3.3V, and then the first switch element Q4 and the second switch element Q5 are conducted, the voltage of the SDA terminal and the SCL terminal of the communication processor MCU is higher than that of the SDA line input end and that of the SCL line input end, and the first switch element Q4 is conducted, so that the SDA terminal of the MCU can be pulled down by the SDA signal input end, and similarly, because the second switch element Q4 is conducted, the SCL terminal of the MCU can be pulled down by the SCL signal input end, and then the signal level of the MCU and the external I2C circuit is consistent.

When the SDA input signal and the SCL input signal are set to a high level or a floating level, since the first switching element Q4 and the second switching element Q5 are turned on by 3.3V, and since 3.3V is higher than the voltage of the SDA input signal and the SCL input signal, due to the effect of unidirectional conduction of D3 and D4, the SDA input signal terminal and the SCL input signal terminal cannot pull up the SDA terminal No. 5 pin and the SCL terminal No. 6 pin of the MCU through D3 and D4, and at this time, the 3.3V voltage can be sent out to the SDA input signal terminal and the SCL input signal terminal through the first switching element Q4 and the second switching element Q5.

Further, D3 and D4 in fig. 2 can further reduce the voltage drop when 3.3V is derived from the SDA input signal terminal and the SCL input signal terminal, specifically, 3.3V passes through the first switching element Q4 and the second switching element Q5, since the voltage drop in the tube of the conventional triode is about 0.5V, only 2.8V can be derived after passing through the first switching element Q4 and the second switching element Q5, and the requirement of the communication level 3.0V cannot be met, according to the circuit configuration in the present application, the first switching element Q4 and the first diode element D3 are connected in parallel, and the forward voltage drop of D3 is only 0.1V, so that the SDA input signal and the SCL input signal can deliver a voltage as high as 3.2V, and meet the requirement of the communication level 3.0V, thereby effectively ensuring the reliability of communication.

When the power supply 3.3V of the present application fails (i.e., no voltage is generated), the power supply line of 3.3V in the figure outputs a 0V level, and at this time, the first switching element Q4 and the second switching element Q5 are driven by a low level to be turned off, but the first diode element D3 and the second diode element D4 are in a unidirectional conduction state, and at this time, the SDA signal and the SCL signal generated by the MCU can be sent to the SDA input signal terminal and the SCL input signal terminal through D3 and D4, and meanwhile, the external high level cannot be conducted to the MCU through the SDA input signal terminal and the SCL input signal terminal, so that the damage of the power supply does not affect the normal operation of the signal levels of the communication buses SDA and SCL, and it is ensured that other power supplies can still perform normal communication reading and control requirements.

Those skilled in the art will understand that the first switching element and the second switching element of the present application may be NMOS or PMOS, and specifically, the switching elements in fig. 2 are both NMOS transistors; however, a combination of a PMOS and an inverter may be used instead of the NMOS transistor, and the application is not limited thereto.

It is obvious to those skilled in the art that, for the above embodiments, the isolation module may be defined as a parallel combination of the above switching element and a diode, and in other embodiments of the present application, the isolation module may also be other equivalent circuits, which are not described herein again.

Furthermore, in an alternative embodiment, wherein a second node is provided between the power supply terminal coupled to the power supply terminal and the power supply terminal, the communication processor further comprises a plurality of ground terminals, each coupled to a ground terminal and each coupled to the second node. The communication isolation circuit of the present application further comprises: a capacitor C2 having one end coupled to the ground terminal and the other end coupled to the second node M2.

In the present embodiment, as shown in fig. 2, the capacitor C2 plays a role of filtering, in the present application, the capacitor may be 1uF/25V, of course, the capacitance parameter is merely an example, and the present application does not limit the capacitance parameter as long as the requirement is met.

In an alternative embodiment, the first diode element and/or the second diode element is a schottky diode element. In this embodiment, the schottky diode elements D3 and D4 are mainly used to compensate for the fact that the voltage difference (0.5V) of the diode element in the switching MOS is large, which causes the SDA, the signal voltage is only about 2.8V when the SCL is at a high level, which may cause poor communication, while the forward voltage drop of the schottky diode elements D3 and D4 is only 0.1V when the current is small (about 1 mA), so the high level signal of the SDA and SCL can reach a voltage above 3.2V, which satisfies the requirement of the communication level 3.0V, and effectively ensures the reliability of communication.

In an optional embodiment, the method further comprises: a first resistor R15 coupled between the first switch element Q4 and a corresponding power supply terminal 3.3V.

In an optional embodiment, the method further comprises: the second resistor R16 is coupled between the first switch element Q4 and the corresponding communication signal input terminal SDA.

In an optional embodiment, the method further comprises: a third resistor R18 coupled between the first node M1 and the power supply terminal Vcc.

In an optional embodiment, the method further comprises: a fourth resistor R17 coupled between the second switch element Q5 and the corresponding communication signal input terminal SCL.

In some embodiments, the models of D3 and D4 in fig. 2 are SD 103AX, the models of Q4 and Q5 are 2N 7002DW, R15 is 10K Ω, R16 is 22 Ω, R16 is 22 Ω, R17 is 22 Ω, R18 is 10K Ω, and the parameters of C2 are 1uF/25V, although this application is not limited thereto, and further, the terminals No. 1-4 and No. 7 of the MCU in fig. 1 and fig. 2 are not related to the core concept of this application, and this application will not be repeated.

In the application, the first resistor, the second resistor, the third resistor, the fourth resistor and the fourth resistor have a circuit current limiting function, and a circuit can be protected from overlarge current.

It can be seen from the above technical solutions that, when a problem occurs in the internal 3.3V of a single power module (e.g. no voltage exists), the DS poles of the switches MOS Q4 and Q5 for isolation processing are always turned off, and the internal damage will not affect the normal operation of the signal levels of the communication buses SDA and SCL, thereby ensuring that other power supplies can still perform normal communication reading and control requirements. This application adopts simple and easy low-cost scheme effectively to realize I2C communication line isolation processing purpose, promotes redundancy switching power supply communication control's reliability, has avoided the high failure rate problem of traditional scheme, satisfies switching power supply trade increasingly high reliability requirement.

Further, the present application also provides a communication isolation device of an I2C bus, including the isolation circuit as described above, specifically, the isolation device further includes a housing, the isolation circuit is disposed in the housing, or the isolation device further includes a carrying platform, the isolation circuit can be exposed outside, and the present application is not limited thereto.

It can be understood that the isolating device of this application, because its isolating circuit is through setting up the isolation module during power failure, the disconnection is every communication signal input end to the signal input of the communication signal terminal that corresponds, and then solved traditional I2C communication signal and not kept apart the reliability decline problem that handles and lead to redundant power supply, the mutual isolation and the independent operation between power module on the simple quick I2C communication line of having realized, avoided leading to other power module's communication all to be in failing because the communication problem of single power supply, the reliability of whole redundant work has been promoted.

In the description herein, reference to the description of the terms "one embodiment," "a particular embodiment," "some embodiments," "for example," "an example," "a particular example," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the application. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

The above-mentioned embodiments are provided to further explain the objects, technical solutions and advantages of the present application in detail, and it should be understood that the above-mentioned embodiments are only examples of the present application and are not intended to limit the scope of the present application, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present application should be included in the scope of the present application.

Claims

1. A communication isolation circuit, comprising:

2. The communication isolation circuit of claim 1, wherein the isolation module comprises a first isolation unit and a second isolation unit; each isolation unit is coupled with the power supply and conducts the communication signal input end to a signal input channel of a corresponding communication signal terminal based on high level generated by the power supply.

3. The communication isolation circuit of claim 2, wherein the first isolation unit comprises a first switching element and a first diode element, and the second isolation unit comprises a second switching element and a second diode element;

4. The communication isolation circuit of claim 3, wherein the communication processor further comprises a plurality of ground terminals, each coupled to ground terminal and each coupled to a second node; the communication isolation circuit further comprises:

5. The communication isolation circuit according to claim 3, wherein the first diode element and/or the second diode element is a Schottky diode element.

6. The communication isolation circuit of claim 3, further comprising:

7. The communication isolation circuit of claim 3, further comprising:

8. The communication isolation circuit of claim 3, further comprising:

a third resistor coupled between the first node and the supply terminal.

9. The communication isolation circuit of claim 3, further comprising:

10. The communication isolation circuit of claim 3, wherein the communication isolation circuit is used for an I2C bus, the communication signals comprise data signals of an I2C bus and clock signals of an I2C bus, and correspondingly, the communication signal terminals comprise data signal terminals and clock signal terminals.

11. A communication isolation device comprising a communication isolation circuit as claimed in any one of claims 1 to 10.