CN216414288U - State selection circuit and receiver - Google Patents
State selection circuit and receiver Download PDFInfo
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- CN216414288U CN216414288U CN202123409931.1U CN202123409931U CN216414288U CN 216414288 U CN216414288 U CN 216414288U CN 202123409931 U CN202123409931 U CN 202123409931U CN 216414288 U CN216414288 U CN 216414288U
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Abstract
The utility model relates to a state selection circuit and a receiver. It includes: the switch SW is provided with a fixed end and two selection ends; the pre-stage switch circuit is provided with a control end, a power end and an output end, wherein the control end controls the on-off of the power end and the output end through received signals, the output end is connected with one of the selection ends A, the power end is connected with the other selection end B, and the power end is connected with a power VCC; the comparison circuit comprises a comparator U1, the inverting input end of the comparator U1 is connected with a reference voltage, and the non-inverting input end of the comparator U1 is connected with a fixed end; the rear-stage switch circuit is provided with a second-stage power supply end, a second-stage control end and a second-stage output end; the secondary control end controls the on-off of the secondary power end and the secondary output end; the secondary control end is connected with the output end of the comparator U1, the secondary power end is connected with the power VCC, and the secondary output end outputs outwards. The switch SW of the utility model is used for selecting the state, and is convenient to use.
Description
Technical Field
The present invention relates to the field of receiver technologies, and in particular, to a state selection circuit and a receiver.
Background
Currently, infant monitoring systems comprise a monitor and a receiver, the receiver mainly comprising keys, a display screen and a speaker; in the using process, when the operation is not performed for a long time, the operator can be mistakenly considered to leave, the receiver enters a standby state at the moment, and the operation is resumed when waiting for the operation; therefore, the operation is performed for several times when needed; bringing inconvenience to the use.
Disclosure of Invention
The present invention is directed to a state selection circuit, which is convenient for an operator to use and avoids unnecessary operations.
Another objective of the present invention is to provide a receiver having the above state selection circuit.
A state selection circuit, comprising:
the switch SW is provided with a fixed end and two selection ends;
the pre-stage switch circuit is provided with a control end, a power end and an output end, wherein the control end controls the on-off of the power end and the output end through received signals, the output end is connected with one of the selection ends A, the power end is connected with the other selection end B, and the power end is connected with a power VCC;
the comparison circuit comprises a comparator U1, the inverting input end of the comparator U1 is connected with a reference voltage, and the non-inverting input end of the comparator U1 is connected with a fixed end;
the rear-stage switch circuit is provided with a second-stage power supply end, a second-stage control end and a second-stage output end; the secondary control end controls the on-off of the secondary power end and the secondary output end; the secondary control end is connected with the output end of the comparator U1, the secondary power end is connected with the power VCC, and the secondary output end outputs outwards.
Further, the pre-stage switching circuit includes: the circuit comprises a PNP type triode Q2 and an NPN type triode Q3, wherein an emitting electrode of the triode Q3 is connected with a power supply VCC, and a collecting electrode of the triode Q3 is externally output through a resistor R10; the base electrode of the triode Q2 is connected with the control end, and the emitter electrode of the triode Q2 is grounded; the collector of the triode Q2 is connected with the power supply VCC through the resistor R9 and the resistor R11 in sequence; the base of the transistor Q3 is connected to the input of the resistor R9.
Furthermore, the inverting input end of the comparator U1 is connected with a voltage dividing circuit, which includes a resistor R7 and a resistor R8 connected in series; the resistor R8 is connected with a power supply VCC, the resistor R7 is grounded, and the input end of the resistor R7 is connected with the inverting input end and provides the reference voltage.
Preferably, the non-inverting input terminal of the comparator U1 is grounded through a capacitor C4 and a resistor R6 connected in parallel.
Still preferably, the resistor R6 is an adjustable resistor.
Further, the post-stage switching circuit includes: the NPN type triode Q1 and the MOS pipe Q4, the base of triode Q1 is connected with the output end of the comparator U1 through the resistor R3, the emitter of the triode Q1 is grounded, the collector of the triode Q1 is connected with the G pole of the MOS pipe Q4, the resistor R4 is connected between the S pole and the G pole of the MOS pipe Q4, the S pole is connected with the power VCC, and the D pole of the MOS pipe is output outwards.
A receiver is provided with the above-described state selection circuit.
The utility model has the beneficial effects that: the switch SW of the utility model is used for selecting the state, and is convenient to use.
Drawings
Fig. 1 is a schematic circuit diagram of the present embodiment.
Detailed Description
The following detailed description of the present invention is made with reference to the accompanying drawings. As shown in fig. 1.
Example (b): referring to fig. 1, a state selection circuit includes:
the switch SW is provided with a fixed end and two selection ends;
the pre-stage switch circuit is provided with a control end, a power end and an output end, wherein the control end controls the on-off of the power end and the output end through received signals, the output end is connected with one of the selection ends A, the power end is connected with the other selection end B, and the power end is connected with a power VCC;
the comparison circuit comprises a comparator U1, the inverting input end of the comparator U1 is connected with a reference voltage, and the non-inverting input end of the comparator U1 is connected with a fixed end;
the rear-stage switch circuit is provided with a second-stage power supply end, a second-stage control end and a second-stage output end; the secondary control end controls the on-off of the secondary power end and the secondary output end; the secondary control end is connected with the output end of the comparator U1, the secondary power end is connected with the power VCC, and the secondary output end outputs outwards.
The technical scheme controls the selection of the state by switching the switch SW; 1. when the fixed end is connected with the selection end A; 1) when a signal is received, the control end in the front stage switch circuit is at a high level, the power supply end is conducted with the power supply output end, the voltage of the in-phase input end of the comparator is higher than that of the reversed-phase input end, the comparator U1 outputs the high level, the second stage control end in the rear stage switch circuit receives the signal, the second stage power supply end is controlled to be conducted with the second stage output end, external power supply is achieved, and the receiver works normally; 2) when no signal is received, the control end is at 0 potential, the power supply end in the preceding stage switch circuit is not conducted with the power supply output end, and the power supply output end has no potential; the voltage of the same-phase input end of the comparator is lower than that of the reverse-phase input end, the comparator U1 does not output outwards, the secondary control end in the rear-stage switch circuit is at 0 potential, the secondary power end and the secondary output end are controlled to be not conducted, external power supply is not conducted, and the receiver enters a standby state; 2. when the fixed end is connected with the selection end B, the voltage of the in-phase input end of the comparator is higher than that of the reverse-phase input end, the comparator U1 outputs high level, the secondary control end in the rear-stage switch circuit receives signals, the secondary power end and the secondary output end are controlled to be conducted, power is supplied to the outside, and the receiver works normally; the receiver is in a working state all the time and can not enter a standby state because of whether the signal is received or not. Therefore, the state selection can be performed as needed. An operating mode or a standby mode is selected.
Further, the pre-stage switching circuit includes: the circuit comprises a PNP type triode Q2 and an NPN type triode Q3, wherein an emitting electrode of the triode Q3 is connected with a power supply VCC, and a collecting electrode of the triode Q3 is externally output through a resistor R10; the base electrode of the triode Q2 is connected with the control end, and the emitter electrode of the triode Q2 is grounded; the collector of the triode Q2 is connected with the power supply VCC through the resistor R9 and the resistor R11 in sequence; the base of the transistor Q3 is connected to the input of the resistor R9.
When a signal is input, the base of the transistor Q2 is in a high level state, the transistor Q2 is turned on, and the two ends of the resistor R11 have a potential difference, so that the transistor Q3 is turned on, and power is supplied to the outside through the resistor R10. When no signal is input, the triode Q2 is cut off, no potential difference exists between two ends of the resistor R11, the triode Q3 is cut off, and the resistor R10 does not output outwards.
Furthermore, the inverting input end of the comparator U1 is connected with a voltage dividing circuit, which includes a resistor R7 and a resistor R8 connected in series; the resistor R8 is connected with a power supply VCC, the resistor R7 is grounded, and the input end of the resistor R7 is connected with the inverting input end and provides the reference voltage.
Preferably, the non-inverting input terminal of the comparator U1 is grounded through a capacitor C4 and a resistor R6 connected in parallel.
The capacitor C4 and the resistor R6 are arranged to have a delay effect, so that delay standby can be realized, and the standby time is prolonged.
Still preferably, the resistor R6 is an adjustable resistor.
The time to enter standby can be adjusted by setting the resistor R6 as an adjustable resistor. Is convenient to use.
Further, the post-stage switching circuit includes: the NPN type triode Q1 and the MOS pipe Q4, the base of triode Q1 is connected with the output end of the comparator U1 through the resistor R3, the emitter of the triode Q1 is grounded, the collector of the triode Q1 is connected with the G pole of the MOS pipe Q4, the resistor R4 is connected between the S pole and the G pole of the MOS pipe Q4, the S pole is connected with the power VCC, and the D pole of the MOS pipe is output outwards.
The matching of a triode Q1 and a MOS tube Q4 is adopted, wherein the base electrode of the triode Q1 is connected with the output end of a comparator U1, the S pole of the MOS tube Q4 is connected with a power supply VCC, and the D pole of the MOS tube Q4 is connected with a secondary output end. When a level signal is transmitted, the base electrode potential of the triode Q1 rises, the triode Q1 is conducted, then the power supply is grounded through the resistor R4 and the triode Q1 in sequence to form a loop, the two ends of the resistor R4 have potential difference, namely the potential difference exists between the S pole and the G pole, the MOS tube Q4 is conducted, and therefore the power supply VCC is conducted to the outside.
A receiver is provided with the above-described state selection circuit.
The above description is only a preferred embodiment of the present invention, and for those skilled in the art, there are variations on the detailed description and the application scope according to the idea of the present invention, and the content of the present description should not be interpreted as a limitation to the present invention.
Claims (7)
1. A state selection circuit, characterized by: it includes:
the switch SW is provided with a fixed end and two selection ends;
the pre-stage switch circuit is provided with a control end, a power end and an output end, wherein the control end controls the on-off of the power end and the output end through received signals, the output end is connected with one of the selection ends A, the power end is connected with the other selection end B, and the power end is connected with a power VCC;
the comparison circuit comprises a comparator U1, the inverting input end of the comparator U1 is connected with a reference voltage, and the non-inverting input end of the comparator U1 is connected with a fixed end;
the rear-stage switch circuit is provided with a second-stage power supply end, a second-stage control end and a second-stage output end; the secondary control end controls the on-off of the secondary power end and the secondary output end; the secondary control end is connected with the output end of the comparator U1, the secondary power end is connected with the power VCC, and the secondary output end outputs outwards.
2. The state selection circuit of claim 1, wherein: the preceding stage switch circuit includes: the circuit comprises a PNP type triode Q2 and an NPN type triode Q3, wherein an emitting electrode of the triode Q3 is connected with a power supply VCC, and a collecting electrode of the triode Q3 is externally output through a resistor R10; the base electrode of the triode Q2 is connected with the control end, and the emitter electrode of the triode Q2 is grounded; the collector of the triode Q2 is connected with the power supply VCC through the resistor R9 and the resistor R11 in sequence; the base of the transistor Q3 is connected to the input of the resistor R9.
3. The state selection circuit of claim 1, wherein: the inverting input end of the comparator U1 is connected with a voltage division circuit, and the voltage division circuit comprises a resistor R7 and a resistor R8 which are connected in series; the resistor R8 is connected with a power supply VCC, the resistor R7 is grounded, and the input end of the resistor R7 is connected with the inverting input end and provides the reference voltage.
4. A state selection circuit according to claim 3, wherein: the non-inverting input terminal of the comparator U1 is grounded through a capacitor C4 and a resistor R6 which are connected in parallel.
5. The state selection circuit of claim 4, wherein: the resistor R6 is an adjustable resistor.
6. The state selection circuit of claim 1, wherein: the rear stage switching circuit includes: the NPN type triode Q1 and the MOS pipe Q4, the base of triode Q1 is connected with the output end of the comparator U1 through the resistor R3, the emitter of the triode Q1 is grounded, the collector of the triode Q1 is connected with the G pole of the MOS pipe Q4, the resistor R4 is connected between the S pole and the G pole of the MOS pipe Q4, the S pole is connected with the power VCC, and the D pole of the MOS pipe is output outwards.
7. A receiver, characterized by: a state selection circuit as claimed in any one of claims 1 to 6 is provided.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202123409931.1U CN216414288U (en) | 2021-12-31 | 2021-12-31 | State selection circuit and receiver |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202123409931.1U CN216414288U (en) | 2021-12-31 | 2021-12-31 | State selection circuit and receiver |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN216414288U true CN216414288U (en) | 2022-04-29 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202123409931.1U Active CN216414288U (en) | 2021-12-31 | 2021-12-31 | State selection circuit and receiver |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN216414288U (en) |
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2021
- 2021-12-31 CN CN202123409931.1U patent/CN216414288U/en active Active
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