CN216411909U - Light and small data acquisition system - Google Patents

Light and small data acquisition system Download PDF

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Publication number
CN216411909U
CN216411909U CN202123333263.9U CN202123333263U CN216411909U CN 216411909 U CN216411909 U CN 216411909U CN 202123333263 U CN202123333263 U CN 202123333263U CN 216411909 U CN216411909 U CN 216411909U
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module
radio frequency
adc
digital board
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王勇
唐承苗
黄明
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Chengdu Nengtong Technology Co ltd
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Chengdu Nengtong Technology Co ltd
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Abstract

The utility model provides a light and small data acquisition system, which comprises a radio frequency module, an instantaneous frequency measurement module and a digital board; the digital board comprises an ADC unit, an FPGA unit and a DDR storage unit; according to the utility model, through the modules, the radio frequency module is adopted to realize down conversion of radio frequency signals, the instantaneous frequency measurement module is used to obtain frequency points of the signals in real time, and the digital board can be used to independently control the central frequencies and signal attenuation of two channels of the radio frequency module in a closed loop in real time. The technology for searching and tracking frequency hopping signal frequency points is realized through linkage of the three modules. And the ADC with a lower sampling rate is used, so that the frequency hopping signal acquisition in a larger range is realized. The requirement of ADC is reduced, the requirement of storage rate is also reduced, the data volume is greatly reduced, the data export only needs to use a gigabit network, and the total data export time is not more than 2 times of the data acquisition time. The functions of economical and efficient data acquisition, storage, export, analysis and the like are realized.

Description

Light and small data acquisition system
Technical Field
The utility model belongs to the technical field of communication data acquisition, and particularly relates to a light and small data acquisition system.
Background
Signal acquisition and storage devices are commonly used for radio management or signal countermeasure. In the field of signal countermeasure, frequency hopping signals are often used for communication in order to enhance the security of the communication. Because the frequency span of the signal frequency point of the frequency hopping signal can often reach more than hundreds of MHz, in order to collect the signals, a broadband ADC is generally adopted for signal sampling, an FPGA is used for high-speed data processing, and a large-capacity storage device is used for storing the collected signals. Because the data volume of collection is great, so still need to adopt modes such as fiber interface, etc. to export the collection signal to the computer.
Broadband signal sampling, high-speed data transmission and large-capacity hard disks result in high cost, large power consumption and large volume. Such devices are not suitable for long-term signal detection by unmanned aerial vehicles.
SUMMERY OF THE UTILITY MODEL
Aiming at the defects in the prior art, the utility model provides a light and small data acquisition system, which comprises a radio frequency module, an instantaneous frequency measurement module and a digital board; the digital board comprises an ADC unit, an FPGA unit and a DDR storage unit; according to the utility model, through the modules, the radio frequency module is adopted to realize down conversion of radio frequency signals, the instantaneous frequency measurement module is used to obtain frequency points of the signals in real time, and the digital board can be used to independently control the central frequencies and signal attenuation of two channels of the radio frequency module in a closed loop in real time. The technology for searching and tracking frequency hopping signal frequency points is realized through linkage of the three modules. And the ADC with a lower sampling rate is used, so that the frequency hopping signal acquisition in a larger range is realized. The requirement of ADC is reduced, the requirement of storage rate is also reduced, the data volume is greatly reduced, the data export only needs to use a gigabit network, and the total data export time is not more than 2 times of the data acquisition time. The functions of economical and efficient data acquisition, storage, export, analysis and the like are realized.
The specific implementation content of the utility model is as follows:
the utility model provides a light and small data acquisition system, which comprises a radio frequency module, an instantaneous frequency measurement module and a digital board;
the digital board comprises an ADC unit, an FPGA unit and a DDR storage unit;
the input end of the radio frequency module receives radio frequency signals, and the radio frequency module is provided with two output ends which are connected with the ADC unit and used for outputting intermediate frequency signals; the ADC unit, the DDR storage unit and the instantaneous frequency measurement module are all connected with the FPGA unit;
the radio frequency module is also provided with an output end which is connected with the instantaneous frequency measurement module and is used for outputting a frequency measurement signal; the radio frequency module is also connected with the ADC unit through an intermediate frequency clock signal and is in control connection with the FPGA unit through a control code.
In order to better implement the present invention, further, the digital board further includes an ARM unit and an SSD storage unit;
and the ARM unit is respectively connected with the SSD storage unit and the FPGA unit.
In order to better implement the present invention, the digital board further includes an ethernet module, and the ARM unit performs data interaction connection and control signal connection with the upper computer through the ethernet module.
In order to better implement the present invention, the digital board further includes a power supply unit, and the power supply unit is respectively connected to the ADC unit, the FPGA unit, the ARM unit, the SSD storage unit, and the ethernet module.
In order to better realize the utility model, the ARM unit and the FPGA unit are in communication connection by adopting a PCIe serial port; and the ARM unit and the SSD storage unit are in communication connection by adopting an SATA (serial advanced technology attachment) serial port or an NVMe (network video Me) serial port.
In order to better implement the utility model, further, the system also comprises a GPS module; the digital board is also provided with a communication serial port and is connected with the GPS module through the communication serial port.
In order to better implement the present invention, the SSD storage unit adopts a 2TB SSD storage solid state disk.
In order to better implement the present invention, further, the bit number of the ADC unit is 14 bits.
Compared with the prior art, the utility model has the following advantages and beneficial effects:
(1) the utility model adopts the radio frequency module to realize the down conversion of radio frequency signals, uses the instantaneous frequency measurement module to obtain the frequency points of the signals in real time, and utilizes the digital board to independently control the central frequencies and the signal attenuation of two channels of the radio frequency module in real time in a closed loop manner. The technology for searching and tracking frequency hopping signal frequency points is realized through linkage of the three modules. And the ADC with a lower sampling rate is used, so that the frequency hopping signal acquisition in a larger range is realized. The requirement of ADC is reduced, the requirement of storage rate is also reduced, the data volume is greatly reduced, the data export only needs to use a gigabit network, and the total data export time is not more than 2 times of the data acquisition time. The functions of economical and efficient data acquisition, storage, export, analysis and the like are realized.
(2) The utility model innovatively adopts a GPS module, stores the acquired data in a frame mode, records information such as GPS, frequency hopping codes and the like in each frame, and is convenient for accurately restoring a signal field when analyzing afterwards.
Drawings
Fig. 1 is a detailed block diagram of the present invention.
Detailed Description
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it should be understood that the described embodiments are only a part of the embodiments of the present invention, and not all embodiments, and therefore should not be considered as a limitation to the scope of protection. All other embodiments, which can be obtained by a person skilled in the art without any inventive step based on the embodiments of the present invention, are within the scope of the present invention.
In the description of the present invention, it is to be noted that, unless otherwise explicitly specified or limited, the terms "disposed," "connected," and "connected" are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.
Example 1:
the embodiment provides a light and small data acquisition system, as shown in fig. 1, which includes a radio frequency module, an instantaneous frequency measurement module and a digital board;
the digital board comprises an ADC unit, an FPGA unit and a DDR storage unit;
the input end of the radio frequency module receives radio frequency signals, and the radio frequency module is provided with two output ends which are connected with the ADC unit and used for outputting intermediate frequency signals; the ADC unit, the DDR storage unit and the instantaneous frequency measurement module are all connected with the FPGA unit;
the radio frequency module is also provided with an output end which is connected with the instantaneous frequency measurement module and is used for outputting a frequency measurement signal; the radio frequency module is also connected with the ADC unit through an intermediate frequency clock signal and is in control connection with the FPGA unit through a control code.
The working principle is as follows: the radio frequency module is mainly used for conditioning a radio frequency input signal and generating a radio frequency signal required by the instantaneous frequency measurement module. In addition, the radio frequency module down-converts the radio frequency input signal into 2 paths of intermediate frequency signals with the bandwidth not exceeding 20MHz and the center frequency of 62.5MHz required by the digital board, and generates 1 path of 50MHz ADC (analog-to-digital converter) sampling clock signals.
The radio frequency module can adjust the local oscillator under the control of the digital board frequency hopping control code to align the local oscillator with different radio frequency points, and down-convert the band-limited radio frequency signal (the real-time bandwidth does not exceed 20 MHz) into an intermediate frequency signal. The amplitude of the signal can be adjusted through the radio frequency attenuation code and the intermediate frequency attenuation code under the control of the digital board, so that the amplitude of the signal is in an amplitude range which is most suitable for ADC acquisition.
And the instantaneous frequency measurement module receives the radio frequency signal conditioned by the radio frequency module and carries out real-time frequency measurement. The module can simultaneously carry out real-time frequency measurement on at most two strongest radio frequency signals, and frequency measurement results are alternately output to the digital board in a digital mode.
The ADC bit number of the digital board is 14 bits, and the sampling clock used by the ADC module is a 50MHz clock for outputting radio frequency signals. Since the bandwidth of the intermediate frequency signal output by the radio frequency module does not exceed 20Mhz, and the center frequency is 62.5Mhz, the ADC module actually operates in the under-sampled bandpass sampling mode.
And the intermediate frequency signal is sent to the FPGA after being sampled by the ADC and is cached to the DDR. Under the condition that two intermediate frequency channels are simultaneously acquired, the data storage rate per second can reach 200 MB/s.
And the FPGA determines whether to update the frequency hopping code of the channel 1 or the channel 2 of the radio frequency module according to a dual-channel signal tracking algorithm, so that the real-time tracking of the dual-channel frequency hopping signal is realized.
Example 2:
in this embodiment, on the basis of the above embodiment 1, in order to better implement the present invention, as shown in fig. 1, the digital board further includes an ARM unit and an SSD storage unit;
the ARM unit is respectively connected with the SSD storage unit and the FPGA unit;
the working principle is as follows: because the DDR (a volatile dynamic memory) connected to the FPGA has a limited capacity, the collected data needs to be exported to a hard disk with a larger capacity and a nonvolatile property in real time. Therefore, the ARM processor and the FPGA communicate through PCIe, collected data cached by the DDR is sent to the ARM by adopting a DMA (direct data transfer) mode, and the collected data is written into the SSD solid state disk by the ARM. The solid state disk can use SATA (serial hard disk interface) and NVMe (storage hard disk interface based on PCIe interface), the utility model adopts 2TB SATA SSD, and can realize the collection and storage time of more than 1 hour.
Other parts of this embodiment are the same as those of embodiment 1, and thus are not described again.
Example 3:
on the basis of any one of the above embodiments 1-2, as shown in fig. 1, the digital board further includes an ethernet module, and the ARM unit performs data interaction connection and control signal connection with an upper computer through the ethernet module.
The working principle is as follows: the digital board Ethernet module realizes the data export function. The data acquisition and storage device exports the stored data to an upper computer for off-line analysis through the Ethernet. The upper computer is provided with upper computer software, is connected with the light and small data acquisition equipment through the Ethernet and is used for equipment working parameter configuration, data analysis and the like.
The upper computer software mainly comprises modules of parameter setting, waveform analysis, online upgrade and the like.
And the parameter setting module is used for setting the working parameters of the module and displaying the working state and the system state in real time.
And the waveform analysis module is used for carrying out frequency spectrum analysis and waveform analysis on the acquired data. Because the data is stored in a frame mode, each frame comprises information such as GPS information, frequency hopping control codes, attenuation codes and the like, the waveform analysis can also carry out frame-by-frame analysis according to the frame and display frame header information.
And the online upgrading module is used for online upgrading the FPGA logic program and the ARM program in the FPGA.
Other parts of this embodiment are the same as any of embodiments 1-2 described above, and thus are not described again.
Example 4:
in this embodiment, on the basis of any one of the foregoing embodiments 1 to 3, in order to better implement the present invention, as shown in fig. 1, the digital board further includes a power supply unit, and the power supply unit is respectively connected to the ADC unit, the FPGA unit, the ARM unit, the SSD storage unit, and the ethernet module.
Other parts of this embodiment are the same as any of embodiments 1 to 3, and thus are not described again.
Example 5:
in this embodiment, on the basis of any one of the above embodiments 1 to 4, in order to better implement the present invention, as shown in fig. 1, the present invention further includes a GPS module; the digital board is also provided with a communication serial port and is connected with the GPS module through the communication serial port.
The working principle is as follows: in order to facilitate the posterior data analysis, a serial port of a GPS (global positioning system) is added in the system for receiving GPS time, and microsecond-level time precision can be realized by combining a crystal oscillator in a digital board. And when the FPGA receives the ADC collected data, information such as a time mark, a frequency hopping control code, intermediate frequency attenuation, radio frequency attenuation and the like can be marked.
Other parts of this embodiment are the same as any of embodiments 1 to 4, and thus are not described again.
The above description is only a preferred embodiment of the present invention, and is not intended to limit the present invention in any way, and all simple modifications and equivalent variations of the above embodiments according to the technical spirit of the present invention are included in the scope of the present invention.

Claims (8)

1. A light and small data acquisition system is characterized by comprising a radio frequency module, an instantaneous frequency measurement module and a digital board;
the digital board comprises an ADC unit, an FPGA unit and a DDR storage unit;
the input end of the radio frequency module receives radio frequency signals, and the radio frequency module is provided with two output ends which are connected with the ADC unit and used for outputting intermediate frequency signals; the ADC unit, the DDR storage unit and the instantaneous frequency measurement module are all connected with the FPGA unit;
the radio frequency module is also provided with an output end which is connected with the instantaneous frequency measurement module and is used for outputting a frequency measurement signal; the radio frequency module is also connected with the ADC unit through an intermediate frequency clock signal and is in control connection with the FPGA unit through a control code.
2. A lightweight compact data acquisition system as set forth in claim 1 wherein said digital board further comprises an ARM unit, an SSD storage unit;
and the ARM unit is respectively connected with the SSD storage unit and the FPGA unit.
3. The system of claim 2, wherein the digital board further comprises an ethernet module, and the ARM unit is connected to the upper computer through the ethernet module for data interaction and control signal connection.
4. The system of claim 3, wherein the digital board further comprises a power supply unit, and the power supply unit is connected to the ADC unit, the FPGA unit, the ARM unit, the SSD storage unit, and the Ethernet module, respectively.
5. The lightweight and compact data acquisition system of claim 2, wherein the ARM unit and the FPGA unit are communicatively coupled using a PCIe serial port; and the ARM unit and the SSD storage unit are in communication connection by adopting an SATA (serial advanced technology attachment) serial port or an NVMe (network video Me) serial port.
6. A lightweight and compact data acquisition system as recited in claim 1, further comprising a GPS module; the digital board is also provided with a communication serial port and is connected with the GPS module through the communication serial port.
7. The system of claim 2, wherein the SSD storage unit is a 2TB SSD storage solid state disk.
8. A lightweight and compact data acquisition system as claimed in claim 1, 2, 3, 4, 5, 6 or 7 wherein said ADC unit has 14 bits.
CN202123333263.9U 2021-12-28 2021-12-28 Light and small data acquisition system Active CN216411909U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202123333263.9U CN216411909U (en) 2021-12-28 2021-12-28 Light and small data acquisition system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202123333263.9U CN216411909U (en) 2021-12-28 2021-12-28 Light and small data acquisition system

Publications (1)

Publication Number Publication Date
CN216411909U true CN216411909U (en) 2022-04-29

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202123333263.9U Active CN216411909U (en) 2021-12-28 2021-12-28 Light and small data acquisition system

Country Status (1)

Country Link
CN (1) CN216411909U (en)

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