CN216410607U

CN216410607U - On-chip light scattering point unit for wafer-level test of laser

Info

Publication number: CN216410607U
Application number: CN202123417026.0U
Authority: CN
Inventors: 唐涌波
Original assignee: Shenzhen Porphyry Photon Technology Co ltd
Current assignee: Shenzhen Porphyry Photon Technology Co ltd
Priority date: 2021-12-31
Filing date: 2021-12-31
Publication date: 2022-04-29
Anticipated expiration: 2031-12-31

Abstract

The utility model is suitable for the field of wafer level test of lasers, and provides an on-chip light scattering point unit for wafer level test of a laser, wherein the on-chip light scattering point unit is arranged in a preset understanding area or outside the preset understanding area of the laser, the laser comprises a lower doped dielectric layer, an active layer, a ridge-shaped doping layer and an upper electrode layer which are sequentially arranged from bottom to top, and the on-chip light scattering point unit comprises an on-chip light scattering point lower doped dielectric layer, an on-chip light scattering point active layer and an on-chip light scattering point ridge-shaped doping layer which are sequentially arranged from bottom to top and are respectively connected with the lower doped dielectric layer, the active layer and the ridge-shaped doping layer. The method aims to solve the technical problem that in the prior art, the laser test is realized by arranging a special scattering point or a reflection inclined plane on a light path of the laser, and the structure and the working state of the laser are influenced.

Description

On-chip light scattering point unit for wafer-level test of laser

Technical Field

The utility model belongs to the field of laser wafer level testing, and particularly relates to an on-chip light scattering point unit for laser wafer level testing.

Background

Wafer level testing is a key method for reducing the testing cost of a laser chip, wherein, in order to test the spectral characteristics of a laser, part of emergent light of the laser must be collected and guided into a spectrometer, which can be realized by arranging a special scattering point or a reflection inclined plane on a light path of the emergent light of the laser, and the difficulty lies in how to improve the collection efficiency as much as possible on the premise of not influencing the structure and the working state of the laser.

SUMMERY OF THE UTILITY MODEL

The utility model aims to provide an on-chip light scattering point unit for wafer-level testing of a laser, and aims to solve the technical problem that the structure and the working state of the laser are influenced when the laser is tested in the prior art by arranging a special scattering point or a reflection inclined plane on a light path of light emitted by the laser.

The utility model is realized in such a way that the on-chip light scattering point unit for the wafer-level test of the laser is arranged in a preset understanding area or outside the preset understanding area of the laser, the laser comprises a lower doped dielectric layer, an active layer, a ridge-shaped doping layer and an upper electrode layer which are sequentially arranged from bottom to top, and the on-chip light scattering point unit comprises an on-chip light scattering point lower doped dielectric layer, an on-chip light scattering point active layer and an on-chip light scattering point ridge-shaped doping layer which are sequentially arranged from bottom to top and are respectively connected with the lower doped dielectric layer, the active layer and the ridge-shaped doping layer.

The further technical scheme of the utility model is as follows: the active layer is a multi-quantum well active layer; the light scattering point active layer on the chip is a light scattering point multiple quantum well active layer on the chip.

The further technical scheme of the utility model is as follows: and surface etching gratings are arranged on the ridge type doping layer and the ridge type doping layer of the on-chip light scattering points.

The further technical scheme of the utility model is as follows: the lower doped dielectric layer and the upper light scattering point lower doped dielectric layer are integrally formed.

The further technical scheme of the utility model is as follows: the active layer and the on-chip light scattering point active layer are integrally formed.

The further technical scheme of the utility model is as follows: the ridge-type doping layer and the on-chip light scattering point ridge-type doping layer are integrally formed.

The utility model has the beneficial effects that: the on-chip light scattering point unit is completely compatible with the manufacturing process of the laser, can be connected seamlessly, is simple to manufacture and does not need additional process steps; the structure is compact, the emergent light of the laser can be directionally scattered to a detection space above the preset space, the interference to the laser is small, and the scattered light can accurately represent the spectral characteristics of the actual laser.

Drawings

Fig. 1 is a structural diagram of an on-chip light scattering point unit for a laser wafer level test according to an embodiment of the present invention.

Detailed Description

Reference numerals: 1-lower doped dielectric layer 2-active layer 3-ridge type doped layer 4-upper electrode layer 5-upper doped dielectric layer 6-upper light scattering point active layer 7-upper light scattering point ridge type doped layer 8-surface etching grating.

Fig. 1 shows an on-chip light scattering point unit for wafer level testing of a laser provided by the present invention, the on-chip light scattering point unit is disposed in a preset understanding region or outside the preset understanding region of the laser, the laser includes a lower doped dielectric layer 1, an active layer 2, a ridge-type doped layer 3 and an upper electrode layer 4, which are sequentially disposed from bottom to top, the on-chip light scattering point unit includes an on-chip light scattering point lower doped dielectric layer 5, an on-chip light scattering point active layer 6 and an on-chip light scattering point ridge-type doped layer 7, which are sequentially disposed from bottom to top and are respectively connected to the lower doped dielectric layer 1, the active layer 2 and the ridge-type doped layer 3; the active layer 2 is a multi-quantum well active layer; the on-chip light scattering point active layer 6 is an on-chip light scattering point multi-quantum well active layer; surface etching gratings 8 are arranged on the ridge type doping layer 3 and the ridge type doping layer 7 of the light scattering points on the wafer; the lower doped dielectric layer 1 and the upper light scattering point lower doped dielectric layer 5 are integrally formed; the active layer 2 and the on-chip light scattering point active layer 6 are integrally formed; the ridge-type doped layer 3 is integrally formed with the on-chip light scattering point ridge-type doped layer 7.

The on-chip light scattering point unit is arranged in a preset understanding area or outside the preset understanding area of the laser, can be in seamless connection with the laser, does not interfere the work of the laser, and can be used for accurately representing the spectral characteristics of the actual laser.

The laser comprises a lower doped medium layer 1, an active layer 2, a ridge-type doped layer 3 and an upper electrode 4 (a lower electrode in the figure can be defined on the back surface of a wafer or on two sides of a ridge-type waveguide), a surface etching grating 8 is formed on the ridge-type doped layer 3 and can provide complex gain modulation for the laser to realize single-mode laser with stable work, the waveguide structure of the laser is continuously extended on the light-emitting side of the laser, the upper electrode 4 is removed and a high-order surface etching grating in the region is exposed to form an on-chip light scattering point unit, so that the laser scattered by the surface etching grating 8 in the region can be transmitted to the upper space, the function of the on-chip light scattering point is realized, the scattered light can be collected by a corresponding optical fiber and fed into a spectrum analyzer to obtain spectral data, the grating and the waveguide at the on-chip light scattering point are completely consistent with the region structure of the laser, and the work of the laser cannot be influenced, the scattered light can accurately represent the spectral characteristics of the laser, after the wafer-level test is finished, cleavage is carried out along the junction of the laser and the on-chip light scattering point unit, the on-chip light scattering point unit can be completely cut off, and the cleaved laser side end face is plated with an anti-reflection film according to the design so as to realize the laser in the final shape; in addition, in order to save space on the chip, it may also be arranged to provide the cleavage plane in the light scattering region.

The on-chip light scattering point unit is completely compatible with the manufacturing process of the laser, can be connected seamlessly, is simple to manufacture and does not need additional process steps; the structure is compact, the emergent light of the laser can be directionally scattered to a detection space above the preset space, the interference to the laser is small, and the scattered light can accurately represent the spectral characteristics of the actual laser.

The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the utility model, and any modifications, equivalents and improvements made within the spirit and principle of the present invention are intended to be included within the scope of the present invention.

Claims

1. An on-chip light scattering point unit for wafer-level testing of a laser, comprising: the on-chip light scattering point unit is arranged in a preset understanding area or outside the preset understanding area of the laser, the laser comprises a lower doped dielectric layer, an active layer, a ridge-type doping layer and an upper electrode layer which are sequentially arranged from bottom to top, and the on-chip light scattering point unit comprises an on-chip light scattering point lower doped dielectric layer, an on-chip light scattering point active layer and an on-chip light scattering point ridge-type doping layer which are sequentially arranged from bottom to top and are respectively connected with the lower doped dielectric layer, the active layer and the ridge-type doping layer.

2. An on-chip light scattering dot cell according to claim 1, wherein said active layer is a multiple quantum well active layer; the light scattering point active layer on the chip is a light scattering point multiple quantum well active layer on the chip.

3. The on-chip light scattering dot unit of claim 1, wherein a surface etched grating is disposed on the ridge-type doped layer and the on-chip light scattering dot ridge-type doped layer.

4. An on-chip light scattering dot unit according to any of claims 1-3, wherein the under-doped dielectric layer is integrally formed with the on-chip light scattering dot under-doped dielectric layer.

5. An on-chip light scattering dot unit according to claim 4, wherein said active layer is integrally formed with said on-chip light scattering dot active layer.

6. The on-chip light scattering dot unit of claim 5, wherein the ridge-doped layer is integrally formed with the on-chip light scattering dot ridge-doped layer.