CN216391532U

CN216391532U - Multilayer concatenation type PCB board

Info

Publication number: CN216391532U
Application number: CN202123236103.2U
Authority: CN
Inventors: 肖静; 陈明导
Original assignee: Dongyuan GDUT Modern Industries Cooperative Innovation Institute
Current assignee: Dongyuan GDUT Modern Industries Cooperative Innovation Institute
Priority date: 2021-12-21
Filing date: 2021-12-21
Publication date: 2022-04-26
Anticipated expiration: 2031-12-21

Abstract

The utility model discloses a multilayer spliced PCB (printed circuit board), which comprises a first layer of PCB, a second layer of PCB, pins and pin header connectors, wherein the pin header connectors are arranged on the first layer of PCB, the pins are arranged at the bottom of the second layer of PCB, a plurality of pin holes which are in adaptive connection with the pins are arranged on the pin header connectors, the second layer of PCB is connected with the pin header connectors through the pins, the second layer of PCB is electrically connected with the first layer of PCB, and the first layer of PCB comprises a first circuit board main body, a USB (universal serial bus) data interface, a power socket, a switch key and a chip. According to the utility model, the first layer of PCB and the second layer of PCB are connected through the pin header and the pin header connector, so that the first layer of PCB and the second layer of PCB can be stably spliced in a multi-layer manner; the power socket on the first layer of PCB board can be electrified, and the USB data interface can be connected with the computer end to carry out programming on the chip.

Description

Multilayer concatenation type PCB board

Technical Field

The utility model relates to the technical field of PCB boards, in particular to a multilayer spliced PCB board.

Background

The PCB is called a printed circuit board, also called a printed circuit board, is an important electronic component, is a support for electronic components, and is a carrier for electrical connection of electronic components. Since it is made by electronic printing. In the conventional technology, the installation of electronic components is easily limited by the arrangement of the single-layer PCB, and the connection of circuits is easy to be unstable due to the fact that two PCBs are connected by adopting a lead wire is unreasonable. Therefore, in order to realize the convenience and the reasonableness of the multilayer spliced PCB, a set of PCB specially aiming at the multilayer spliced PCB needs to be designed.

Accordingly, the prior art is deficient and needs improvement.

SUMMERY OF THE UTILITY MODEL

The technical problem to be solved by the utility model is as follows: the multilayer spliced PCB capable of being stably connected in multiple layers is provided.

The technical scheme of the utility model is as follows: a multilayer spliced PCB comprises a first layer of PCB, a second layer of PCB, pins and pin header connectors, wherein the pin header connectors are arranged on the first layer of PCB, the pins are arranged at the bottom of the second layer of PCB, a plurality of pin holes which are in adaptive connection with the pins are arranged on the pin header connectors, the second layer of PCB is connected with the pin header connectors through the pins, and the second layer of PCB is electrically connected with the first layer of PCB;

the first layer of PCB board comprises a first circuit board main body, a USB data interface, a power socket, a switch key and a chip, the pin header connectors are arranged on the left side and the right side of the first circuit board main body, the chip is arranged between the pin header connectors on the two sides, the switch key is arranged on one side below the pin header connectors, the power socket is arranged on the other side below the pin header connectors, and the USB data interface is arranged between the switch key and the power socket.

According to the technical scheme, in the multilayer spliced PCB, the insulating layer is coated on the outer side sleeve of the pin header connector and is made of epoxy resin.

By adopting the technical scheme, in the multilayer spliced PCB, the second layer PCB comprises a second circuit board main body, a plurality of groups of solar cell modules and an electric wire wiring port, the solar cell modules are arranged on the second circuit board main body, and the electric wire wiring port is arranged below the solar cell modules.

By adopting the technical scheme, in the multilayer spliced PCB, the number of the solar battery assemblies is four, and the four solar battery assemblies are arranged on the second circuit board main body in a 2 x 2 array structure.

By adopting the technical scheme, in the multilayer spliced PCB, the first circuit board main body is further provided with the crystal oscillator, and the crystal oscillator is arranged at the side end of the chip.

By adopting the technical scheme, in the multilayer spliced PCB, the pin of the crystal oscillator is one of a linear pin, a patch pin or a broken line pin.

Compared with the prior art, the utility model has the following beneficial effects:

by adopting the technical scheme, in the multilayer spliced PCB, the first layer of PCB and the second layer of PCB are connected with the pin header connector through the pin header, so that the first layer of PCB and the second layer of PCB can be stably spliced in a multilayer manner; the power socket on the first layer of PCB board can be electrified, and the USB data interface can be connected with a computer end to program the chip with programming language; the insulating layer coats in row's needle connector outside cover, and the insulating layer can prevent to appear being connected unstablely between row's needle connector and the row needle and influence the normal use of PCB board, and the practicality is strong.

Drawings

FIG. 1 is a schematic view of the overall structure of the present invention;

FIG. 2 is a schematic diagram of a first layer PCB structure of the present invention;

FIG. 3 is a schematic diagram of a second layer PCB structure according to the present invention.

Detailed Description

The utility model is described in detail below with reference to the figures and the specific embodiments.

In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "inside", and the like indicate orientations or positional relationships based on those shown in the drawings, and are only for convenience of description and simplification of description, but do not indicate or imply that the referred device or element must have a specific orientation, be constructed in a specific orientation, and be operated, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.

As shown in fig. 1, a multilayer concatenation type PCB includes first layer PCB 1, second floor PCB 2, row needle 3 and row needle connector 4, be equipped with row needle connector 4 on the first layer PCB 1, 2 bottoms on the second floor PCB are equipped with row needle 4, be equipped with a plurality of pinholes with row needle looks adaptation connection on the row needle connector 4, second floor PCB 2 through arrange needle 3 with row needle connector 4 is connected, just second floor PCB 2 passes through electric connection with first layer PCB 1. In this embodiment, be connected through row needle 3 and row needle connector 4 between first layer PCB board 1 and the second floor PCB board 2, can improve the concatenation stability between first layer PCB board 1 and the second floor PCB board 2.

As shown in fig. 2, the first layer PCB 1 includes a first circuit board main body 10, a USB data interface 11, a power socket 12, a switch key 13 and a chip 14, the pin header connectors 4 are disposed on the left and right sides of the first circuit board main body 10, the chip 14 is disposed between the pin header connectors 4 on both sides, the switch key 13 is disposed on one side below the pin header connector 4, the power socket 12 is disposed on the other side below the pin header connector 4, and the USB data interface 11 is disposed between the switch key 13 and the power socket 12. In this embodiment, the user can power on the power socket 12, and the USB data interface 11 can be connected to the computer to program the chip 14 with programming language.

Preferably, the outer jacket of the pin header connector 4 is coated with an insulating layer (not shown), and the insulating layer is made of epoxy resin. In this embodiment, the insulating layer is disposed to prevent the unstable connection between the pin header connector 4 and the pin header 3 from affecting the normal use of the PCB.

As shown in fig. 3, preferably, the second layer PCB 2 includes a second circuit board main body 20, a plurality of groups of solar cell modules 21, and wire connection ports 22, wherein the solar cell modules 21 are disposed on the second circuit board main body 20, and the wire connection ports 22 are disposed below the solar cell modules 21. In this embodiment, the solar cell module 21 can absorb solar energy to charge, and the electric quantity inside the solar cell module 21 is released through the electric wire connection port 22.

As shown in fig. 3, the number of the solar cell modules 21 is preferably four, and the four solar cell modules are disposed on the second circuit board main body in a 2 × 2 array structure.

As shown in fig. 2, preferably, a crystal oscillator 15 is further disposed on the first circuit board main body 10, and the crystal oscillator 15 is disposed at 14 chip side ends. In this embodiment, the crystal oscillator 15 is configured to provide a clock signal to the first circuit board main body 10, so that the circuit connection is kept synchronous and errors are reduced.

As shown in fig. 2, the pin of the crystal oscillator 15 is preferably one of a straight pin, a patch pin, and a broken pin. In this embodiment, the pins of the crystal oscillator 15 are patch type pins.

The present invention is not limited to the above preferred embodiments, and any modifications, equivalent substitutions and improvements made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. The utility model provides a multilayer concatenation type PCB board which characterized in that: the PCB comprises a first layer of PCB, a second layer of PCB, pins and pin header connectors, wherein the pin header connectors are arranged on the first layer of PCB, the pins are arranged at the bottom of the second layer of PCB, a plurality of pin holes which are in adaptive connection with the pins are arranged on the pin header connectors, the second layer of PCB is connected with the pin header connectors through the pins, and the second layer of PCB is electrically connected with the first layer of PCB;

2. The multi-layer spliced PCB of claim 1, wherein: the outside cover of pin header connector coats and has the insulating layer, the insulating layer is epoxy.

3. The multi-layer spliced PCB of claim 2, wherein: the second layer PCB board includes second circuit board main part, a plurality of solar module and electric wire wiring mouth, solar module locates in the second circuit board main part, solar module below is located to the electric wire wiring mouth.

4. The multi-layer spliced PCB of claim 3, wherein: the solar cell modules are arranged in four groups, and the four groups of solar cell modules are arranged on the second circuit board main body in a 2 x 2 array structure.

5. The multi-layer spliced PCB of claim 1, wherein: the first circuit board main body is further provided with a crystal oscillator, and the crystal oscillator is arranged at the side end of the chip.

6. The multi-layer spliced PCB of claim 5, wherein: the pin of the crystal oscillator is one of a linear pin, a patch pin or a broken line pin.