CN216252672U - Power amplifier - Google Patents
Power amplifier Download PDFInfo
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- CN216252672U CN216252672U CN202122242994.6U CN202122242994U CN216252672U CN 216252672 U CN216252672 U CN 216252672U CN 202122242994 U CN202122242994 U CN 202122242994U CN 216252672 U CN216252672 U CN 216252672U
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Abstract
The present application provides a power amplifier, comprising: the input module processes the received signals by adopting a low-voltage device and outputs the processed signals; a conversion module, the conversion module comprising: the amplifying transistor unit amplifies the processed signal and outputs the amplified signal, and the diode unit is connected with the amplifying transistor unit and controls the amplifying transistor unit; and the driving module provides power driving for a load circuit connected to the power amplifier according to the amplified signal in a high-voltage state. The power amplifier is characterized in that an input module formed by a low-voltage device is arranged in the chip, so that a low-voltage analog voltage current signal can be driven at high voltage without passing through a high-voltage conversion circuit outside the chip, and the bandwidth and the response speed of the power amplifier can be greatly improved.
Description
Technical Field
The utility model relates to the technical field of signal processing, in particular to a power amplifier.
Background
The internal signal path, digital circuit, and control circuit of the SOC chip are generally implemented by low voltage devices. When the analog signal needs to be amplified into a positive signal and a negative signal to drive the industrial control motor and the motor, the on-chip analog signal needs to be converted through an off-chip high-voltage conversion circuit, and then the motor and the motor are driven by a positive power amplifier and a negative power amplifier. Fig. 1 is a schematic diagram of a high voltage power amplifier in the prior art. As shown IN fig. 1, the input terminals IN1 and IN2 of the SOC chip internal main channel analog demodulation circuit module a receive the positive signal 1 and the negative signal 2, respectively, the main channel analog demodulation circuit module a demodulates the positive signal and the negative signal and outputs the demodulated positive signal 3 and the demodulated negative signal 4 through the output terminals OUT1 and OUT2, then the main channel analog demodulation circuit module a converts the demodulated positive signal and the demodulated negative signal through the chip external high voltage conversion circuit B and outputs the converted positive signal 5 and the converted negative signal 6 through the output terminals OUT3 and OUT4, and finally the output terminal of the positive and negative power amplifier C outputs the signal 7 for controlling the motor or the motor.
However, because the traditional high-voltage conversion circuit adopts a full-high-voltage device, the equivalent input transconductance is small due to the large threshold voltage of the high-voltage device, the bandwidth is limited, and the exponential setup time stage of the amplifier is influenced, so that the response speed is slow.
It is therefore a problem to be solved to provide a power amplifier which avoids the need to be constructed with full high voltage devices and does not affect the power amplification effect.
Disclosure of Invention
The technical problem to be solved by the present invention is to provide a power amplifier, which is prevented from being formed by a full high-voltage device and does not affect the power amplification effect.
In order to solve the above problem, the present invention provides a power amplifier including: the input module processes the received signals by adopting a low-voltage device and outputs the processed signals; a conversion module, the conversion module comprising: the amplifying transistor unit amplifies the processed signal and outputs the amplified signal, and the diode unit is connected with the amplifying transistor unit and controls the amplifying transistor unit; and the driving module provides power driving for a load circuit connected to the power amplifier according to the amplified signal in a high-voltage state.
Further, the input module includes: a first input to receive a positive signal; a second input terminal that receives a negative signal; a first amplifier that processes positive signals received at the first input and negative signals received at the second input; a first output terminal that outputs the processed positive signal; a second output terminal that outputs the processed negative signal.
Further, the input module further includes: a first voltage control terminal connected to a first external power supply voltage; a second voltage control terminal connected to a second external supply voltage.
Further, the amplifying transistor unit includes: the drain/source electrode of the first NMOS transistor is connected with the first output end of the input module; and the drain/source electrode of the second NMOS transistor is connected with the second output end of the input module.
Further, the diode unit includes: a first diode having a first terminal connected to the source/drain of the first NMOS transistor and a second terminal connected to the gate of the first NMOS transistor; a second diode having a first terminal connected to the source/drain of the second NMOS transistor and a second terminal connected to the gate of the second NMOS transistor.
Further, the driving module includes: a third control terminal connected to a first external power supply voltage; a fourth control terminal connected to a second external supply voltage; a third input terminal connected to a source/drain of the first NMOS transistor; a fourth input terminal connected to a source/drain of the second NMOS transistor; and the second amplifier receives the signal post-processing of the conversion module and outputs a driving signal.
Further, the second amplifier is a positive and negative power amplifier.
According to the technical scheme, the input module formed by low-voltage devices is arranged in the chip, and then the low-voltage input is converted into high-voltage input through the amplifying transistor unit and the diode unit in the conversion module and then connected with the driving module. Because the amplifying transistor unit and the diode unit play a clamping role, the low-voltage analog voltage current signal can realize high-voltage driving without passing through a high-voltage conversion circuit outside a chip, and the bandwidth and the response speed of the power amplifier can be greatly improved.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.
Drawings
Fig. 1 is a schematic diagram of a high voltage power amplifier in the prior art.
Fig. 2 is a schematic structural diagram of a power amplifier according to an embodiment of the present invention.
Detailed Description
The following describes in detail a specific embodiment of the power amplifier according to the present invention with reference to the drawings.
Fig. 2 is a schematic structural diagram of a power amplifier according to an embodiment of the present invention. The power amplifier includes: the input module M1, the input module M1 adopts low voltage devices to process the received signals and outputs the processed signals; a transformation module M2, the transformation module M2 comprising: an amplifying transistor unit U1 and a diode unit U2, the amplifying transistor unit U1 amplifies the processed signal and outputs the amplified signal, the diode unit U2 is connected to the amplifying transistor unit U1 and controls the amplifying transistor unit U1; a driving module M3, wherein the driving module M3 provides power driving for the load circuit connected to the power amplifier according to the amplified signal under high voltage state.
In some embodiments, the input module M1 receives the output signal of an analog demodulation circuit as the input signal of the input module M1. As shown in fig. 2, the input module M1 includes: a first input terminal IN1 that receives a positive signal output by the analog demodulation circuit; a second input terminal IN2 that receives a negative signal output by the analog demodulation circuit; a first amplifier C1 processing the positive signal received at the first input terminal IN1 and the negative signal received at the second input terminal IN 2; a first output terminal 11 that outputs the processed positive signal; a second output terminal 12, which outputs the processed negative signal. The input module M1 further includes: a first voltage control terminal 13, the first voltage control terminal 13 being connected to a first external power supply voltage VPP; a second voltage control terminal 14 connected to a second external supply voltage VSS. In this embodiment, the first external power supply voltage VPP is set to 20V and the second external power supply voltage VSS is set to-20V.
The conversion module M2 shown in fig. 2 includes: an amplifying transistor unit U1 and a diode unit U2. The amplifying transistor unit U1 includes: a first NMOS transistor N1, the drain/source of the first NMOS transistor N1 being connected as the first input terminal 21 of the converting module M2 to the first output terminal 11 of the input module M1; a second NMOS transistor N2, the drain/source of which is connected as the first input terminal 22 of the switch module M2 to the second output terminal 12 of the input module M1. The diode unit U2 includes: a first diode D1, a first end D11 of the first diode D1 being connected to the source/drain of the first NMOS transistor N1 and being the first output terminal 23 of the conversion module M2, a second end D12 of the first diode D1 being connected to the gate of the first NMOS transistor N1; a second diode D2, a first end D21 of the second diode D2 is connected to the source/drain of the second NMOS transistor N2 and serves as the second input terminal 24 of the conversion module M2, and a second end D22 of the second diode D2 is connected to the gate of the second NMOS transistor N2. The gate of the second NMOS transistor N2 is connected to the gate of the first NMOS transistor N1 and to a reference voltage Vb.
The driving module M3 includes: a third control terminal 33, the third control terminal 33 being connected to the first external power supply voltage VPP; a fourth control terminal 34, said fourth control terminal 34 being connected to a second external supply voltage VCC; a third input terminal 31 connected to the source/drain of the first NMOS transistor; a fourth input terminal 32 connected to the source/drain of the second NMOS transistor; and the second amplifier C2, the second amplifier C2 receives the signal of the conversion module M2, amplifies the signal, and outputs a driving signal through an output end OUT 1. In this embodiment, the second amplifier C2 is a positive/negative power supply amplifier.
In the technical scheme, the input module M1 formed by low-voltage devices is arranged in a chip, and then the low-voltage input is converted into the high-voltage input through the amplifying transistor unit U1 and the diode unit U2 in the conversion module M2, and then the high-voltage input is connected with the driving module M3. Since the amplifying transistor unit U1 and the diode unit U2 perform a clamping function, i.e., the voltage at the input terminal of the second amplifier C2 is limited to the reference voltage Vb, the pair of input transistors of the second amplifier C2, i.e., the first NMOS transistor N1 and the second NMOS transistor N2, can be low-voltage transistors. The low-voltage transistor has smaller threshold voltage, so that equivalent input transconductance is larger, the bandwidth can be improved, the exponential establishing time of the amplifier is shortened, and the response speed is improved. The high-voltage driving can be realized by the low-voltage analog voltage current signal without passing through a high-voltage conversion circuit outside the chip, so that the bandwidth and the response speed of the power amplifier can be greatly improved.
Claims (7)
1. A power amplifier, comprising:
the input module processes the received signals by adopting a low-voltage device and outputs the processed signals;
a conversion module, the conversion module comprising: the amplifying transistor unit amplifies the processed signal and outputs the amplified signal, and the diode unit is connected with the amplifying transistor unit and controls the amplifying transistor unit;
and the driving module provides power driving for a load circuit connected to the power amplifier according to the amplified signal in a high-voltage state.
2. The power amplifier of claim 1, wherein the input module comprises:
a first input to receive a positive signal;
a second input terminal that receives a negative signal;
a first amplifier that processes positive signals received at the first input and negative signals received at the second input;
a first output terminal that outputs the processed positive signal;
a second output terminal that outputs the processed negative signal.
3. The power amplifier of claim 2, wherein the input module further comprises:
a first voltage control terminal connected to a first external power supply voltage;
a second voltage control terminal connected to a second external supply voltage.
4. The power amplifier of claim 2, wherein the amplifying transistor unit comprises:
the drain/source electrode of the first NMOS transistor is connected with the first output end of the input module;
and the drain/source electrode of the second NMOS transistor is connected with the second output end of the input module.
5. The power amplifier of claim 4, wherein the diode unit comprises:
a first diode having a first terminal connected to the source/drain of the first NMOS transistor and a second terminal connected to the gate of the first NMOS transistor;
a second diode having a first terminal connected to the source/drain of the second NMOS transistor and a second terminal connected to the gate of the second NMOS transistor.
6. The power amplifier of claim 5, wherein the driving module comprises:
a third control terminal connected to a first external power supply voltage;
a fourth control terminal connected to a second external supply voltage;
a third input terminal connected to a source/drain of the first NMOS transistor;
a fourth input terminal connected to a source/drain of the second NMOS transistor;
and the second amplifier receives the signal post-processing of the conversion module and outputs a driving signal.
7. The power amplifier of claim 6, wherein the second amplifier is a positive and negative supply amplifier.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202122242994.6U CN216252672U (en) | 2021-09-15 | 2021-09-15 | Power amplifier |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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CN202122242994.6U CN216252672U (en) | 2021-09-15 | 2021-09-15 | Power amplifier |
Publications (1)
Publication Number | Publication Date |
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CN216252672U true CN216252672U (en) | 2022-04-08 |
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Family Applications (1)
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CN202122242994.6U Active CN216252672U (en) | 2021-09-15 | 2021-09-15 | Power amplifier |
Country Status (1)
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CN (1) | CN216252672U (en) |
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2021
- 2021-09-15 CN CN202122242994.6U patent/CN216252672U/en active Active
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