CN216248804U - Quick response high isolation program control matrix switch - Google Patents

Abstract

The application discloses programmable matrix switch is kept apart to quick response height, this matrix switch includes: a shell and a switch group; a shielding structure is arranged in the shell and divides the interior of the shell into a plurality of chambers, wherein the first chamber is positioned in the middle area of the interior of the shell, and the plurality of second chambers are distributed between the outer side of the first chamber and the inner wall of the shell; the switch group comprises a first switch and a second switch, the first switch is arranged in the first cavity, the second switch is arranged in the second cavity, one end of the second switch is arranged at the input end of the matrix switch, the other end of the second switch is connected to the input end of the first switch, and the output end of the first switch is arranged at the output end of the matrix switch. Through the technical scheme in this application, improved matrix switch's isolation and interference killing feature, effectively promoted matrix switch's program control distance and passageway switching efficiency.

Description

Quick response high isolation program control matrix switch

Technical Field

The application relates to the technical field of electronic devices, in particular to a fast-response high-isolation program-controlled matrix switch.

Background

The matrix switch network is an important component of an automatic test system, is responsible for controlling the flow direction of signals, and is the key of the interface design for realizing automatic test. In the automatic test equipment, the switches are generally divided into a power switch, a signal switch (matrix switch) and a microwave switch, wherein the power switch is generally used for switching a power supply of the system, the matrix switch and the microwave switch are mainly used for switching signals, and test resources of the system are flexibly distributed according to the measurement requirements of an actual terminal.

Currently, a signal switch system in an automatic test equipment generally consists of two or more matrix switches, which are connected to each other according to various interface standards to form flexible switching from a test resource to a terminal.

The matrix switch in the prior art generally has the following problems:

1) because radio communication equipment is various, radio signals are spread in the air, interference signals are more complicated, the source direction of the interference signals needs to be quickly and effectively positioned in the positioning process of the interference signals, and most of the existing direction-finding antennas are in a group array form, so that a matrix switch with high isolation and quick switching is needed. However, most of the existing matrix switches are designed based on a multi-purpose power division circuit, the circuit structure design is complex, the generation cost is high, and the price is high.

2) The existing matrix switch circuit is short in control distance and cannot meet the arrangement requirement of remote equipment. And the existing matrix switch is directly designed by adopting a universal switch chip, so that the defect of insufficient isolation exists.

3) The existing matrix switch can not meet the requirement of broadband, and the corresponding characteristic of frequency is not good.

SUMMERY OF THE UTILITY MODEL

The purpose of this application lies in: at least one of the problems with the matrix switch described above is solved.

The technical scheme of the application is as follows: there is provided a fast response high isolation programmable matrix switch, the matrix switch comprising: a shell and a switch group; a shielding structure is arranged in the shell and divides the interior of the shell into a plurality of chambers, wherein the first chamber is positioned in the middle area of the interior of the shell, and the plurality of second chambers are distributed between the outer side of the first chamber and the inner wall of the shell; the switch group comprises a first switch and a second switch, the first switch is arranged in the first cavity, the second switch is arranged in the second cavity, one end of the second switch is arranged at the input end of the matrix switch, the other end of the second switch is connected to the input end of the first switch, and the output end of the first switch is arranged at the output end of the matrix switch.

In any of the above technical solutions, further, the first switch is a multiple-way gating switch, the second switch is a Pin switch, and the Pin switch and the multiple-way gating switch are connected in a radio frequency manner.

In any one of the above technical solutions, further, the matrix switch further includes: the circuit comprises a switch control module, a decoder, a charge pump, a TTL level conversion circuit and a communication interface; the communication interface is arranged at a signal receiving end of the matrix switch and is sequentially connected with the TTL level conversion circuit, the charge pump, the decoder and the switch control module in series; the control output end of the switch control module is electrically connected to one end of the control line, the other end of the control line sequentially connects the control ends of the second switches in series, the other end of the control line is also electrically connected to the control end of the first switch, and the switch control module is used for controlling the on-off of the first switch and the second switch.

In any one of the above technical solutions, further, the matrix switch further includes: a plurality of EMI capacitor sets; the EMI capacitor bank at least comprises two EMI capacitors connected in series, wherein the first EMI capacitor bank is connected in series with a control line and used for conducting interference isolation on the control line, the second EMI capacitor bank is connected in series with a power line of the matrix switch and used for conducting interference isolation on the power line of the matrix switch.

In any one of the above technical solutions, further, the matrix switch further includes: a voltage stabilizing and noise reducing circuit; the voltage stabilizing and noise reducing circuit is arranged between the communication interface and the TTL level conversion circuit.

In any of the above technical solutions, further, the second switch is a single-pole double-throw switch, a moving end of the second switch is electrically connected to the first switch, a first fixed end of the second switch is electrically connected to the interference direction-finding antenna, a second fixed end of the second switch is electrically connected to one end of the isolation resistor, and the other end of the isolation resistor is grounded, wherein the second switch is linked with the first switch.

In any one of the above technical solutions, further, the matrix switch further includes: a preselection circuit and an equalization circuit; the preselection circuit and the equalization circuit are connected in series and then are arranged at the output end of the matrix switch, the preselection circuit comprises eight filters, the eight filters are equally divided into two groups, two sides of each group of filters are respectively and electrically connected with a one-out-of-four switch, the one-out-of-four switch is used for controlling the conduction of the filters, and the filters are used for filtering output signals of the first switch; the input end and the output end of the equalizing circuit are respectively connected with a grounding resistor in series, and the equalizing circuit is used for performing frequency compensation on the filtered output signal of the first switch.

In any one of the above technical solutions, further, the equalizing circuit specifically includes: the three-phase equalizing circuit comprises four resistors, two capacitors and two inductors, wherein a first resistor R1 and a second resistor R2 are connected with two ends of the equalizing circuit respectively after being connected in series, one end of a third resistor R3 is electrically connected between the first resistor R1 and the second resistor R2, the other end of the third resistor R3 is electrically connected with one end of a first capacitor C1 and one end of a first inductor L1 respectively, the other end of the first capacitor C1 and the other end of a first inductor L1 are grounded, a fourth resistor R4 is connected with two ends of the first resistor R1 and the second resistor R2 after being connected in series in parallel, and a second capacitor C2 is connected with two ends of the fourth resistor R4 after being connected in series with the second inductor L2 in parallel.

In any one of the above technical solutions, further, the matrix switch further includes: an amplifying circuit; the amplifying circuit is connected in series between the one-out-of-four switch and the equalizing circuit, and the amplifying circuit is used for amplifying the filtered output signal of the first switch.

In any one of the above technical solutions, further, the matrix switch further includes: an output capacitor; the output capacitor is arranged between the pre-selection circuit and the output end of the matrix switch, and the output capacitor is used for filtering output signals of the matrix switch.

The beneficial effect of this application is:

technical scheme in this application sets up shielding structure in the casing, provides an individual cavity for every switch, through the mode that physics is kept apart, keeps apart the radiation interference in the matrix switch, increases the isolation of each switch in the matrix switch. The first switch and the second switch are arranged by grading the switches, and the multistage EMI capacitors are connected in series on the control lines and the power lines of the switches, so that the sectional filtering of a bandwidth circuit is realized, and the low noise and anti-interference performance of the matrix switch are optimized.

In the preferred implementation mode of the application, a mode that a hardware charge pump is used for increasing the line voltage of the switch control signal is adopted, the purpose of enhancing the line transmission distance is achieved, and the problem of long-distance program control of the matrix switch is solved.

In a preferred implementation manner of the application, a preselection circuit and an equalization circuit are arranged at the output end of a matrix switch, filtering and frequency compensation are carried out on output signals of the matrix switch, and the consistency of attenuation characteristics of 12 octaves from 0.5G to 6G is realized, so that the consistency of the corresponding characteristics of the overall frequency of the matrix switch is kept, and direction-finding amplitude errors caused by interference of different frequencies are reduced.

Drawings

The advantages of the above and/or additional aspects of the present application will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:

FIG. 1 is a schematic diagram of a fast response high isolation programmable matrix switch according to one embodiment of the present application;

FIG. 2 is a top view of a housing according to one embodiment of the present application;

FIG. 3 is a front view of a housing according to one embodiment of the present application;

FIG. 4 is a schematic block diagram of a matrix switch control circuit according to one embodiment of the present application;

FIG. 5 is a schematic diagram of an interference classification mask according to an embodiment of the present application;

FIG. 6 is a schematic diagram of a fast response high isolation programmable matrix switch according to another embodiment of the present application;

FIG. 7 is a schematic diagram of an equalization circuit according to one embodiment of the present application;

FIG. 8 is a diagram of cascading noise figure simulation results according to one embodiment of the present application.

Detailed Description

In order that the above objects, features and advantages of the present application can be more clearly understood, the present application will be described in further detail with reference to the accompanying drawings and detailed description. It should be noted that the embodiments and features of the embodiments of the present application may be combined with each other without conflict.

In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present application, however, the present application may be practiced in other ways than those described herein, and therefore the scope of the present application is not limited by the specific embodiments disclosed below.

As shown in fig. 1 to fig. 3, the present embodiment provides a fast-response high-isolation programmable matrix switch, which is suitable for performing radio direction finding, so as to provide guarantee for the anti-interference performance of unmanned ship communication, meet the requirement of radio direction finding precision, and implement high isolation, low noise, broadband, and remote program control.

The matrix switch includes: a housing 10 and a switch group; a shielding structure is arranged inside the shell 10, and divides the inside of the shell 10 into a plurality of chambers, wherein the first chamber 12 is located in the middle area inside the shell 10, and the plurality of second chambers 11 are distributed between the outer side of the first chamber 12 and the inner wall of the shell 10;

specifically, by arranging a shielding structure to perform cavity-dividing design, the space in the housing 10 is divided into a first cavity 12 and a plurality of second cavities 11, so that not only can analog signals, digital signals, useful signals and interference signals be separated and processed in a physical isolation manner, and mutual crosstalk is prevented; and the interference among the switches in the switch group can be filtered and shielded, so that the overall isolation of the matrix switch is improved.

In this embodiment, the switch group includes a first switch 23 and a second switch 21 to form a multi-stage cascade switch circuit, where the first switch 23 is disposed in the first chamber 12, the second switch 21 is disposed in the second chamber 11, one end of the second switch 21 is disposed at the input end of the matrix switch and is used for being connected to the interference direction-finding antenna, the other end of the second switch 21 is connected to the input end of the first switch 23, and the output end of the first switch 23 is disposed at the output end of the matrix switch.

In this embodiment, the first switch 23 is a multiple-way gating switch, the second switch 21 is a Pin switch, and the Pin switch and the multiple-way gating switch are connected in a radio frequency manner.

As shown in fig. 4, in a preferred implementation manner of this embodiment, the matrix switch further includes: the circuit comprises a switch control module, a decoder, a charge pump, a TTL level conversion circuit and a communication interface; the communication interface is arranged at a signal receiving end of the matrix switch, the communication interface is sequentially connected with the TTL level conversion circuit, the charge pump, the decoder and the switch control module in series, a control output end of the switch control module is electrically connected with one end of a control line 22, the other end of the control line 22 sequentially connects the control end of the second switch 21 in series, the other end of the control line 22 is also electrically connected with the control end of the first switch 23, the switch control module is used for controlling the on-off of the first switch 23 and the second switch 21, the decoder is a 3-8 decoder, and the first switch 23 is an eight-out switch.

Specifically, the output end of the communication interface is electrically connected to the input end of the TTL level switching circuit, and the communication interface is used for receiving a switch control signal; the output end of the TTL level conversion circuit is electrically connected with the input end of the charge pump, and the TTL level conversion circuit is used for carrying out level conversion on the received switch control signal; the output end of the charge pump is electrically connected with the input end of the decoder, and the charge pump is used for increasing the line voltage of the switch control signal after level conversion; the output end of the decoder is electrically connected with the input end of the switch control module, and the decoder is used for decoding the switch control signal after the voltage is boosted; and finally, the on-off control of the first switch 23 and the second switch 21 is realized by the switch control module.

In the embodiment, the CMOS level at the communication interface is converted into the RS232 level by setting the TTL level conversion circuit, and then the line voltage is boosted by using the hardware charge pump instead of adopting a communication protocol mode, so that the line transmission control distance is effectively increased, and the minimum transmission distance can reach 30 m.

It should be noted that, in general, the control interface of the matrix switch is directly controlled by TTL/CMOS level, and the control delay is short but the transmission distance is short, which is not suitable for remote program control application. If a communication protocol is adopted, although the communication distance can be increased, micro processors such as an MCU (microprogrammed control unit) and the like are also required to be added in the matrix switch, the time delay of the matrix switch is also increased, and the matrix switch is not suitable for application of a high-speed matrix switch.

Therefore, in the embodiment, the line voltage of the switch control signal is increased by increasing the hardware charge pump, the purpose of enhancing the line transmission distance is realized, and the problem of remote program control of the matrix switch is solved.

Preferably, the matrix switch further comprises: a voltage stabilizing and noise reducing circuit; the voltage stabilizing and noise reducing circuit is arranged between the communication interface and the TTL level conversion circuit.

Preferably, the matrix switch further comprises: a hot plug protection circuit; the hot plug protection circuit is arranged between the communication interface and the voltage stabilizing and noise reducing circuit, and the stability of the matrix switch is improved.

Further, the matrix switch in this embodiment further includes: a plurality of EMI capacitor sets; the EMI capacitor bank comprises at least two EMI capacitors connected in series, wherein the first EMI capacitor bank is connected in series to the control line 22, and is used for conducting interference isolation to the control line 22, the second EMI capacitor bank is connected in series to the power line of the matrix switch, and the second EMI capacitor bank is used for conducting interference isolation to the power line of the matrix switch.

Specifically, the interference path in the matrix switch is mainly divided into conducted interference and radiated interference, so that in this embodiment, two interference isolation methods, namely a shielding structure and an EMI capacitor, are adopted to respectively suppress the radiated interference and the conducted interference, where one EMI capacitor suppresses 40dB at least in a 3GHz bandwidth range.

Specifically, as shown in fig. 5, the interior of the housing 10 is divided into chambers by a shielding structure, the first chamber 12 is used as the shielding layer 1 to perform the isolation protection of radiation interference on the first switch 23, the second chamber 11 is used as the shielding layer 2 to perform the isolation protection of primary radiation interference on the second switch 21, and the first switch 23 is subjected to the isolation protection of secondary radiation interference, so that the influence of radiation interference on the first switch 23 and the second switch 21 is greatly reduced.

Meanwhile, a plurality of groups of EMI capacitor groups are respectively connected in series on the control line 22 and the power line of the matrix switch to isolate conducted interference, however, because the suppression capability of each EMI capacitor device on the conducted interference is limited, generally 40dB, a multi-stage conduction filtering mode is adopted, at least two EMI capacitors are connected in series, one-time conduction filtering reaches 40dB, and the accumulation of secondary conduction filtering can reach 80dB, so that the suppression capability of the conducted interference is improved.

In the embodiment, through the mode of combining single shielding with multistage conduction filtering, the radiation signals introduced from the power supply and the control signal line can be inhibited by more than 80dB, and the inhibition of most frequency bands reaches 120 dB.

For the isolation of interference between channels, the second switch 21 in this embodiment is a single-pole double-throw switch, a moving end of the second switch 21 is electrically connected to the first switch 23, a first fixed end of the second switch 21 is electrically connected to the interference direction-finding antenna, a second fixed end of the second switch 21 is electrically connected to one end of an isolation resistor, and the other end of the isolation resistor is grounded, wherein the isolation resistor is 50 ohms, the second switch 21 is linked with the first switch 23, and the same set of control signals is adopted, that is, the first switch 23 opens one channel, the corresponding moving end of the second switch 21 acts, and also opens one channel, the single-pole double-throw switch is controlled by a 3-8 decoder to realize eight states of three-wire control, the open channel of the second switch 21 is conducted, the unopened channel is switched to a 50 ohm load, and is grounded in an alternating current, and the isolation between channels is greatly enhanced.

As shown in fig. 6, since the wideband input will receive more interference, in order to avoid a point of saturation, which will result in full-band failure, in a preferred implementation manner of this embodiment, the matrix switch further includes: a preselection circuit 30 and an equalization circuit 50; the preselection circuit 30 and the equalization circuit 50 are connected in series and then are arranged at the output end of the matrix switch, the preselection circuit 30 comprises eight filters, the eight filters are equally divided into two groups, two sides of each group of filters are respectively and electrically connected with a one-out-of-four switch, the one-out-of-four switch is used for controlling the conduction of the filters, and the filters are used for filtering output signals of the first switch 23; the input end and the output end of the equalization circuit 50 are respectively connected in series with a ground resistor, and the equalization circuit 50 is used for performing frequency compensation on the filtered output signal of the first switch 23. Wherein the ground resistance is 50 ohms.

Specifically, according to the frequency range of the broadband of the signal output by the first switch 23, the bandwidth of 6GHz is cut into four segments, each segment is 1.5GHz, and a filter with corresponding filtering capability and frequency response characteristic is selected, so that the equalization circuit 50 is built by using discrete devices.

Considering that 50 ohms is the characteristic impedance of the microwave radio frequency circuit, the transmission characteristic of the high-frequency alternating current signal is optimal under the impedance of 50 ohms, therefore, 50-ohm grounding resistors are respectively connected in series at the input end and the output end of the equalizing circuit 50, and the interference isolation effect of the matrix switch is optimized in order to better ground the unused ports.

As shown in fig. 7, this embodiment shows an implementation manner of the equalization circuit 50, where the equalization circuit 50 specifically includes: the three-phase voltage balancing circuit comprises four resistors, two capacitors and two inductors, wherein a first resistor R1 and a second resistor R2 are connected in series and then are respectively connected to two ends of the balancing circuit 50, one end of a third resistor R3 is electrically connected between the first resistor R1 and the second resistor R2, the other end of the third resistor R3 is electrically connected to one end of a first capacitor C1 and one end of a first inductor L1, the other end of the first capacitor C1 and the other end of a first inductor L1 are grounded, a fourth resistor R4 is connected in parallel to two ends of the first resistor R1 and the second resistor R2 which are connected in series, the fourth resistor R4 is 74 ohms, and the second capacitor C2 and the second inductor L2 are connected in series and then are connected in parallel to two ends of the fourth resistor R4.

In the present embodiment, the parameters of one equalization circuit 50 are set as follows: the resistances of the first resistor R1 and the second resistor R2 are 50 ohms, the third resistor R3 is 76 ohms, the first capacitor C1 is 500fF, the second capacitor C2 is 5pF, the first inductor L1 is 3.3nH, and the second inductor L2 is 180 pH.

Specifically, the equalization circuit 50 is arranged to compensate the frequency in the matrix switch, and a curve with a characteristic opposite to a corresponding characteristic of the switching frequency is fitted to perform complementary cancellation, so that the consistency of the attenuation characteristic of 12 octaves from 0.5GHz to 6GHz is maintained, and the direction-finding amplitude error caused by the influence of the corresponding characteristic of the frequency on the interference of different frequencies is avoided. After the reverse compensation of the equalization circuit 50, the matrix switch in the present embodiment has a corresponding characteristic error within 1dB at a frequency of 6 GHz.

Further, the matrix switch further includes: an amplifying circuit 40; the amplifying circuit 40 is connected in series between the one-out-of-four switch and the equalizing circuit 50, and the amplifying circuit 40 is configured to amplify the filtered output signal of the first switch 23.

In this embodiment, a segmented filtering manner is adopted, and one broadband channel is artificially divided into four channels for segmented filtering, so that when a strong interference exists in a certain section of equipment, interference detection of other frequency bands is not affected, and the segmented filtering can be used as a signal preselection circuit 30 at the front stage. After the pre-selection circuit 30 filters, the signals are relatively clean, weak signals can be amplified, the amplifying circuit 40 is a low-noise amplifying circuit 40, noise generated by the amplifying circuit 40 is prevented from being introduced into a receiver system, and the advantage of amplification of a preceding stage is that the amplitude of the signals is improved, and the signals are more convenient to identify; the cable loss at the rear end can be effectively compensated, so that the noise coefficient of the whole system can be controlled to be small.

As shown in fig. 8, the first stage is a switching loss of 0.5dB, the noise factor is 0.5dB, the second stage is added with a first-stage low noise, the noise factor is 0.6dB, the gain is 15dB, the following stages are a switch, a filter and a cable loss, the cascaded noise factor of the system is 1.62dB, and the gain is 7 dB.

In this embodiment, the matrix switch further includes: an output capacitor; the output capacitor is arranged between the preselection circuit 30 and the output of the matrix switch, and the output capacitor is used for ac filtering of the output signal of the matrix switch.

The technical solution of the present application is described in detail above with reference to the accompanying drawings, and the present application provides a fast response high isolation programmable matrix switch, which includes: a shell and a switch group; a shielding structure is arranged in the shell and divides the interior of the shell into a plurality of chambers, wherein the first chamber is positioned in the middle area of the interior of the shell, and the plurality of second chambers are distributed between the outer side of the first chamber and the inner wall of the shell; the switch group comprises a first switch and a second switch, the first switch is arranged in the first cavity, the second switch is arranged in the second cavity, one end of the second switch is arranged at the input end of the matrix switch, the other end of the second switch is connected to the input end of the first switch, and the output end of the first switch is arranged at the output end of the matrix switch. Through the technical scheme in this application, improved matrix switch's isolation and interference killing feature, effectively promoted matrix switch's program control distance and passageway switching efficiency.

In the present application, the terms "mounted," "connected," "fixed," and the like are used in a broad sense, and for example, "connected" may be a fixed connection, a detachable connection, or an integral connection; "coupled" may be direct or indirect through an intermediary. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art as appropriate.

The shapes of the various elements in the drawings are illustrative and do not preclude the existence of certain differences from the actual shapes, and the drawings are used for the purpose of illustrating the principles of the present application and are not intended to limit the present application.

Although the present application has been disclosed in detail with reference to the accompanying drawings, it is to be understood that such description is merely illustrative and not restrictive of the application of the present application. The scope of the present application is defined by the appended claims and may include various modifications, adaptations, and equivalents of the subject application without departing from the scope and spirit of the present application.

Claims (10)

1. A fast response, high isolation programmable matrix switch, the matrix switch comprising: a housing (10) and a switch group;

a shielding structure is arranged in the shell (10), and divides the interior of the shell (10) into a plurality of chambers, wherein a first chamber (12) is located in the middle area of the interior of the shell (10), and a plurality of second chambers (11) are distributed between the outer side of the first chamber (12) and the inner wall of the shell (10);

the switch group comprises a first switch (23) and a second switch (21), the first switch (23) is arranged in the first cavity (12), the second switch (21) is arranged in the second cavity (11), one end of the second switch (21) is arranged at the input end of the matrix switch, the other end of the second switch (21) is connected with the input end of the first switch (23), and the output end of the first switch (23) is arranged at the output end of the matrix switch.

2. The fast response high isolation programmable matrix switch of claim 1, wherein the first switch (23) is a multiple gate switch, the second switch (21) is a Pin switch, and the Pin switch and the multiple gate switch are connected by radio frequency.

3. The fast response, high isolation programmable matrix switch of claim 1, wherein the matrix switch further comprises: the circuit comprises a switch control module, a decoder, a charge pump, a TTL level conversion circuit and a communication interface;

the communication interface is arranged at a signal receiving end of the matrix switch, and the communication interface is sequentially connected with the TTL level conversion circuit, the charge pump, the decoder and the switch control module in series;

the control output end of the switch control module is electrically connected to one end of a control line (22), the other end of the control line (22) sequentially connects the control ends of the second switches (21) in series, the other end of the control line (22) is also electrically connected to the control end of the first switch (23), and the switch control module is used for controlling the on-off of the first switch (23) and the second switch (21).

4. The fast response, high isolation programmable matrix switch of claim 3, wherein the matrix switch further comprises: a plurality of EMI capacitor sets;

the EMI capacitance group at least comprises two EMI capacitances connected in series, wherein a first group of EMI capacitance group is connected in series on the control line (22) and is used for conducting interference isolation on the control line (22),

and the second group of EMI capacitor sets are connected in series on the power supply line of the matrix switch, and are used for conducting interference isolation on the power supply line of the matrix switch.

5. The fast response, high isolation programmable matrix switch of claim 3, wherein the matrix switch further comprises: a voltage stabilizing and noise reducing circuit;

the voltage stabilizing and noise reducing circuit is arranged between the communication interface and the TTL level conversion circuit.

6. The fast response high isolation programmable matrix switch according to claim 1, wherein the second switch (21) is a single-pole double-throw switch, a moving end of the second switch (21) is electrically connected to the first switch (23), a first fixed end of the second switch (21) is electrically connected to the jamming direction-finding antenna, a second fixed end of the second switch (21) is electrically connected to one end of an isolation resistor, and the other end of the isolation resistor is grounded, wherein the second switch (21) is linked with the first switch (23).

7. The fast response, high isolation programmable matrix switch of claim 1, wherein the matrix switch further comprises: a pre-selection circuit (30) and an equalization circuit (50);

the preselection circuit (30) and the equalization circuit (50) are connected in series and then are arranged at the output end of the matrix switch, the preselection circuit (30) comprises eight filters which are divided into two groups, two sides of each group of filters are respectively and electrically connected with a one-out-of-four switch, the one-out-of-four switch is used for controlling the conduction of the filters, and the filters are used for filtering output signals of the first switch (23);

the input end and the output end of the equalizing circuit (50) are respectively connected in series with a ground resistor, and the equalizing circuit (50) is used for performing frequency compensation on the filtered output signal of the first switch (23).

8. The fast response, high isolation programmable matrix switch of claim 7, wherein the equalization circuit (50) specifically comprises: four resistors, two capacitors, and two inductors, wherein,

the first resistor R1 and the second resistor R2 are connected in series and then are respectively connected with two ends of the equalizing circuit (50),

one end of a third resistor R3 is electrically connected between the first resistor R1 and the second resistor R2, the other end of the third resistor R3 is electrically connected to one end of a first capacitor C1 and one end of a first inductor L1, the other end of the first capacitor C1 and the other end of the first inductor L1 are grounded,

the fourth resistor R4 is connected in parallel with two ends of the first resistor R1 and the second resistor R2 after being connected in series,

the second capacitor C2 is connected in series with the second inductor L2 and then connected in parallel to two ends of the fourth resistor R4.

9. The fast response, high isolation programmable matrix switch of claim 7, wherein the matrix switch further comprises: an amplification circuit (40);

the amplifying circuit (40) is connected in series between the one-out-of-four switch and the equalizing circuit (50), and the amplifying circuit (40) is used for amplifying the filtered output signal of the first switch (23).

10. The fast response, high isolation programmable matrix switch according to any of claims 7 to 9, wherein the matrix switch further comprises: an output capacitor;

the output capacitor is arranged between the preselection circuit (30) and the output end of the matrix switch, and the output capacitor is used for filtering the output signal of the matrix switch.

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