CN216213515U - LED light-emitting device based on flip-chip structure - Google Patents
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Description
技术领域technical field
本实用新型涉及光通信技术领域,尤其是利用倒装LED结构解决出光效率以及散热问题,具体是一种基于倒装结构的LED发光装置。The utility model relates to the technical field of optical communication, in particular to solve the problems of light extraction efficiency and heat dissipation by using a flip-chip LED structure, in particular to an LED light-emitting device based on the flip-chip structure.
背景技术Background technique
发光二极管LED(light emitting diode,简称LED)是近几年迅速崛起的半导体固态发光器件,与传统的白炽灯、荧光灯等比较,具有体积小、耐震动性好、结构紧凑、发热少、亮度高、发光响应速度快、寿命长、工作电压低等优点。但是,在使用过程中发现,LED仍然存在一些影响应用的问题,其中最主要的就是光提取效率低的问题。导致LED光提取效率低的主要原因是LED中GaN材料和周围空气的折射率相差过大,当光线由光密介质材料GaN入射到空气时会发生全反射,为了提高GaN层与空气全反射的临界角,很多研究人员提出了不同的方法,如:表面粗化技术、亚波长光栅技术、LED倒装技术、制作蛾眼形结构的仿生技术、光子晶体技术等,其中倒金字塔型LED可以解决衬底与空气折射率差异导致的全发射,出光效率提高1.22倍。倒装LED结构可解决芯片出光效率低的问题,同时可解决散热性差的问题。较之于正装结构,通过背面发光而没有金属屏蔽从而提高其出光特性、直接金属电极散热而不是蓝宝石衬底,从而提高其散热性和可靠性。LED (light emitting diode, LED for short) is a semiconductor solid-state light-emitting device that has risen rapidly in recent years. Compared with traditional incandescent lamps and fluorescent lamps, it has the advantages of small size, good vibration resistance, compact structure, less heat generation, and high brightness. , luminous response speed, long life, low operating voltage and other advantages. However, in the process of use, it is found that there are still some problems affecting the application of LEDs, the most important of which is the problem of low light extraction efficiency. The main reason for the low light extraction efficiency of LEDs is that the refractive index difference between the GaN material in the LED and the surrounding air is too large. When the light is incident from the optically dense dielectric material GaN to the air, total reflection will occur. In order to improve the total reflection between the GaN layer and the air. For the critical angle, many researchers have proposed different methods, such as: surface roughening technology, subwavelength grating technology, LED flip-chip technology, bionic technology for making moth-eye structure, photonic crystal technology, etc. Among them, inverted pyramid LED can solve the problem of critical angle. The total emission caused by the difference in refractive index between the substrate and the air increases the light extraction efficiency by 1.22 times. The flip-chip LED structure can solve the problem of low light emitting efficiency of the chip and the problem of poor heat dissipation. Compared with the front-mounted structure, the light-emitting characteristics are improved by backside light emission without metal shielding, and the heat dissipation of direct metal electrodes instead of the sapphire substrate, thereby improving its heat dissipation and reliability.
目前市面上量产的GaN基LED主要是正装和垂直结构,LED倒装技术是将蓝宝石衬底改为出光面,这就避免了P-GaN层上电极层对光子的吸收。倒装LED结构通过背面发光而没有金属屏蔽从而提高其出光特性,较之于目前市面上量产的正装结构可解决芯片出光效率低的问题,同时可解决散热性差的问题;直接金属电极散热而不是蓝宝石衬底,从而提高其散热性和可靠性。At present, the mass-produced GaN-based LEDs on the market are mainly positive and vertical structures. The LED flip-chip technology changes the sapphire substrate into a light-emitting surface, which avoids the absorption of photons by the electrode layer on the P-GaN layer. The flip-chip LED structure improves its light-emitting characteristics through backside emission without metal shielding. Compared with the current mass-produced front-mounted structure on the market, it can solve the problem of low light-emitting efficiency and poor heat dissipation; Not a sapphire substrate, which improves its heat dissipation and reliability.
对于传统正装结构,为了提升P-GaN层的电流均匀性,在P-GaN上蒸镀金属电极用于提升电流扩展,由于金属电极由不透明材料制成,会造成金属屏蔽效应,从而造成芯片出光效率过低,此外,蓝宝石材料热导率很低,所以不利于芯片散热。正装结构LED内部横向电流扩展效应,易引起电流拥挤现象;垂直结构虽然可以解决金属电极同侧的问题,但是制备工艺复杂,产品良率低。For the traditional front-mounted structure, in order to improve the current uniformity of the P-GaN layer, metal electrodes are evaporated on the P-GaN to improve the current expansion. Since the metal electrodes are made of opaque materials, it will cause a metal shielding effect, which will cause the chip to emit light. The efficiency is too low. In addition, the thermal conductivity of the sapphire material is very low, so it is not conducive to the heat dissipation of the chip. The lateral current expansion effect inside the front-mounted structure LED is easy to cause current crowding; although the vertical structure can solve the problem of the same side of the metal electrode, the preparation process is complicated and the product yield is low.
发明内容SUMMARY OF THE INVENTION
本实用新型的目的是针对现有技术的不足,而提供一种基于倒装结构的LED发光装置。这种装置能避免金属屏蔽效应,光学参数更容易匹配,能提高LED发光效率、散热性能好。The purpose of the present invention is to provide an LED light-emitting device based on a flip-chip structure in view of the deficiencies of the prior art. The device can avoid the metal shielding effect, the optical parameters are easier to match, the LED luminous efficiency can be improved, and the heat dissipation performance is good.
实现本实用新型目的的技术方案是:The technical scheme that realizes the purpose of the present utility model is:
一种基于倒装结构的LED发光装置,包括自下而上顺序叠接的分布式布拉格反射镜DBR(Distributed Bragg Reflection,简称DBR)、氧化铟锡ITO缓冲层、P极光栅层、多量子阱MQW层、N极光栅层和蓝宝石衬底Sapphire层,在蓝宝石衬底Sapphire层朝外的上表面上设有一组呈均匀阵列状分布的呈圆锥状的SiO2锥体,其中,分别在N极光栅层、P极光栅层的外缘相同位置处分别设有N电极N-nad和P电极P-nad。An LED light-emitting device based on a flip-chip structure includes a distributed Bragg reflector DBR (Distributed Bragg Reflection, DBR for short), an indium tin oxide ITO buffer layer, a P-pole grating layer, and a multiple quantum well that are sequentially stacked from bottom to top. The MQW layer, the N-pole grating layer and the Sapphire layer of the sapphire substrate are provided with a group of conical SiO 2 cones distributed in a uniform array on the upper surface of the Sapphire layer of the sapphire substrate facing outward. An N electrode N-nad and a P electrode P-nad are respectively provided at the same positions on the outer edges of the grating layer and the P-pole grating layer.
所述呈均匀阵列状分布的呈圆锥状的SiO2锥体呈6×6阵列,其中SiO2锥体的球面直径为60nm,SiO2锥体通过有序的SiO2纳米球配合ICP刻蚀技术来纹理蓝宝石表面,在这种方法中,旋转SiO2纳米球用作牺牲干蚀刻掩模,制备圆锥型表面的蓝宝石衬底:首先,用50nm厚的聚苯乙烯PS(Polystyrene)层覆盖蓝宝石表面以固定SiO2纳米球,然后通过将其暴露于紫外线将表面亲水化辐射,在水和氨的存在下,通过在醇介质中水解四乙基原硅酸盐TEOS(Tetraethyl orthosilicate),根据方法合成单分散SiO2纳米颗粒,采用将氨、TEOS和水的浓度分别设定为0.1、17.0和0.2mol/L,将SiO2粒子的大小控制在60nm,通过SEM(Scanning Electron Microscope)测量得到的SiO2颗粒,直径为60nm的SiO2纳米球在蓝宝石表面进旋压铸造,然后在160℃退火10分钟,将SiO2纳米球嵌入SiO2层,将样品放入压力0.667Pa和Cl2(7.5sccm)和BCl3(30sccm)的混合物的多重ICP(STS)设备下进行蚀刻干,蓝宝石的蚀刻速率为100nm/min,从本质上讲,球形SiO2作为掩模通过ICP刻蚀牺牲其厚度在蓝宝石中产生不同的蚀刻深度,从而制备成圆锥型结构,从而形成了圆锥型蓝宝石衬底。The conical SiO 2 cones distributed in a uniform array form a 6×6 array, wherein the spherical diameter of the SiO 2 cone is 60nm, and the SiO 2 cone passes through the ordered SiO 2 nanospheres with ICP etching technology To texture the sapphire surface, in this method, spinning SiO2 nanospheres are used as a sacrificial dry etching mask to prepare a sapphire substrate with a conical surface: First, the sapphire surface is covered with a 50 nm-thick layer of polystyrene PS (Polystyrene) To immobilize SiO nanospheres , the surface was then hydrophilized by exposing it to UV radiation, in the presence of water and ammonia, by hydrolysis of the tetraethyl orthosilicate TEOS (Tetraethyl orthosilicate) in an alcoholic medium, according to Methods Monodisperse SiO nanoparticles were synthesized by setting the concentrations of ammonia, TEOS and water to 0.1, 17.0 and 0.2 mol/L, respectively, and controlling the size of SiO particles to 60 nm, which were measured by SEM (Scanning Electron Microscope). The SiO2 particles, SiO2 nanospheres with a diameter of 60 nm were spin-cast on the sapphire surface, and then annealed at 160 °C for 10 min, the SiO2 nanospheres were embedded in the SiO2 layer, and the samples were placed under a pressure of 0.667Pa and Cl2 ( 7.5sccm) and BCl3 (30sccm) were etched under multiple ICP (STS) equipment, the etch rate of sapphire was 100nm/min, essentially, spherical SiO2 was used as a mask to sacrifice its thickness by ICP etching Different etching depths are produced in the sapphire to prepare a conical structure, thereby forming a conical sapphire substrate.
所述蓝宝石衬底Sapphire层的厚度为100-600nm。The thickness of the Sapphire layer of the sapphire substrate is 100-600 nm.
优选地蓝宝石衬底Sapphire层的厚度为130nm,蓝宝石衬底层的厚度对表面光栅倒装LED光提取效率有影响,蓝宝石衬底厚度对表面光栅倒装LED光提取效率的影响与N-GaN层厚度对表面光栅光提取效率的影响是类似的,都是因为蓝宝石衬底厚度对F-P腔驻波、光栅与导模的耦合强度有影响,当蓝宝石衬底厚度为130nm时,由于光栅与LED中导模的耦合作用强,所以更多的导模被引导到LED的光提取角中,使得更多的能量被提取出来。Preferably, the thickness of the Sapphire layer of the sapphire substrate is 130 nm. The thickness of the sapphire substrate layer has an influence on the light extraction efficiency of the surface grating flip-chip LED. The influence of the sapphire substrate thickness on the light extraction efficiency of the surface grating flip-chip LED is related to the thickness of the N-GaN layer. The influence on the light extraction efficiency of the surface grating is similar, all because the thickness of the sapphire substrate has an influence on the F-P cavity standing wave, the coupling strength of the grating and the guided mode. The coupling effect of the modes is strong, so more guided modes are guided into the light extraction angle of the LED, so that more energy is extracted.
所述N极光栅层为N-GaN层,N-GaN层的厚度为100nm,当蓝宝石衬底Sapphire层的厚度在100-600nm之间以10nm为间隔均匀变化时,表面光栅倒装LED光提取效率出现周期性振荡,但是振荡峰却随着厚度的增加而减小,光提取效率从厚度等于100nm时的30.98%下降到厚度等于600nm时的25.86%,只有N-GaN层厚度为100nm时,光栅与LED内导模的耦合强度最大。The N-pole grating layer is an N-GaN layer, and the thickness of the N-GaN layer is 100 nm. When the thickness of the Sapphire layer of the sapphire substrate varies uniformly at intervals of 10 nm between 100 and 600 nm, the surface grating flip-chip LED light is extracted. The efficiency oscillates periodically, but the oscillation peak decreases as the thickness increases, and the light extraction efficiency decreases from 30.98% when the thickness is equal to 100 nm to 25.86% when the thickness is equal to 600 nm. Only when the thickness of the N-GaN layer is 100 nm, The coupling strength between the grating and the guided mode in the LED is the highest.
所述P极光栅层为P-GaN层,P-GaN层的厚度为100-300nm。The P-pole grating layer is a P-GaN layer, and the thickness of the P-GaN layer is 100-300 nm.
优选地P-GaN层的厚度为220nm,当P-GaN层的厚度在100~300nm之间以10nm为间隔均匀变化时,倒装LED和表面光栅倒装LED光提取效率均呈周期性变化,当P-GaN层为220nm时,倒装LED和表面光栅LED的光提取效率均达到最大。Preferably, the thickness of the P-GaN layer is 220 nm. When the thickness of the P-GaN layer is uniformly changed at intervals of 10 nm between 100 and 300 nm, the light extraction efficiency of the flip-chip LED and the surface grating flip-chip LED changes periodically. When the P-GaN layer is 220 nm, the light extraction efficiency of both the flip-chip LED and the surface grating LED reaches the maximum.
N极光栅层和P极光栅层,均采用金属光栅结构,不仅可以有效的提高LED内量子效率,而且可以增强外量子效率,氮化镓(GaN)是一种无机物,是氮和镓的化合物,是一种直接能隙(direct bandgap)的半导体,可以用在高功率、高速的光电元件中,LED模型采用GaN光栅。Both the N-pole grating layer and the P-pole grating layer use metal grating structures, which can not only effectively improve the internal quantum efficiency of LEDs, but also enhance the external quantum efficiency. Gallium Nitride (GaN) is an inorganic substance, which is composed of nitrogen and gallium. The compound, a direct bandgap semiconductor, can be used in high-power, high-speed optoelectronic components, and the LED model uses GaN gratings.
所述N电极N-nad由蒸镀金属制作成N型电极,材质为砷或锑或磷。The N-electrode N-nad is made of vapor-deposited metal into an N-type electrode, and the material is arsenic, antimony or phosphorus.
所述P电极P-nad由蒸镀金属制作成P型电极,材质为硼或铟或镓,作为LED注入电流端。The P electrode P-nad is made of vapor-deposited metal into a P-type electrode, and the material is boron, indium or gallium, and is used as the LED injection current terminal.
所述分布式布拉格反射镜DBR是一种特殊全电介质反射膜,通常由交替层叠的两种高低折射率的化合物组成,以在空间的一个维度上产生折射率的周期性调制,产生强烈的干扰现象,并在一定波长范围内实现选择性光反射,折射率高的氧化膜有ZnO、TiO2、Ta2O5、Nb2O5、ZrO2、SiO2、HfO2、MgO等,SiO2是膜性最好的最低折射率材料,并且SiO2不易分解,因此是制镀所需最佳的低折射率薄膜,其中TiO2的折射率高、折射率n≈2.5,机械强度也较高,但是它在全波段都是透明的,与SiO2结合可以降低光的吸收及散射性,是比较优良的高低折射率材料,DBR采用蒸镀的方法制作:首层为SiO2,末层也为SiO2,中间有TiO2和SiO2交叉构成,所以就形成衬底SiO2-TiO2和SiO2-SiO2的结构,此结构的反射区域的波宽随高低折射率材料的比值增大而增大,此外,反射率随TiO2和SiO2周期数增多而提高,但是随膜层增多到一定程度后,高反射区两边之波纹振荡越严重,高反射区的半宽并不会加大,则反射率并不会增高,为获得高反射率、高带宽,并且兼顾芯片电压及散热,本技术方案芯片制备选用18个周期SiO2和TiO2相互交替生长的DBR为反射镜。The distributed Bragg reflector (DBR) is a special all-dielectric reflective film, which is usually composed of two kinds of high and low refractive index compounds alternately stacked to produce periodic modulation of the refractive index in one dimension of space, resulting in strong interference. phenomenon, and achieve selective light reflection within a certain wavelength range, oxide films with high refractive index include ZnO, TiO 2 , Ta 2 O 5 , Nb 2 O 5 , ZrO 2 , SiO 2 , HfO 2 , MgO, etc., SiO 2 It is the lowest refractive index material with the best film properties, and SiO 2 is not easy to decompose, so it is the best low refractive index film for plating. The refractive index of TiO 2 is high, the refractive index n≈2.5, and the mechanical strength is also high. , but it is transparent in all wavelengths, and combined with SiO 2 can reduce the absorption and scattering of light, it is a relatively good high and low refractive index material, DBR is made by evaporation method: the first layer is SiO 2 , and the last layer is also It is SiO 2 , with TiO 2 and SiO 2 intersecting in the middle, so the structure of substrate SiO 2 -TiO 2 and SiO 2 -SiO 2 is formed. The wavelength of the reflection area of this structure increases with the ratio of high and low refractive index materials. In addition, the reflectivity increases with the increase of the number of TiO 2 and SiO 2 cycles, but with the increase of the film layer to a certain extent, the more serious the ripple oscillation on both sides of the high-reflection area, the half-width of the high-reflection area does not increase. If it is large, the reflectivity will not increase. In order to obtain high reflectivity and high bandwidth, and take into account the chip voltage and heat dissipation, the chip preparation of this technical scheme selects 18 cycles of SiO 2 and TiO 2 alternately grown DBR as the reflector.
氧化铟锡ITO层(Indium Tin Oxides,简称ITO),是一种具有良好导电性和高透光性的P型半导体材料,在可见光波段的透过率可以达到90%以上,具有良好的稳定性,利用ITO电极代替传统LED中P型电极芯片,能够将发光体的出光率提高30%-40%,在光栅之间增加ITO缓冲层,进一步提高LED发光强度。Indium tin oxide ITO layer (Indium Tin Oxides, ITO for short) is a P-type semiconductor material with good conductivity and high light transmittance. The transmittance in the visible light band can reach more than 90% and has good stability. , Using ITO electrodes to replace the P-type electrode chips in traditional LEDs can increase the light extraction rate of the luminous body by 30%-40%, and add an ITO buffer layer between the gratings to further improve the LED luminous intensity.
多量子阱MQWS层中量子阱呈三明治结构,中间为很薄的一层半导体膜,半导体膜的结构由AlGaAs-GaAs-AlGaAs的复合形式组成,外侧为两个隔离层即两块N型GaAs,LED量子阱QW自发辐射产生的光子透过GaN层,通过产生SPPs-QW的有效耦合,得到在GaN光栅表面光提取率提升。The quantum well in the multi-quantum well MQWS layer is a sandwich structure with a thin layer of semiconductor film in the middle. The structure of the semiconductor film is composed of a composite form of AlGaAs-GaAs-AlGaAs, and the outer side is two isolation layers, namely two N-type GaAs, The photons generated by the spontaneous emission of the LED quantum well QW pass through the GaN layer, and through the effective coupling of the SPPs-QW, the light extraction rate on the surface of the GaN grating is improved.
这种装置能避免金属屏蔽效应,光学参数更容易匹配,能提高LED发光效率、散热性能好。The device can avoid the metal shielding effect, the optical parameters are easier to match, the LED luminous efficiency can be improved, and the heat dissipation performance is good.
附图说明Description of drawings
图1为实施例的机构示意图。FIG. 1 is a schematic diagram of the mechanism of the embodiment.
图中,1.圆锥体 2.蓝宝石衬底层 3.N极光栅层 4.N电极N-nad 5.多量子阱层6.P电极P-nad 7.P极光栅层 8.氧化铟锡缓冲层 9.分布式布拉格反射镜。In the figure, 1.
具体实施方式Detailed ways
下面结合附图和实施例对本实用新型的内容做进一步的阐述,但不是对本实用新型的限定。The content of the present utility model will be further elaborated below in conjunction with the accompanying drawings and embodiments, but it is not intended to limit the present utility model.
实施例:Example:
参照图1,一种基于倒装结构的LED发光装置,包括自下而上顺序叠接的分布式布拉格反射镜DBR9、氧化铟锡ITO缓冲层8、P极光栅层7、多量子阱MQW层5、N极光栅层3和蓝宝石衬底Sapphire层2,在蓝宝石衬底Sapphire层2朝外的上表面上设有一组呈均匀阵列状分布的呈圆锥状的SiO2锥体,其中,分别在N极光栅层3、P极光栅层7的外缘相同位置处分别设有N电极N-nad4和P电极P-nad6。1, an LED light-emitting device based on a flip-chip structure includes a distributed Bragg reflector DBR9, an indium tin oxide ITO buffer layer 8, a p-pole grating layer 7, and a multiple quantum well MQW layer sequentially stacked from bottom to top. 5. The N-pole grating layer 3 and the sapphire
本例中呈均匀阵列状分布的呈圆锥状的SiO2锥体呈6×6阵列,其中SiO2锥体的球面直径为60nm,SiO2锥体通过有序的SiO2纳米球配合ICP刻蚀技术来纹理蓝宝石表面,在这种方法中,旋转SiO2纳米球用作牺牲干蚀刻掩模,制备圆锥型表面的蓝宝石衬底:首先,用50nm厚的聚苯乙烯PS(Polystyrene)层覆盖蓝宝石表面以固定SiO2纳米球,然后通过将其暴露于紫外线将表面亲水化辐射,在水和氨的存在下,通过在醇介质中水解四乙基原硅酸盐TEOS(Tetraethyl orthosilicate),根据方法合成单分散SiO2纳米颗粒,采用将氨、TEOS和水的浓度分别设定为0.1、17.0和0.2mol/L,将SiO2粒子的大小控制在60nm,通过SEM(Scanning Electron Microscope)测量得到的SiO2颗粒,直径为60nm的SiO2纳米球在蓝宝石表面进旋压铸造,然后在160℃退火10分钟,将SiO2纳米球嵌入SiO2层,将样品放入压力0.667Pa和Cl2(7.5sccm)和BCl3(30sccm)的混合物的多重ICP(STS)设备下进行蚀刻干,蓝宝石的蚀刻速率为100nm/min,从本质上讲,球形SiO2作为掩模通过ICP刻蚀牺牲其厚度在蓝宝石中产生不同的蚀刻深度,从而制备成圆锥型结构,从而形成了圆锥型蓝宝石衬底。In this example, the conical SiO2 cones distributed in a uniform array form a 6 × 6 array, in which the spherical diameter of the SiO2 cones is 60 nm, and the SiO2 cones are etched by the ordered SiO2 nanospheres with ICP etching technique to texture the sapphire surface. In this method, spinning SiO2 nanospheres are used as sacrificial dry etching masks to prepare a sapphire substrate with a conical surface: first, the sapphire is covered with a 50 nm thick layer of polystyrene (PS) surface to immobilize SiO nanospheres, which were then hydrophilized by exposing them to UV radiation, in the presence of water and ammonia, by hydrolysis of the tetraethyl orthosilicate TEOS (Tetraethyl orthosilicate) in an alcoholic medium, according to Methods Monodisperse SiO nanoparticles were synthesized by setting the concentrations of ammonia, TEOS and water to 0.1, 17.0 and 0.2 mol/L, respectively, and controlling the size of SiO particles to 60 nm, which were measured by SEM (Scanning Electron Microscope). The SiO2 particles, SiO2 nanospheres with a diameter of 60 nm were spin-cast on the sapphire surface, and then annealed at 160 °C for 10 min, the SiO2 nanospheres were embedded in the SiO2 layer, and the samples were placed under a pressure of 0.667Pa and Cl2 ( 7.5sccm) and BCl3 (30sccm) were etched under multiple ICP (STS) equipment, the etch rate of sapphire was 100nm/min, essentially, spherical SiO2 was used as a mask to sacrifice its thickness by ICP etching Different etching depths are produced in the sapphire to prepare a conical structure, thereby forming a conical sapphire substrate.
所述蓝宝石衬底Sapphire层2的厚度为100-600nm。The thickness of the
本例中蓝宝石衬底Sapphire层2的厚度为130nm,蓝宝石衬底层2的厚度对表面光栅倒装LED光提取效率有影响,蓝宝石衬底厚度对表面光栅倒装LED光提取效率的影响与N-GaN层厚度对表面光栅光提取效率的影响是类似的,都是因为蓝宝石衬底厚度对F-P腔驻波、光栅与导模的耦合强度有影响,当蓝宝石衬底厚度为130nm时,由于光栅与LED中导模的耦合作用强,所以更多的导模被引导到LED的光提取角中,使得更多的能量被提取出来。In this example, the thickness of the
本例中N极光栅层3为N-GaN层,N-GaN层的厚度为100nm,当蓝宝石衬底Sapphire层2的厚度在100-600nm之间以10nm为间隔均匀变化时,表面光栅倒装LED光提取效率出现周期性振荡,但是振荡峰却随着厚度的增加而减小,光提取效率从厚度等于100nm时的30.98%下降到厚度等于600nm时的25.86%,只有N-GaN层3厚度为100nm时,光栅与LED内导模的耦合强度最大。In this example, the N-pole grating layer 3 is an N-GaN layer, and the thickness of the N-GaN layer is 100 nm. When the thickness of the
所述P极光栅层7为P-GaN层,P-GaN层的厚度为100-300nm。The P-pole grating layer 7 is a P-GaN layer, and the thickness of the P-GaN layer is 100-300 nm.
本例中P-GaN层的厚度为220nm,当P-GaN层7的厚度在100~300nm之间以10nm为间隔均匀变化时,倒装LED和表面光栅倒装LED光提取效率均呈周期性变化,当P-GaN层7为220nm时,倒装LED和表面光栅LED的光提取效率均达到最大。In this example, the thickness of the P-GaN layer is 220 nm. When the thickness of the P-GaN layer 7 varies uniformly between 100 and 300 nm at intervals of 10 nm, the light extraction efficiencies of the flip-chip LED and the surface grating flip-chip LED are both periodic. Change, when the P-GaN layer 7 is 220 nm, the light extraction efficiency of the flip-chip LED and the surface grating LED both reach the maximum.
N极光栅层和P极光栅层,均采用金属光栅结构,不仅可以有效的提高LED内量子效率,而且可以增强外量子效率,氮化镓(GaN)是一种无机物,是氮和镓的化合物,是一种直接能隙(direct bandgap)的半导体,可以用在高功率、高速的光电元件中,LED模型采用GaN光栅。Both the N-pole grating layer and the P-pole grating layer use metal grating structures, which can not only effectively improve the internal quantum efficiency of LEDs, but also enhance the external quantum efficiency. Gallium Nitride (GaN) is an inorganic substance, which is composed of nitrogen and gallium. The compound, a direct bandgap semiconductor, can be used in high-power, high-speed optoelectronic components, and the LED model uses GaN gratings.
所述N电极N-nad4由蒸镀金属制作成N型电极,材质为砷或锑或磷。The N-electrode N-nad4 is made of vapor-deposited metal into an N-type electrode, and the material is arsenic, antimony or phosphorus.
所述P电极P-nad6由蒸镀金属制作成P型电极,材质为硼或铟或镓,作为LED注入电流端。The P electrode P-nad6 is made of vapor-deposited metal into a P-type electrode, and the material is boron, indium or gallium, and is used as the LED injection current terminal.
所述分布式布拉格反射镜DBR是一种特殊全电介质反射膜,通常由交替层叠的两种高低折射率的化合物组成,以在空间的一个维度上产生折射率的周期性调制,产生强烈的干扰现象,并在一定波长范围内实现选择性光反射,折射率高的氧化膜有ZnO、TiO2、Ta2O5、Nb2O5、ZrO2、SiO2、HfO2、MgO等,SiO2是膜性最好的最低折射率材料,吸收与散射都很小,并且SiO2不易分解,因此是制镀所需最佳的低折射率薄膜,其中TiO2的折射率高、折射率n≈2.5,机械强度也较高,但是它在全波段都是透明的,与SiO2结合可以降低光的吸收及散射性,是比较优良的高低折射率材料,DBR采用蒸镀的方法制作:首层为SiO2,末层也为SiO2,中间有多对的TiO2和SiO2交叉构成,所以就形成衬底SiO2-多对TiO2和SiO2-SiO2的结构,此结构的反射区域的波宽随高低折射率材料的比值增大而增大,此外,反射率随TiO2和SiO2周期数增多而提高,但是随膜层增多到一定程度后,高反射区两边之波纹振荡越严重,高反射区的半宽并不会加大,则反射率并不会增高,为获得高反射率、高带宽,并且兼顾芯片电压及散热,本例芯片制备选用18个周期SiO2和TiO2相互交替生长的DBR为反射镜。The distributed Bragg reflector (DBR) is a special all-dielectric reflective film, which is usually composed of two kinds of high and low refractive index compounds alternately stacked to produce periodic modulation of the refractive index in one dimension of space, resulting in strong interference. phenomenon, and achieve selective light reflection within a certain wavelength range, oxide films with high refractive index include ZnO, TiO 2 , Ta 2 O 5 , Nb 2 O 5 , ZrO 2 , SiO 2 , HfO 2 , MgO, etc., SiO 2 It is the lowest refractive index material with the best film properties, the absorption and scattering are very small, and SiO 2 is not easy to decompose, so it is the best low-refractive index film for plating. The refractive index of TiO 2 is high and the refractive index n≈ 2.5, the mechanical strength is also high, but it is transparent in all wavelengths, and combined with SiO 2 can reduce the absorption and scattering of light, it is a relatively good high and low refractive index material, DBR is made by evaporation method: the first layer It is SiO 2 , the last layer is also SiO 2 , and there are many pairs of TiO 2 and
氧化铟锡ITO层8(Indium Tin Oxides,简称ITO),是一种具有良好导电性和高透光性的P型半导体材料,在可见光波段的透过率可以达到90%以上,具有良好的稳定性,利用ITO电极代替传统LED中P型电极芯片,能够将发光体的出光率提高30%-40%,在光栅之间增加ITO缓冲层,进一步提高LED发光强度。The indium tin oxide ITO layer 8 (Indium Tin Oxides, ITO for short) is a P-type semiconductor material with good conductivity and high light transmittance. The transmittance in the visible light band can reach more than 90%, with good stability. The use of ITO electrodes to replace the P-type electrode chips in traditional LEDs can increase the light extraction rate of the luminous body by 30%-40%, and add an ITO buffer layer between the gratings to further improve the LED luminous intensity.
多量子阱MQWS层5中量子阱呈三明治结构,中间为很薄的一层半导体膜,半导体膜的结构由AlGaAs-GaAs-AlGaAs的复合形式组成,外侧为两个隔离层即两块N型GaAs。LED量子阱QW自发辐射产生的光子透过GaN层,通过产生SPPs-QW的有效耦合,得到在GaN光栅表面光提取率提升。The quantum well in the multi-quantum well MQWS layer 5 is a sandwich structure, with a thin layer of semiconductor film in the middle, the structure of the semiconductor film is composed of a composite form of AlGaAs-GaAs-AlGaAs, and two isolation layers on the outside are two N-type GaAs . The photons generated by the spontaneous emission of the LED quantum well QW pass through the GaN layer, and through the effective coupling of the SPPs-QW, the light extraction rate on the surface of the GaN grating is improved.
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