CN216209855U - Reconnaissance surveillance radar module level detector - Google Patents
Reconnaissance surveillance radar module level detector Download PDFInfo
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- CN216209855U CN216209855U CN202122208405.2U CN202122208405U CN216209855U CN 216209855 U CN216209855 U CN 216209855U CN 202122208405 U CN202122208405 U CN 202122208405U CN 216209855 U CN216209855 U CN 216209855U
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Abstract
The utility model discloses a reconnaissance and monitoring radar module-level detector which comprises a first processor, a second processor, a first Ethernet controller, a second Ethernet controller, a data exchanger, an optical fiber module and a plurality of network test ports, wherein the first processor, the second processor, the first Ethernet controller, the data exchanger and the optical fiber module are arranged on a mainboard and are sequentially connected, the second processor is connected with the second Ethernet controller, and the plurality of network test ports are respectively connected with the data exchanger and the second Ethernet controller. Through reasonable circuit design, the utility model can detect a plurality of components (a servo control plug-in, an optical fiber conversion plug-in, an encoder, a driver motor, a receiving control plug-in and a communication power plug-in) of the radar, find fault points in time and greatly improve the detection and maintenance efficiency of the radar system.
Description
Technical Field
The utility model relates to the technical field of radar detection, in particular to a module-level detector for a reconnaissance and surveillance radar.
Background
The reconnaissance surveillance radar mainly refers to ground-to-air surveillance radar, and is one of the most widely used radars with the earliest application. The reconnaissance surveillance radar system comprises a plurality of module-level components, the radar system is difficult to avoid faults in the using process, and efficient detection equipment is necessary for determining fault modules as soon as possible and restoring normal operation of the radar system.
SUMMERY OF THE UTILITY MODEL
In order to achieve the above object, the present invention discloses a module-level detector for a reconnaissance and surveillance radar, which includes a first processor, a second processor, a first ethernet controller, a second ethernet controller, a data exchanger, an optical fiber module, and a plurality of network test ports, which are disposed on a motherboard, wherein the first processor, the first ethernet controller, the data exchanger, and the optical fiber module are sequentially connected, the second processor is connected with the second ethernet controller, and the plurality of network test ports are respectively connected with the data exchanger and the second ethernet controller.
Furthermore, a liquid crystal screen is further arranged on the main board and connected with the first processor.
Further, the first processor is respectively connected with a driver motor assembly and an encoder assembly of the radar.
Further, the first processor is also connected with a servo control plug-in unit of the radar.
Furthermore, still be equipped with the unblock shift knob on the mainboard, the unblock shift knob is connected with the servo control plug-in components of radar.
Furthermore, the plurality of network test ports and the optical fiber module are respectively connected with an optical fiber conversion plug-in of the radar.
Further, the second processor is connected with a receiving control plug-in unit of the radar.
The utility model has the beneficial effects that:
through reasonable circuit design, the utility model can detect a plurality of components (a servo control plug-in, an optical fiber conversion plug-in, an encoder, a driver motor, a receiving control plug-in and a communication power plug-in) of the radar, find fault points in time and greatly improve the detection and maintenance efficiency of the radar system.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to these drawings without inventive labor.
FIG. 1 is a schematic block diagram of the system of the present invention.
Reference numerals:
1-a first processor; 2-a second processor; 3-a first ethernet controller; 4-a second ethernet controller; 5-a data exchanger; 6-optical fiber module; 7-a plurality of network test ports; 8-a liquid crystal screen; 9-unlock switch button; 10-main board.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments.
In the description of the embodiments, the terms "disposed," "connected," and the like are to be construed broadly unless otherwise explicitly specified or limited. For example, the connection can be fixed, detachable or integrated; can be mechanically or electrically connected; either directly or through an intervening medium, or through internal communication between two elements. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.
As shown in fig. 1, the reconnaissance surveillance radar module level detector of the present embodiment includes a first processor 1, a second processor 2, a first ethernet controller 3, a second ethernet controller 4, a data switch 5, a fiber module 6, a plurality of network test ports 7, a liquid crystal screen 8, and an unlock switch button 9, which are disposed on a main board 10.
The first processor 1, the first Ethernet controller 3, the data exchanger 5 and the optical fiber module 6 are sequentially connected, the second processor 2 is connected with the second Ethernet controller 4, the plurality of network test ports 7 are respectively connected with the data exchanger 5 and the second Ethernet controller 4, and the liquid crystal screen 8 is connected with the first processor 1.
The first processor 1 and the second processor 2 respectively adopt an ARM series chip, the first ethernet controller 3 and the second ethernet controller 4 adopt a W5500 ethernet control chip, the data exchanger 5 adopts a KS8995 series data exchange chip, and the optical fiber module and the network test interface are conventional technical means in the field, which is not described herein again.
The detector has the following functions:
1. servo control plug-in test
1) Testing a network interface:
during testing, the servo control plug-in is connected with one of the network test ports 7 by using a network port jumper, the first processor 1 sends an ACK (acknowledgement) query instruction to the tested servo control plug-in, judges the reply of the tested servo control plug-in and outputs a test result to the liquid crystal screen 8.
2) And (3) testing a servo communication port:
the first processor 1 sends driver state information to the tested servo control plug-in, the tested servo control plug-in replies handshake information, and the first processor 1 judges the reply information and outputs a test result to the liquid crystal screen 8.
3) And (3) testing a direction information port:
the first processor 1 sends a group of prefabricated virtual azimuth codes to the tested servo control plug-in, the tested servo control plug-in replies the processed azimuth codes to the first processor 1, and the first processor 1 judges the replied azimuth codes and outputs the test results to the liquid crystal screen 8.
4) Testing a motor unlocking signal:
the Unlock switch button 9 is pressed, and the motor Unlock signal voltage is measured at the Unlock test point using a voltmeter.
2. Fiber optic transition plug-in test
1) Testing an optical fiber port and a debugging network port:
and connecting the optical fiber port of the tested optical fiber conversion plug-in unit with one network test port 7 by using an optical fiber jumper, wherein the first processor 1 serves as a host, the second processor 2 serves as a slave, the first processor 1 judges the query result and outputs the test result to the liquid crystal screen 8.
2) And (3) testing a servo network port:
and connecting the tested optical fiber conversion plug-in with a debugging network port and one of the network test ports 7 by using a network jumper, wherein the first processor 1 serves as a host, the second processor 2 serves as a slave, the first processor 1 judges the query result and outputs the test result to the liquid crystal screen 8.
3) The testing methods of the convergence ring network port and the AIS network port are the same as the testing method of the servo network port, and are not described again here.
4. Encoder assembly testing
The first processor 1 receives the azimuth coding information of the encoder assembly, caches the last 10 groups of the azimuth coding information, outputs the 10 groups of the azimuth coding information to the liquid crystal screen 8 for a tester to judge whether the data format is correct, slightly rotates the rotating shaft of the encoder, and repeatedly tests, wherein the data are different.
5. Driver motor assembly testing
The first processor 1 is connected with the driver motor assembly, and when buttons such as forward scanning, backward scanning, stopping, accelerating and decelerating are pressed, the rotating shaft of the driver motor can perform corresponding actions, and the results are fed back to the liquid crystal screen 8.
6. Receive control plug-in test
1) And (3) testing the network port:
connecting the tested receiving control plug-in debugging network port and one network test port 7 by using a network jumper, sending an ACK (acknowledgement) query instruction by the second processor 2, judging reply information, and outputting a test result to the liquid crystal display 8; other network port testing methods are the same and are not described herein.
2) DDS, DDC and polarized serial port test:
connect and receive control plug-in debugging net gape and one of them network test port 7 by survey, first treater 1 sends work module instruction and polarization control instruction to being surveyed to receive control plug-in through the network, being surveyed to receive control plug-in and make the reply of correct receipt instruction to first treater 1, then through the DDS serial ports, DDC serial ports and polarization serial ports send corresponding instruction, the virtual DDS of second treater 2, DDC and polarization control box make the reply, being surveyed to receive control plug-in and reply the execution to first treater 1 after receiving second treater 2 and finishing, first treater 1 judges this process and result, export the test result to LCD 8.
3) And (3) testing a 485 serial port:
the two network test ports 7 are connected, the second processor 2 detects whether the received information is a correct power supply and power amplifier query instruction and judges, the test result is sent to the first processor 1 through the network, and the first processor 1 outputs the result to the liquid crystal screen 8.
4) And (3) azimuth serial port testing:
the second processor 2 sends the virtual azimuth information to the tested receiving control plug-in, and receives the azimuth information fed back by the receiving control plug-in, the second processor 2 compares the sent and received azimuth information and makes a judgment, the test result is sent to the first processor 1 through the network, and the first processor 1 outputs the result to the liquid crystal screen 8.
5) Input and output IO port test:
connecting one of the network test ports 7 with any network port of the tested receiving control plug-in, pressing the input/output IO port test button, the first processor 1 sends a virtual IO information instruction to the second processor 2 through one of the network test ports 7, and then sends a state query instruction to the tested receiving control plug-in through the other network test port 7. And comparing the state code obtained by inquiry with the predicted virtual information to obtain a test result. And issuing an instruction to the second processor 2 again to enable the second processor to output the negated virtual IO information, and then inquiring and comparing again. And after the results of the two tests are integrated, obtaining the detection result of the input IO port. The first processor 1 then sends an instruction group to the receiving control card under test via one of the network test ports 7, and controls the receiving control card to output IO port signals. Then the first processor 1 issues a receiving control plug-in output IO port test instruction to the second processor 2 through another network test port 7. The first processor 1 sends an instruction group to the receiving control plug-in again to control the output IO port signal of the receiving control plug-in to be inverted, and then commands the second processor 2 to carry out the test of the output IO port of the receiving control plug-in again. And after the second processor 2 synthesizes the two test results, the result is fed back to the first processor 1 through the network port, and the first processor 1 outputs the final IO port test result to the liquid crystal screen 8.
In addition, the detector can also be used for testing the communication power supply plug-in, the detector provides a test card slot for the communication power supply plug-in, an AC220 power supply is provided for the communication power supply plug-in through a detector interface backboard, and the communication power supply plug-in indicator lamp is observed through a panel of the detector. The detector is internally provided with a power resistor and provides a load and a test point for the voltage output test of the communication power supply plug-in unit.
Through reasonable circuit design, the utility model can detect a plurality of components of the radar, find fault points in time and greatly improve the detection and maintenance efficiency of the radar system.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the utility model, and any modifications, equivalents, improvements and the like that fall within the spirit and principle of the present invention are intended to be included therein. In addition, the technical solutions between the various embodiments can be combined with each other, but must be based on the realization of those skilled in the art; where combinations of features are mutually inconsistent or impractical, such combinations should not be considered as being absent and not within the scope of the claimed invention.
Claims (7)
1. The utility model provides a reconnaissance surveillance radar module level detector which characterized in that: the system comprises a first processor, a second processor, a first Ethernet controller, a second Ethernet controller, a data exchanger, an optical fiber module and a plurality of network test ports, wherein the first processor, the second processor, the first Ethernet controller, the data exchanger and the optical fiber module are arranged on a mainboard and are sequentially connected, the second processor is connected with the second Ethernet controller, and the plurality of network test ports are respectively connected with the data exchanger and the second Ethernet controller.
2. The reconnaissance surveillance radar module-level detector of claim 1, wherein: the mainboard is also provided with a liquid crystal screen, and the liquid crystal screen is connected with the first processor.
3. The reconnaissance surveillance radar module-level detector of claim 1, wherein: the first processor is respectively connected with a driver motor component and an encoder component of the radar.
4. The reconnaissance surveillance radar module-level detector of claim 1, wherein: the first processor is also connected with a servo control plug-in unit of the radar.
5. The reconnaissance surveillance radar module-level detector of claim 1, wherein: still be equipped with the unblock shift knob on the mainboard, the servo control plug-in components of unblock shift knob and radar are connected.
6. The reconnaissance surveillance radar module-level detector of claim 1, wherein: and the plurality of network test ports and the optical fiber module are respectively connected with an optical fiber conversion plug-in of the radar.
7. The reconnaissance surveillance radar module-level detector of claim 1, wherein: and the second processor is connected with a receiving control plug-in unit of the radar.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202122208405.2U CN216209855U (en) | 2021-09-13 | 2021-09-13 | Reconnaissance surveillance radar module level detector |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202122208405.2U CN216209855U (en) | 2021-09-13 | 2021-09-13 | Reconnaissance surveillance radar module level detector |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN216209855U true CN216209855U (en) | 2022-04-05 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202122208405.2U Active CN216209855U (en) | 2021-09-13 | 2021-09-13 | Reconnaissance surveillance radar module level detector |
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| CN (1) | CN216209855U (en) |
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2021
- 2021-09-13 CN CN202122208405.2U patent/CN216209855U/en active Active
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