CN215990798U

CN215990798U - Nationwide satellite common-view board card based on ZYNQ framework

Info

Publication number: CN215990798U
Application number: CN202122190408.8U
Authority: CN
Inventors: 王连石; 吴桐
Original assignee: Chengdu Zichen Time Frequency Technology Co ltd
Current assignee: Chengdu Zichen Time Frequency Technology Co ltd
Priority date: 2021-09-10
Filing date: 2021-09-10
Publication date: 2022-03-08
Anticipated expiration: 2031-09-10

Abstract

The utility model discloses a nationwide produced satellite common-view board card based on a ZYNQ framework, which comprises a ZYNQ core module, a GNSS satellite receiver module, a frequency source module, a TDC time difference measuring module, a PLL digital phase-locked loop module and a common-view data network transmission module; the GNSS satellite receiver module, the clock module, the TDC time difference measuring module, the PLL digital phase-locked loop module and the common-view data network transmission module are respectively connected with the ZYNQ core module. The ZYNQ core module comprises a ZYNQ chip, an SDRAM chip, a FLASH chip, an EEPROM chip, a CAN interface chip, an I2C interface chip, a clock chip and a reset chip; the ZYNQ chip is connected with the SDRAM chip, the FLASH chip, the EEPROM chip, the CAN interface chip, the I2C interface chip, the clock chip and the reset chip. The full-board card device is localized, has full-time and Beidou positioning and navigation full-function requirements, has the advantages of greatly reducing hardware design difficulty by interconnecting the interior of a high-integration SOC architecture chip through a bus, and simultaneously has high precision, low power consumption and low cost.

Description

Nationwide satellite common-view board card based on ZYNQ framework

Technical Field

The utility model relates to the technical field of satellite communication, in particular to a nationwide satellite common-view board card based on a ZYNQ framework.

Background

At present, in order to meet the real-time performance and the expansibility of hardware, the traditional satellite common-view board card architecture generally adopts FPGA + X86, FPGA + ARM and FPGA + DSP hardware architectures for full-coverage service and testing capacity, the architectures are complex in structure and complex in design and debugging, and an imported chip is depended on and is characterized in that the purchasing period is long, the power consumption of the chip is high, the cost is high and the risk resistance is poor.

SUMMERY OF THE UTILITY MODEL

The utility model aims to solve the problems and provide a nationwide satellite common view board card based on a ZYNQ framework.

The utility model realizes the purpose through the following technical scheme:

a nationwide satellite common-view board based on ZYNQ framework comprises a ZYNQ core module, a GNSS satellite receiver module, a frequency source module, a TDC time difference measuring module, a PLL digital phase-locked loop module and a common-view data network transmission module; the GNSS satellite receiver module, the clock module, the TDC time difference measuring module, the PLL digital phase-locked loop module and the common-view data network transmission module are respectively connected with the ZYNQ core module.

Further, the ZYNQ core module comprises a ZYNQ chip, an SDRAM chip, a FLASH chip, an EEPROM chip, a CAN interface chip, an I2C interface chip, a clock chip and a reset chip; the ZYNQ chip is connected with the SDRAM chip, the FLASH chip, the EEPROM chip, the CAN interface chip, the I2C interface chip, the clock chip and the reset chip.

Further, the clock chip is connected with a 33.33MHz crystal oscillator and used for providing an external clock of the ZYNQ chip. The CAN interface chip is a high-speed CAN bus transceiver and is used for communicating with other board cards. The I2C interface chip is a hot plug buffer for power input.

Further, the GNSS receiver module is a receiver module for receiving signals that can receive GPS, GLONASS, galileo and beidou satellite navigation signals. The frequency source module is a chip clock or a crystal oscillator module. The TDC time difference measuring module is a precision time difference measuring module with the measuring range of 0-1.8us and the measuring precision of 50 ps. The common-view data network transmission module comprises a plurality of kilomega network ports and is used for receiving signals and outputting common-view data of CGGTTS.

The utility model has the beneficial effects that:

the satellite common-view board card based on the localization ZYNQ framework is adopted, the full-board card device has the localization rate of 100%, the full-time and Beidou positioning and navigation full-function requirements are met, the hardware design difficulty is greatly reduced by interconnecting the interior of the SOC framework chip with high integration level through the bus, and the satellite common-view board card has the advantages of high precision, low power consumption and low cost.

Drawings

FIG. 1 is a hardware platform architecture diagram of a ZYNQ architecture-based nationwide satellite common view board card according to the present invention;

fig. 2 is a schematic diagram of a ZYNQ core module of a nationwide satellite common view board card based on a ZYNQ architecture according to the present invention.

Detailed Description

The utility model will be further described with reference to the accompanying drawings in which:

as shown in fig. 1, the nationwide satellite common view board card based on the ZYNQ architecture of the present invention comprises a ZYNQ core module, a GNSS satellite receiver module, a frequency source module, a TDC time difference measurement module, a PLL digital phase-locked loop module, and a common view data network transmission module; the GNSS satellite receiver module, the clock module, the TDC time difference measuring module, the PLL digital phase-locked loop module and the common-view data network transmission module are respectively connected with the ZYNQ core module.

Furthermore, the GNSS receiver module is a receiver module, and is configured to receive GPS, GLONASS, galileo, and beidou satellite navigation signals and demodulate standard time-frequency reference signals required by the board card.

Furthermore, the frequency source module is a chip clock or a crystal oscillator module, and the frequency source module adopts a domestic self-disciplined 10MHz frequency source with the characteristics of accuracy, short stability, excellent aging index and the like, and is used for providing a standard 10MHz frequency source.

Further, the TDC time difference measurement module is a precision time difference measurement module with a measurement range of 0-1.8us and a measurement precision of 50ps, and is used for calculating the precision time difference between the local second and the reference second of the board card.

Further, the common-view data network transmission module comprises a plurality of gigabit network ports for signal receiving and outputting the CGGTTS common-view data.

Furthermore, the PLL digital phase-locked loop module adopts a domestic phase-locked module which utilizes the short-stability advantage of the crystal oscillator to phase-lock rubidium clock 10MHz signals, and is used for outputting standard frequency signals with excellent short-stability indexes by a board card.

One kernel of the four-core high-performance processor of the ZYNQ core module runs a LINUX operating system and is used for satellite common-view data processing, including satellite common-view clock difference calculation, CGGTTS common-view data file generation and the like, and one kernel runs a real-time operating system and is used for time-frequency signal processing, including satellite source tracing, timing synchronization, time difference measurement, rubidium clock/crystal oscillation taming, time keeping and the like.

As shown in fig. 2, the ZYNQ core module includes a ZYNQ chip, an SDRAM chip, a FLASH chip, an EEPROM chip, a CAN interface chip, an I2C interface chip, a clock chip, and a reset chip; the ZYNQ chip is connected with the SDRAM chip, the FLASH chip, the EEPROM chip, the CAN interface chip, the I2C interface chip, the clock chip and the reset chip.

Further, the clock chip is connected with a 33.33MHz crystal oscillator and used for providing an external clock of the ZYNQ chip.

Furthermore, the CAN interface chip is a high-speed CAN bus transceiver and is used for communicating with other board cards.

Further, the I2C interface chip is a hot plug buffer for power input.

Further, the SDRAM chip adopts a domestic 4Gb DDR3 synchronous dynamic random access memory with a storage structure of 256Mbx16(32Mbx16x8banks) for the operation of a LINUX operating system.

Furthermore, the FLASH chip adopts a domestic 128M-bit SPI serial FLASH memory for QSPI external start of a system program.

Furthermore, the EEPROM chip adopts a domestic 2K SPI serial memory for power-down storage of working parameters.

Furthermore, the CAN interface chip adopts a domestic 1Mbps high-speed CAN bus transceiver for communication with other boards.

Further, the I2C interface chip adopts a domestic I2C/SMBus hot plug buffer for board power supply.

Further, the clock chip adopts a domestic 33.33MHz crystal oscillator for providing an external clock of the ZYNQ chip.

Furthermore, the reset chip adopts a domestic IC reset chip and is used for starting, closing and resetting the ZYNQ chip.

The ZYNQ chip adopts a domestic Programmable fusion chip based on TSMC28nm HPC + technology, and integrates a Processing System (PS) of a four-core high-performance processor and 350K Programmable Logic (PL) with 4.29 hundred million gates. The quad-core high-performance processor is the core of the processor system, and the quad-core high-performance processor, the on-chip memory, the external memory interface DDR, various system functional components, I/O peripheral equipment, a programmable logic part and the like cooperate to form the on-chip programmable system with rich functions.

According to the nationwide produced satellite common-view board card based on the ZYNQ framework, the whole board card adopts a localization device, has full-time and Beidou positioning and navigation full-function requirements, has the advantages that the hardware design difficulty is greatly reduced by interconnecting the interior of a high-integration SOC framework chip through a bus, and simultaneously has high precision, low power consumption and low cost.

The technical solution of the present invention is not limited to the limitations of the above specific embodiments, and all technical modifications made according to the technical solution of the present invention fall within the protection scope of the present invention.

Claims

1. A nationwide satellite common-view board card based on a ZYNQ framework is characterized by comprising a ZYNQ core module, a GNSS satellite receiver module, a frequency source module, a TDC time difference measuring module, a PLL digital phase-locked loop module and a common-view data network transmission module; the GNSS satellite receiver module, the clock module, the TDC time difference measuring module, the PLL digital phase-locked loop module and the common-view data network transmission module are respectively connected with the ZYNQ core module.

2. The nationwide satellite common view board card based on the ZYNQ framework of claim 1, wherein the ZYNQ core module comprises a ZYNQ chip, an SDRAM chip, a FLASH chip, an EEPROM chip, a CAN interface chip, an I2C interface chip, a clock chip and a reset chip; the ZYNQ chip is connected with the SDRAM chip, the FLASH chip, the EEPROM chip, the CAN interface chip, the I2C interface chip, the clock chip and the reset chip.

3. The nationwide satellite common view board card based on the ZYNQ framework as claimed in claim 2, wherein the clock chip is connected with a 33.33MHz crystal oscillator for providing an external clock of the ZYNQ chip.

4. The nationwide satellite common view board based on the ZYNQ architecture as claimed in claim 2, wherein the CAN interface chip is a high-speed CAN bus transceiver for communication with other boards.

5. The nationwide satellite common view board card based on the ZYNQ architecture as claimed in claim 2, wherein the I2C interface chip is a hot plug buffer for power supply input.

6. The nationwide satellite common view board card based on the ZYNQ architecture as claimed in claim 1, wherein the GNSS satellite receiver module is a receiver module for receiving GPS, GLONASS, Galileo and Beidou satellite navigation signals.

7. The nationwide satellite common view board card based on the ZYNQ architecture as claimed in claim 1, wherein the frequency source module is a chip clock or a crystal oscillator module.

8. The nationwide satellite common view board card based on the ZYNQ framework as claimed in claim 1, wherein the TDC time difference measuring module is a precision time difference measuring module with a measuring range of 0-1.8us and a measuring precision of 50 ps.

9. The nationwide satellite common-view board card based on the ZYNQ framework, as claimed in claim 1, wherein the common-view data network transmission module comprises a plurality of gigabit network ports for signal reception and CGGTTS common-view data output.