CN215955303U - Packaging structure for chip - Google Patents

Packaging structure for chip Download PDF

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Publication number
CN215955303U
CN215955303U CN202120708284.5U CN202120708284U CN215955303U CN 215955303 U CN215955303 U CN 215955303U CN 202120708284 U CN202120708284 U CN 202120708284U CN 215955303 U CN215955303 U CN 215955303U
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China
Prior art keywords
substrate
chip
light emitting
package structure
pad
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CN202120708284.5U
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Chinese (zh)
Inventor
康孝恒
蔡克林
唐波
杨飞
李�瑞
许凯
蒋乐元
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Huizhou Zhijin Electronic Technology Co ltd
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Huizhou Zhijin Electronic Technology Co ltd
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Abstract

The utility model discloses a packaging structure for a chip, which comprises: the LED chip comprises a substrate, a bonding pad and a light-emitting chip. And a bonding pad fixing position is arranged on the upper end surface of the substrate and arranged along the diagonal line of the substrate. The pad is fixed on the pad fixing position. The light emitting chip is disposed on the pad. In the utility model, the bonding pad is arranged on the substrate along the diagonal line through the bonding pad fixing position, and the length of the diagonal line of the substrate is longer than that of the side length of the substrate, so that the corresponding wiring design can be completed in a smaller space, the packaging structure for the chip is compact in space wiring, the utilization rate of the space is favorably improved, the micro space is favorably reduced, and the resolution is improved.

Description

Packaging structure for chip
Technical Field
The utility model relates to the technical field of chip packaging, in particular to a packaging structure for a chip.
Background
An LED is an abbreviation of Light Emitting Diode, i.e., a Light Emitting Diode, which is a solid state semiconductor device capable of converting electrical energy into Light. The forward mounting is the earliest and the most mature packaging structure, and the packaging structure comprises P-GaN, a light emitting layer, N-GaN and a substrate from top to bottom in sequence. The packaging mode is developed for 20 years, the technology is highly mature and widely accepted by the market, and the up-stream, middle-stream and down-stream of the industrial chain form a very sound supply relation, so that the packaging mode is very complete in relevant production inspection equipment, process routes and the matching of raw materials and auxiliary materials, and has the capability level of large-scale mass production.
However, in the prior art, the arrangement of the LED bonding pad positions (i.e., chip connection positions, also referred to as optical pixels) of the RGB to be packaged makes the package structure not compact enough in space wiring.
SUMMERY OF THE UTILITY MODEL
In view of the above, the present invention provides a package structure for a chip, which is used to solve the problem that the package structure in the prior art is not compact enough in space wiring.
To achieve one or a part of or all of the above or other objects, the present invention provides a package structure for a chip, including:
the device comprises a substrate, wherein a bonding pad fixing position is arranged on the upper end surface of the substrate and is arranged along the diagonal line of the substrate;
and the bonding pad is fixed on the bonding pad fixing position.
In the package structure for a chip according to the present invention, the pad is rectangular or circular.
In the package structure for a chip according to the present invention, the substrate has a rectangular shape, and the pads are disposed along one diagonal line of the substrate.
In the package structure for a chip according to the present invention, the pads are symmetrically disposed with respect to a diagonal line of the substrate.
In the package structure for a chip according to the present invention, a light emitting chip is disposed on the bonding pad.
In the packaging structure for the chip, the light emitting chip comprises a red light emitting chip, a green light emitting chip and a blue light emitting chip.
In the packaging structure for the chip, the bonding pad is connected with the red light emitting chip through a conductive piece, and the green light emitting chip and the blue light emitting chip are respectively connected with the bonding pad through an insulating piece.
In the package structure for a chip according to the present invention, a power supply connection portion connected to a power supply is provided on the substrate.
In the package structure for a chip according to the present invention, the power supply connection portions are via holes and are disposed at four corners of the substrate.
In the package structure for a chip according to the present invention, the light emitting chip is connected to the other portion of the package structure through a wire.
Compared with the prior art, the utility model has the beneficial effects that: in the utility model, the bonding pad is arranged on the substrate along the diagonal line through the bonding pad fixing position, and the length of the diagonal line of the substrate is longer than that of the side length of the substrate, so that the corresponding wiring design can be completed in a smaller space, the packaging structure is compact in space wiring, the utilization rate of the space is favorably improved, the micro space is favorably reduced, and the resolution of the packaging structure is improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic layout of a substrate and pads of a package structure for a chip in one embodiment.
Wherein: 11. a substrate; 111. a power supply connection part; 12. a pad; 13. a light emitting chip.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
A package structure for a chip includes a substrate 11 and a pad 12.
The upper end surface of the substrate 11 is provided with a pad fixing position, and the pad fixing position is arranged along the diagonal line of the substrate 11.
The pad 12 is fixed to the pad fixing station.
In this embodiment, the pad 12 is disposed on the substrate 11 along the diagonal line through the pad fixing position, and since the length of the diagonal line of the substrate 11 is longer than the length of the side length of the substrate 11, the corresponding wiring design can be completed in a smaller space, so that the package structure is compact in space wiring, which is beneficial to improving the utilization rate of the space, and is also beneficial to shrinking the space and improving the resolution of the package structure.
In one embodiment, the pads 12 are rectangular or circular. Specifically, in the present embodiment, the bonding pad has a rectangular shape. It should be noted that the pad is circular or rectangular only according to the spatial position on the substrate and the actual requirement, and actually, the pad may also be in various shapes such as diamond, square, regular polygon, and the like.
In one embodiment, substrate 11 is rectangular and pads 12 are spaced along one diagonal of substrate 11. Specifically, in the present embodiment, the substrate 11 is square, and since the length of the diagonal line of the square is about 1.4 times longer than the length of the side length of the square, more wiring arrangements can be completed in the same space, which provides more choices for our wiring arrangement.
It should be noted that the rectangular arrangement of the pads 12 can be understood as two kinds:
firstly, the bonding pad 12 is an integral strip shape, the bonding pad 12 is divided into a plurality of parts, and each part is used for distinguishing and marking.
Secondly, there are a plurality of pads 12, and each pad 12 is arranged along the diagonal interval.
Further, in order to prevent the wire from being cut, the corners of the bonding pad 12 are connected by using a cambered surface.
In one embodiment, to facilitate the layout of the flat cable and to make the structure within the package structure more regular, the pads 12 are rectangular, and the pads 12 are symmetrically arranged with respect to the diagonal of the substrate 11.
In one embodiment, the pad holding locations include a first pad holding location, a second pad holding location, and a third pad holding location. The second pad holding station is located between the first pad holding station and the third pad holding station. The area of the pad 12 located on the second pad holding position is larger than the area of the pad 12 located on the first pad holding position and the third pad holding position, respectively.
In one embodiment, the light emitting chip 13 is disposed on the pad 12, and the light emitting chip 13 includes a red light emitting chip, a green light emitting chip, and a blue light emitting chip. In the present embodiment, the color of light emission of the LED is realized by controlling the red light emitting chip, the green light emitting chip, and the blue light emitting chip.
It should be noted that the pads 12 include a first pad disposed at the first pad fixing position, a second pad disposed at the second pad fixing position, and a third pad disposed at the third pad fixing position. The red light emitting chips, the green light emitting chips and the blue light emitting chips are arranged on the first bonding pad, the second bonding pad and the third bonding pad in a one-to-one correspondence manner, and the red light emitting chips, the green light emitting chips and the blue light emitting chips can be arranged at will.
In one embodiment, a power connection 111 is provided on the substrate 11 for connection to a power supply to power the package for the chip. The power supply connection portions 111 are provided at four corners of the substrate 11. The power supply connection portion 111 is a via hole, and the pad 12 is connected to a power supply through a via hole.
In one embodiment, the bonding pad is connected with the red light emitting chip through a conductive member, and the green light emitting chip and the blue light emitting chip are respectively connected with the bonding pad through an insulating member. Specifically, the insulating member in this embodiment may be an insulating glue, and the conductive member may be a conductive glue or a conductive paste.
In one embodiment, the light emitting chip is connected with other parts of the packaging structure through wires. Specifically, the wire may be made of conductive materials such as gold wire, copper wire, and nickel wire.
To facilitate understanding of this scheme, other structures of the light emitting chip and the package structure are briefly described:
the light-emitting chip is provided with a first connecting position, in other areas on the substrate, other parts needing to be connected with the light-emitting chip are provided with a second connecting position connected with the light-emitting part, and the light-emitting chip and other parts are connected through the first connecting position and the second connecting position.
The above disclosure is only for the purpose of illustrating the preferred embodiments of the present invention, and it is therefore to be understood that the utility model is not limited by the scope of the appended claims.

Claims (10)

1. A package structure for a chip, comprising:
the device comprises a substrate, wherein a bonding pad fixing position is arranged on the upper end surface of the substrate and is arranged along the diagonal line of the substrate;
and the bonding pad is fixed on the bonding pad fixing position.
2. The package structure for a chip of claim 1, wherein the pad is rectangular or circular.
3. The package structure for chips of claim 2, wherein said substrate is rectangular and said pads are disposed along one diagonal of said substrate.
4. The package structure for a chip of claim 3, wherein said pads are symmetrically disposed about a diagonal of said substrate.
5. The package structure for chips of any one of claims 1 to 4, wherein a light emitting chip is disposed on the pad.
6. The package structure for chips of claim 5, wherein the light emitting chips comprise a red light emitting chip, a green light emitting chip, and a blue light emitting chip.
7. The package structure for chips of claim 6, wherein the bonding pads and the red light emitting chips are connected through a conductive member, and the green light emitting chips and the blue light emitting chips are connected to the bonding pads through an insulating member, respectively.
8. The package structure for a chip according to any one of claims 1 to 4, wherein a power supply connection portion to which a power supply is connected is provided on the substrate.
9. The package structure for chips as defined in claim 8, wherein said power supply connection parts are via holes provided at four corners of said substrate.
10. The package structure for chips of claim 5, wherein the light emitting chip is connected to other parts of the package structure by wires.
CN202120708284.5U 2021-04-07 2021-04-07 Packaging structure for chip Active CN215955303U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202120708284.5U CN215955303U (en) 2021-04-07 2021-04-07 Packaging structure for chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202120708284.5U CN215955303U (en) 2021-04-07 2021-04-07 Packaging structure for chip

Publications (1)

Publication Number Publication Date
CN215955303U true CN215955303U (en) 2022-03-04

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202120708284.5U Active CN215955303U (en) 2021-04-07 2021-04-07 Packaging structure for chip

Country Status (1)

Country Link
CN (1) CN215955303U (en)

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