CN215868587U - Display panel and display device - Google Patents

Display panel and display device Download PDF

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Publication number
CN215868587U
CN215868587U CN202121188394.XU CN202121188394U CN215868587U CN 215868587 U CN215868587 U CN 215868587U CN 202121188394 U CN202121188394 U CN 202121188394U CN 215868587 U CN215868587 U CN 215868587U
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China
Prior art keywords
driving
light
display
pixel
display area
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Active
Application number
CN202121188394.XU
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Chinese (zh)
Inventor
柏健
崔志佳
李豪凯
孙舟
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Guangdong Oppo Mobile Telecommunications Corp Ltd
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Guangdong Oppo Mobile Telecommunications Corp Ltd
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Priority to CN202121188394.XU priority Critical patent/CN215868587U/en
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Publication of CN215868587U publication Critical patent/CN215868587U/en
Priority to EP22810200.0A priority patent/EP4322146A4/en
Priority to PCT/CN2022/085019 priority patent/WO2022247467A1/en
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3266—Details of drivers for scan electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2077—Display of intermediate tones by a combination of two or more gradation control methods
    • G09G3/2081—Display of intermediate tones by a combination of two or more gradation control methods with combination of amplitude modulation and time modulation
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0233—Improving the luminance or brightness uniformity across the screen
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/06—Adjustment of display parameters
    • G09G2320/0626—Adjustment of display parameters for control of overall brightness
    • G09G2320/0633—Adjustment of display parameters for control of overall brightness by amplitude modulation of the brightness of the illumination source
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/06—Adjustment of display parameters
    • G09G2320/0626—Adjustment of display parameters for control of overall brightness
    • G09G2320/064—Adjustment of display parameters for control of overall brightness by time modulation of the brightness of the illumination source
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/06—Adjustment of display parameters
    • G09G2320/0686—Adjustment of display parameters with two or more screen areas displaying information with different brightness or colours
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/16—Calculation or use of calculated indices related to luminance levels in display data
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2011—Display of intermediate tones by amplitude modulation
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2014—Display of intermediate tones by modulation of the duration of a single pulse during which the logic level remains constant

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

The embodiment of the application relates to a display panel and a display device, wherein the display panel comprises a first display area and a second display area, wherein the first display area comprises a plurality of first pixel units, the second display area is arranged adjacent to the first display area, the second display area comprises a plurality of second pixel units, and the load of the second pixel units is smaller than that of the first pixel units; the first driving circuit is respectively connected with each first pixel unit and used for driving each first pixel unit to emit light by adopting a pulse width modulation dimming mode; and the second driving circuit is respectively connected with each second pixel unit and used for driving each second pixel unit to emit light by adopting one of a pulse width modulation dimming mode and a direct current dimming mode according to the target brightness of the display panel, so that the adjustment of the partition light-emitting brightness of the first display area and the second display area can be realized, the brightness difference of the first display area and the second display area can be eliminated, and the brightness of the first display area and the second display area is uniform.

Description

Display panel and display device
Technical Field
The embodiment of the application relates to the technical field of display, in particular to a display panel and display equipment.
Background
With the continuous development of science and technology, electronic equipment is endlessly developed, and great convenience is brought to daily life and entertainment of people. At present, electronic equipment is continuously developed towards a large screen, and in order to improve the screen occupation ratio of the electronic equipment and really realize a full-screen, the technology of a camera under the screen is concerned.
Generally, a display screen of an electronic device is divided into a first display area and a second display area, wherein the second display area is located in a camera placement area under the screen. The light emitting device of the second display area is usually disposed in the visual area of the camera, which may cause non-uniform display brightness between the first display area and the second display area, and reduce the display effect of the electronic device.
SUMMERY OF THE UTILITY MODEL
The embodiment of the application provides a display panel and display equipment, which can ensure the brightness uniformity of a first display area and a second display area and improve the display effect of the display panel.
A display panel, comprising:
a first display region including a plurality of first pixel units,
a second display area disposed adjacent to the first display area, the second display area including a plurality of second pixel units, wherein a load of the second pixel units is less than a load of the first pixel units;
the first driving circuit is respectively connected with each first pixel unit and used for driving each first pixel unit to emit light by adopting a pulse width modulation dimming mode;
and the second driving circuit is respectively connected with each second pixel unit and used for driving each second pixel unit to emit light by adopting one of the pulse width modulation dimming mode and the direct current dimming mode according to the target brightness of the display panel.
A display device, comprising: a photosensitive device and the display panel; the photosensitive device is arranged corresponding to the first display area.
The display panel and the display device comprise a first display area, a second display area, a first driving circuit and a second driving circuit. The first driving circuit can drive each first pixel unit of the first display area to emit light by adopting a pulse width modulation dimming mode; the first driving circuit can drive each second pixel unit of the second display area to emit light by adopting the pulse width modulation dimming mode or the direct current dimming mode according to the target brightness of the display panel, so that the adjustment of the partition light emitting brightness of the first display area and the second display area can be realized. For example, the first driving circuit may adjust the brightness of each first pixel unit of the first display area by using a pwm dimming mode, and the driving current is large, so as to improve the brightness of the first display area, avoid the situation that the brightness of the first display area is low or the brightness of the second display area is high, and eliminate the brightness difference between the first display area and the second display area, so as to make the brightness of the first display area and the second display area uniform.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments or the conventional technologies of the present application, the drawings used in the descriptions of the embodiments or the conventional technologies will be briefly introduced below, it is obvious that the drawings in the following descriptions are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a schematic structural diagram of a display device according to an embodiment;
fig. 2 is a schematic diagram illustrating a trace distribution in a first display area according to an embodiment;
FIG. 3 is a circuit diagram of a pixel unit according to an embodiment;
FIG. 4 is a schematic distribution diagram of a driving circuit of a display panel according to an embodiment;
FIG. 5 is a circuit diagram of a pixel driving circuit according to an embodiment;
FIG. 6 is a schematic distribution diagram of first driving circuits of a first display area according to an embodiment;
FIG. 7 is a distribution diagram of a first driving circuit of a first display area according to yet another embodiment;
FIG. 8 is a diagram illustrating a distribution of second driving circuits in a second display area according to an embodiment;
FIG. 9 is a timing diagram of driving the first display area and the second display area according to an embodiment;
fig. 10 is a distribution diagram of the first driving circuit and the second driving circuit of the display panel according to an embodiment.
Detailed Description
To facilitate an understanding of the embodiments of the present application, the embodiments of the present application will be described more fully below with reference to the accompanying drawings. Preferred embodiments of the present application are shown in the drawings. The embodiments of the present application may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the embodiments of this application belong. The terminology used herein in the description of the embodiments of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the embodiments of the present application. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
It will be understood that, as used herein, the terms "first," "second," and the like may be used herein to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish one element from another. For example, a first driver circuit may be referred to as a second driver circuit, and similarly, a second driver circuit may be referred to as a first driver circuit, without departing from the scope of the present application. The first and second drive circuits are both drive circuits, but they are not the same drive circuit.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present application, "plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.
The embodiment of the application provides a display device, which can be a smart phone, a tablet computer, a game device, an Augmented Reality (AR) device, a notebook, a desktop computing device, a wearable device and the like. For convenience of understanding, the display device is exemplified as a mobile phone. As shown in fig. 1 and 4, the display device 10 includes a display panel 100, and a display area of the display panel 100 includes a first display area 101 and a second display area 102 which are adjacent to each other. In one embodiment, the shape of the first display area 101 may be a circle, a rectangle, an ellipse, a polygon, an irregular shape, etc., which is not limited in the present invention. In one embodiment, the first display area 101 may be located in any area of the display area, for example, the first display area 101 may be located in a middle area of the display area, a left side area near an edge of the display area, or a right side area near the edge of the display area. In the embodiment of the present application, the position of the first display area 101 is not further limited.
With continued reference to fig. 1, a photosensitive device 103 is disposed in the display device 10, wherein at least a portion of the photosensitive device 103 is disposed corresponding to the first display area 101. The light sensing device 103 performs testing and control based on optical parameters by receiving light. Illustratively, the light sensing device 103 is disposed below the first display region 101, and the light sensing device 103 is used for transmitting and/or receiving light signals through the first display region 101 of the display panel 100. That is, the first display region 101 is a region located above the photosensitive device 103, the upper direction in the present embodiment refers to a direction directed from the back case of the display apparatus to the display screen, and the lower direction refers to a direction directed from the display screen to the back case. Wherein, photosensitive device 103 can be the camera, and photosensitive device 103 still can be ambient light sensor, optical distance sensor (for example, infrared sensor, laser sensor, proximity sensor, distance sensor, optical distance sensor), structured light module, Time of flight range (TOF) lens module, optics fingerprint sensor etc.. It should be noted that the various photosensitive devices 103 are only used for exemplary illustration, and are not used to specifically limit the scope of protection of the present application. For convenience of description, in the embodiment of the present application, the photosensitive device 103 is taken as an example of a camera.
As shown in fig. 2, the first display area 101 of the display panel includes a plurality of first pixel units (not shown), and the second display area 102 includes a plurality of second pixel units (not shown). The plurality of first pixel units and the plurality of second pixel units are called an array, the array has a row direction and a column direction, the row direction can be used as a first direction of the display panel, and the column direction can be used as a second direction of the display panel. Each of the first pixel unit and the second pixel unit may include a light emitting device and a pixel driving circuit connected to the light emitting device for driving the light emitting device to emit light. The Light Emitting device may be, but is not limited to, an Organic Light-Emitting diode (OLED), a Quantum Dot Light Emitting diode (QLED), a Micro Light Emitting diode (Micro LED), and the like. In addition, the embodiments of the present application are described by taking an example in which the light emitting device is an organic light emitting diode. The light emitting devices can be organic light emitting diodes with different colors, such as red OLEDs, green OLEDs, blue OLEDs and the like, the pixel driving circuits of the light emitting devices with different colors can be the same, but the light emitting materials of the light emitting devices with different colors are different, so that display with different colors is realized, and full-color display of the display equipment is realized.
In an application, when the display device is a device having a display panel and an off-screen camera, the first display area is an area located above the camera. For convenience of explanation, as shown in fig. 3, a light emitting device located in the first display region may be referred to as a first light emitting device 110a, and a pixel driving circuit driving the first light emitting device 110a may be referred to as a first pixel driving circuit 120 a. Accordingly, the light emitting device located in the second display region is referred to as a second light emitting device, and a pixel driving circuit driving the second light emitting device is referred to as a second pixel driving circuit.
With continued reference to fig. 2, in order to make the pixel density (PPI) of the first display region 101 and the second display region 102 the same, for example, 400PPI, the first pixel driving circuit 120a is generally disposed at the periphery of the first display region 101. The area where the first pixel driving circuit 120a is disposed is referred to as a transition area 104 or an external area, and the first pixel driving circuit 120a located in the transition area 104 may be electrically connected to the first light emitting device 110a through a metal trace L. Specifically, the metal trace L may be a transparent metal line, such as an Indium Tin Oxide (ITO) metal line, an Aluminum Zinc Oxide (AZO) metal line, or the like.
Because the first pixel driving circuits 120a of different first light emitting devices 110a are located at different positions in the display panel, the lengths of the metal wires L of the first light emitting devices 110a are different, and further RC loads (RC Loading) generated on the metal wires L are also different, for example, the RC loads in the first display area 101 gradually increase from outside to inside, so that the display of the first display area 101 and the second display area 102 is uneven, and the display effect of the display device is seriously reduced.
In order to solve the above problem, embodiments of the present application provide a display panel that can implement a divisional luminance adjustment of the first display area 101 and the second display area 102. Specifically, the first display area 101 may be adjusted based on a Pulse Width Modulation (PWM) dimming mode, the adjustment mode has a large driving current, and can improve the brightness of the first display area 101, and the second display area 102 may select a proper dimming mode (e.g., a PWM dimming mode or a dc dimming mode) according to the target brightness, so as to adjust the brightness of the second display area 102, and avoid the situation that the brightness of the first display area 101 is lower or the brightness of the second display area 102 is higher, so that the brightness of the first display area 101 and the brightness of the second display area 102 are consistent, and further the display effect of the display panel may be improved.
With continued reference to fig. 4, in one embodiment, the display panel includes a display area AA and a non-display area NAA disposed around the display area. The display panel further includes a first driving circuit 130 and a second driving circuit 140 located in the non-display area NAA. The first driving circuit 130 is connected to each of the first pixel units, and is configured to drive each of the first pixel units to emit light in a pulse width modulation dimming mode. Specifically, the first driving circuit 130 may provide a driving signal to the first pixel driving circuit to control the first pixel driving circuit to drive the first light emitting device connected thereto to emit light. The PWM dimming mode is used for adjusting the brightness by controlling the pulse width of each transistor switching signal in the first pixel driving circuit, and the PWM dimming is used for controlling the light-emitting time by changing the pulse number and the pulse width of the transistor switching signal to be started in the light-emitting stage, so that the aim of adjusting the brightness is fulfilled.
As shown in fig. 5, for convenience of explanation, a driving configuration in which the pixel driving circuit is 7T1C will be described as an example. The pixel driving circuit includes a driving transistor T1, a data writing transistor T2, a gate reset transistor T4, an anode reset transistor T7, a threshold compensation transistor T3, a first light emission control transistor T5, a second light emission control transistor T6, and a storage capacitor C1. The gate of the data writing transistor T2, the gate of the threshold compensation transistor T3, and the gate of the anode reset transistor T7 are all configured to receive the second scan signal scan (n); a first pole of the Data writing transistor T2 is connected to the Data signal line to receive the Data signal Data, and a second pole of the Data writing transistor T2 is connected to the first pole of the driving transistor T1. The gate of the gate reset transistor T4 is for receiving the first Scan signal Scan (n-1).
In the PWM dimming mode, the Data signal Data provided by the Data signal line is unchanged, and in the on period of the second scan signal scan (n) provided by the scan signal line, the Data writing transistor T2 is turned on, so that the Data signal Data is transmitted to the driving transistor T1, and the driving transistor T1 is controlled to be turned on, and the power voltage VDD provided by the power voltage terminal is kept unchanged. In this process, the driving transistors T1 of all the light emitting devices 110 are turned on to the same degree, and thus, the brightness of the light emitting devices 110 can be adjusted by only adjusting the duty ratio of the emission control signal EM applied to the gate of the second emission control transistor T6 to change the emission time of the light emitting devices 110 per frame. Wherein the EM signal is a PWM signal. The PWM signal is an ac signal with a certain frequency and duty ratio provided according to the brightness requirement of the pixel, and because the frequency of the PWM signal is much higher than the resolving power of human eyes, the brightness of the pixel can change along with the change of the duty ratio of the PWM signal in visual effect.
It should be noted that the pixel driving circuit in the embodiment of the present application is not limited to the pixel structure of "7T 1C" described above, and may include multiple structures, such as "2T 1C", "3T 1C", "6T 1C", "6T 2C", "7T 2C", or "8T 1C".
And a second driving circuit 140, respectively connected to each of the second pixel units, for driving each of the pixel units in the second display area 102 to emit light according to a target brightness of the display panel by using one of a PWM dimming mode and a Direct Current (DC) dimming mode. Specifically, the second driving circuit 140 may provide a driving signal to the second pixel driving circuit to control the second pixel driving circuit to drive the second light emitting device connected thereto to emit light.
With continued reference to fig. 5, the current of the light emitting device 110 is expressed as:
Ioled＝k(VDD-VDATA)2
in the formula IoledK is a coefficient for the current of the light emitting device. From the formula, the power voltage VDD and the voltage V of the Data signal DataDATAPlays a decisive role in the current of the light-emitting device. In the process of the DC dimming mode, the power supply voltage VDD can be kept unchanged, and the voltage V of the Data signal Data is adjustedDATAThe current of the light emitting device can be adjusted, thereby realizing brightness adjustment.When scanning the pixel units of each row, the Data signal Data needs to change the voltage amplitude value according to the brightness required by each pixel unit. Illustratively, if the brightness is to be adjusted up, the voltage V of the Data signal Data is reducedDATA(ii) a If the brightness is to be reduced, the voltage V of the Data signal Data is increasedDATA。
Specifically, the display panel may pre-construct and store a corresponding relationship between the target brightness and the preset dimming mode. For example, when the target brightness is L1, the pixel cells of the second display area 102 may be dimmed by the PWM dimming mode, and when the target brightness is L2, the pixel cells of the second display area 102 may be dimmed by the dc dimming mode.
The display panel provided by the embodiment of the application comprises a first display area 101, a second display area 102, a first driving circuit 130 and a second driving circuit 140. The first driving circuit 130 may drive each of the first pixel units of the first display region 101 to emit light in a PWM dimming mode; the second driving circuit 140 may drive each of the second pixel units of the second display area 102 to emit light according to the target brightness of the display panel in one of the PWM dimming mode and the dc dimming mode, so that the divisional brightness adjustment of the first display area 101 and the second display area 102 may be achieved, and in addition, the first driving circuit 130 may dim each of the first pixel units of the first display area 101 in the PWM dimming mode, and the driving current is large, so as to improve the brightness of the first display area 101; the second driving circuit 140 may adopt a PWM dimming mode or a dc dimming mode suitable for the target brightness of the current display panel, which may improve the dimming flexibility of each second pixel unit in the second display area 102, eliminate the brightness difference between the main and auxiliary screens, and ensure the eye protection effect of the second display area 102.
In one embodiment, when the target brightness is smaller than a first threshold, the second driving circuit 140 drives each pixel unit of the second display area 102 to emit light in the PWM dimming mode; when the target brightness is greater than a second threshold, the second driving circuit 140 drives each pixel unit of the second display area 102 to emit light in a dc dimming mode, wherein the first threshold is less than or equal to the second threshold. In the embodiment of the present application, the sizes of the first threshold and the second threshold are not further limited, and may be set according to actual requirements.
In the embodiment of the present application, for the first display area 101, the first driving circuit 130 may dim each pixel unit in the PWM dimming mode, and for the second display area 102, the second driving circuit 140 may dim each second pixel unit in one of the PWM dimming mode and the DC dimming mode according to the target brightness. For example, as shown in table 1, for the second display area 102, the DC dimming mode is used if the target brightness is high brightness, and the PWM dimming mode is used if the target brightness is low brightness.
Table 1 shows dimming modes corresponding to different target luminances in different first and second display regions
Target brightness 500nit 100nit 10nit 2nit
A first display region PWM3 PWM4 PWM5 PWM2
A second display region DC1 DC2 PWM1 PWM2
In one embodiment, the display panel further stores a corresponding relationship between the target brightness and the dimming parameter of the dimming mode in a partition-by-partition manner. For example, for the first display area 101, a mapping relationship between the target brightness and the dimming parameter PWM3 may be stored in advance. If the target luminance is 100nit, the first driving circuit 130 outputs the emission control signal EM as a PWM4 signal. For the second display area 102, the target brightness and the dimming parameter PWM3, V may be stored in advanceDATAIf the target brightness is 100nit, the second driving circuit 140 outputs the emission control signal EM and simultaneously adjusts the dimming parameter VDATATo correspond to dimming modes with DC 2.
In this embodiment, the first driving circuit 130 and the second driving circuit 140 are arranged to respectively dim the pixel units of the first display area 101 and the second display area 102, specifically, the first driving circuit 130 performs full brightness dimming using a PWM dimming mode with strong driving capability, the driving current is large, the brightness of the first display area 101 is improved, the second driving circuit 140 can perform dimming using a DC dimming mode when the target brightness is high brightness, the eye protection effect can be started, meanwhile, the defect of screen scrolling can be avoided, and the display quality can be further improved. When the target brightness is low brightness, the PWM dimming mode is used to perform dimming, which can avoid the occurrence of non-uniform brightness in the row direction of the display panel due to the large difference in the characteristics of the transistors, and in addition, the first driving circuit 130 and the second driving circuit 140 are used to perform dimming on the first display area 101 and the second display area 102, respectively, so as to eliminate the brightness difference of the first display area 101 and the second display area 102 as a whole, so that the brightness of the first display area 101 is consistent with the brightness of the second display area 102, thereby improving the display effect of the display panel.
With continued reference to fig. 4, in one embodiment, the display panel further includes a display driving unit 150 located in the non-display area NAA. The Display driving unit 150 may be a Display Driver IC (DDIC). Specifically, the display driving unit 150 is configured with a first group driving terminal and a second group driving terminal (not shown in the drawings). The first group of driving ends can be used for outputting a first group of driving signals. Specifically, the first group of driving terminals may include a first scanning trigger signal terminal and a first light emitting trigger signal terminal. The first set of driving signals may include a first scan trigger signal output by the first scan trigger signal terminal and a first light emission trigger signal output by the first light emission trigger signal terminal. Further, the first set of driving signals may further include a plurality of first clock signals output from the plurality of first clock terminals. Correspondingly, the second group of driving terminals can be used for outputting a second group of driving signals. The second group of driving signals may include a second scan trigger signal output by the second scan trigger signal terminal and a second light emitting trigger signal output by the second light emitting trigger signal terminal. Further, the second set of driving signals may further include a plurality of second clock signals output by the plurality of second clock terminals.
Specifically, the first driving circuit 130 is connected to a first group of driving terminals of the display driving unit 150, and each first pixel unit connected to the first driving circuit 130 can be driven to emit light according to a first group of driving signals output by the first group of driving terminals. Correspondingly, the second driving circuit 140 is connected to the second group of driving terminals of the display driving unit 150, and can drive each second pixel unit connected to the second driving circuit 140 to emit light according to a second group of driving signals output by the second group of driving terminals. Although fig. 4 does not show the connection relationship between the display driving unit 150 and the first driving circuit 130 and the second driving circuit 140, the display driving unit 150 is not connected to the first driving circuit 130 and the second driving circuit 140.
In one embodiment, the first scan trigger signal is the same as the second scan trigger signal, and the first light emission trigger signal is different from the second light emission trigger signal. That is, the first driving circuit 130 and the second driving circuit 140 may share one set of scan trigger signals, but the light emitting trigger signals of the first driving circuit 130 and the second driving are independent of each other and are not shared, so as to implement the discrete driving light emission of the first display region 101 and the second display region 102.
In one embodiment, the first scan trigger signal is different from the second scan trigger signal, and the first light emission trigger signal is different from the second light emission trigger signal. That is, the scan trigger signal and the light emission trigger signal of the first driving circuit 130 and the second driving circuit 140 are independent from each other and are not shared, so as to realize the discrete driving light emission of the first display region 101 and the second display region 102.
As shown in fig. 6 and 7, in one embodiment, the plurality of second pixel units of the first display area 101 are divided into a first pixel block 101a and a second pixel block 101 b. The first pixel block 101a and the second pixel block 101b are arranged along a first direction of the display panel and are arranged in an axisymmetric manner, the direction of the symmetry axis is the same as a second direction, and the first direction is perpendicular to the second direction. In the embodiment of the present application, the first direction may be understood as a row direction, and the second direction may be understood as a column direction.
The display panel further includes: a plurality of first gate lines 111 and a plurality of first light emission control lines 112 disposed at the first pixel block 101a, and a plurality of second gate lines 113 and a plurality of second light emission control lines 114 disposed at the second pixel block 101 b. Specifically, the first gate line 111 is connected to each first pixel unit of the same pixel row in the first pixel block 101 a; the second gate line 113 is connected to each first pixel unit of the same pixel row in the second pixel block 101 b. The first light-emitting control line 112 is connected to each first pixel unit of at least one pixel row in the first pixel block 101 a; the second light emission control line 114 is connected to each first pixel unit of at least one pixel row in the second pixel block 101 b.
The first driving circuit may be understood as a Gate Driver on Array (GOA) circuit, which may also be referred to as a GOA circuit. The first driving circuit 130 includes a plurality of cascaded first gate driving units 131, a plurality of cascaded second gate driving units 132, a plurality of cascaded first light emission control units 133, and a plurality of cascaded second light emission control units 134. Each gate driving unit in the first driving circuit 130 includes a first gate input terminal and a first gate output terminal, wherein the first gate output terminal is used for outputting a first scan signal. Each of the light emission control units in the first driving circuit 130 includes a first light emission input terminal, a first light emission output terminal for outputting a first light emission control signal.
A first gate input end of the first-stage first gate driving unit 131 is electrically connected to a first scan trigger signal end, and in each adjacent two stages of the first gate driving units 131, a first gate input end of the next-stage first gate driving unit 131 is electrically connected to a first gate output end of the previous-stage first gate driving unit 131. The first gate driving unit 131 is configured to drive the first gate line 111 by using a single-side driving method according to the first scan trigger signal. That is, the first gate output terminal of each stage of the first gate driving unit 131 is correspondingly connected to one first gate line 111, so as to send the first scanning signal scan (n) to the first gate line 111 connected thereto according to the first description trigger signal, so as to implement single-row single-side driving on the first gate line 111.
A first gate input end of the first-stage second gate driving unit 132 is electrically connected to the first scan trigger signal end, and in each adjacent two stages of second gate driving units 132, a first gate input end of the next-stage second gate driving unit 132 is electrically connected to a first gate output end of the previous-stage second gate driving unit 132. The second gate driving unit 132 is configured to drive the second gate line 113 in a single-side driving manner according to the first scan trigger signal. That is, the first gate output terminal of each stage of the second gate driving unit 132 is correspondingly connected to one second gate line 113, so as to send the first scanning signal scan (n) to the second gate line 113 connected thereto according to the first description trigger signal, so as to implement single-row single-side driving on the second gate line 113.
A first light-emitting input end of the first-stage first light-emitting control unit 133 is electrically connected to the first light-emitting trigger signal end, and in each adjacent two stages of the first light-emitting control units 133, a first light-emitting input end of the next-stage first light-emitting control unit 133 is electrically connected to a first light-emitting output end of the previous-stage first light-emitting control unit 133. The first gate driving unit 131 is configured to drive the first gate line 111 by using a single-side driving method according to the first scan trigger signal. That is, the first light emitting output end of each stage of the first light emitting control unit 133 is correspondingly connected to one first light emitting control line 112, so as to send the first light emitting control signal to the first light emitting control line 112 connected thereto according to the first light emitting trigger signal, thereby implementing single-side driving on the first light emitting control line 112.
A first light-emitting input end of the first-stage second light-emitting control unit 134 is electrically connected to the first light-emitting trigger signal end, and in each adjacent two stages of second light-emitting control units 134, a first light-emitting input end of the next-stage second light-emitting control unit 134 is electrically connected to a first light-emitting output end of the previous-stage second light-emitting control unit 134. A first light emitting output end of each stage of the second light emitting control unit 134 is correspondingly connected to one second light emitting control line 114, so as to send a first light emitting control signal to the second light emitting control line 114 connected thereto according to the first light emitting trigger signal, thereby implementing single-side driving on the first light emitting control line 112.
In the embodiment of the present application, since the number of the first pixel units in the first display area 101 is small, the first driving circuit 130 can drive each gate line and the light-emitting control line in a single-side driving manner, so as to meet the driving requirement, and in addition, it can be avoided that a gate connection line for connecting the first gate driving unit 131 and the second gate driving unit 132 is arranged in the first display area 101, so as to reduce the frame width of the first display area 101, and further improve the screen occupation ratio of the first display area 101.
In one embodiment, when the first light-emitting control line 112 is connected to the first pixel units in two adjacent rows in the first pixel block 101a, and the second light-emitting control line 114 is connected to the first pixel units in two adjacent rows in the second pixel block 101b, the first driving circuit 130 thereof may drive the first light-emitting control line 112 by using a double-row single-side driving method, and drive the second light-emitting control line 114 by using a double-row single-side driving method. Since the number of the first pixel units in the first display region 101 is small, the driving requirement can be satisfied and the driving efficiency can be improved by the double-row single-side driving method.
In one embodiment, the first gate output terminals of the first gate driving unit 131 and the second gate driving unit 132 in the same row may also be communicated with each other, that is, the first gate line 111 and the second gate line 113 in the same row are connected. Therefore, the first gate line 111 and the second gate line 113 in the same row may be commonly driven by the first gate driving unit 131 and the second gate driving unit 132 to achieve dual-edge driving of the first gate line 111 and the second gate line 113. Correspondingly, the first light emitting output ends of the first light emitting control unit 133 and the second light emitting control unit 134 in the same row may also be communicated with each other, that is, the first light emitting control line 112 and the second light emitting control line 114 in the same row are connected to implement bilateral driving of the first light emitting control line 112 and the second light emitting control line 114.
As shown in fig. 8, in one embodiment, the second display region includes a first sub-display region 102a and a second sub-display region 102b, wherein the first sub-display region 102a is located on at least one side of the first display region 101, and the first sub-display region 102a and the first display region 101 are arranged along a first direction of the display panel. That is, at least one first pixel unit located in the first display region 101 and at least one second pixel unit located in the first sub-display region 102a are arranged on the same straight line in the first direction. Optionally, the first sub-display area 102a may also be located at two sides of the first display area 101, or the first sub-display area 102a may also be disposed around the first display area 101. In the embodiment of the present application, the specific area of the first sub-display area 102a is not limited.
Specifically, the second driving circuit may include a first sub driving circuit and a second sub driving circuit. The first sub-driving circuit is connected to the second group of driving terminals and each second pixel unit of the first sub-display area 102a, and is configured to drive each second pixel unit of the first sub-display area 102a to emit light according to the second group of driving signals. The second sub-driving circuit is respectively connected to the second group of driving terminals and the second pixel units of the second sub-display area 102b, and is configured to drive the second pixel units of the second sub-display area 102b to emit light according to the second group of driving signals. It should be noted that, in the embodiment of the present application, the second group of driving signals received by the first sub-driving circuit and the second sub-driving circuit are the same.
Specifically, the driving modes of the first sub-driving circuit and the second sub-driving circuit may be the same or different. For example, the first sub driving circuit may drive the driving lines (e.g., gate lines, light emitting control lines) disposed in the first sub display region 102a in a single-side driving manner, and the second sub driving circuit may drive the driving lines (e.g., gate lines, light emitting control lines) disposed in the second sub display region 102b in a double-side driving manner.
With continued reference to FIG. 8, in one embodiment, the second pixel units of the first sub-display area 102a are divided into a third pixel block 1021 and a fourth pixel block 1022. The third pixel block 1021, the first pixel block 101a, the second pixel block 101b, and the fourth pixel block 1022 are arranged along a first direction (i.e., a row direction) of the display panel. Specifically, the third pixel block 1021 and the fourth pixel block 1022 may be symmetrically distributed on both sides of the first display area 101. Wherein the display panel further comprises: a plurality of third gate lines 115 and a plurality of third light emission control lines 116 disposed at the third pixel block 1021, and a plurality of fourth gate lines 117 and a plurality of fourth light emission control lines 118 disposed at the fourth pixel block 1022. Specifically, the third gate line 115 is connected to each second pixel unit of the same pixel row in the third pixel block 1021; the fourth gate line 117 is connected to each second pixel unit of the same pixel row in the fourth pixel block 1022. The third light-emitting control line 116 is connected to each second pixel unit of at least one pixel row in the third pixel block 1021; the fourth light emitting control line 118 is connected to each second pixel unit of at least one pixel row in the fourth pixel block 1022.
The first sub-driving circuit includes a plurality of cascaded third gate driving units 141, a plurality of cascaded fourth gate driving units 142, a plurality of cascaded third light emission control units 143, and a plurality of cascaded fourth light emission control units 144. Each gate driving unit in the first sub-driving circuit comprises a second gate input end and a second gate output end, wherein the second gate output end is used for outputting a second scanning signal. Each light-emitting control unit in the first sub-driving circuit comprises a second light-emitting input end and a second light-emitting output end, and the second light-emitting output end is used for outputting a second light-emitting control signal.
The second gate input end of the first-stage third gate driving unit 141 is electrically connected to the second scanning trigger signal end, and in each two adjacent stages of the first gate driving units 131, the second gate input end of the next-stage third gate driving unit 141 is electrically connected to the second gate output end of the previous-stage third gate driving unit 141. The third gate driving unit 141 may drive the third gate line 115 in a single-side driving manner according to the second scan trigger signal.
The second gate input end of the first-stage fourth gate driving unit 142 is electrically connected to the second scanning trigger signal end, and in every two adjacent stages of the fourth gate driving units 142, the second gate input end of the next-stage fourth gate driving unit 142 is electrically connected to the second gate output end of the previous-stage fourth gate driving unit 142. The fourth gate driving unit 142 may drive the fourth gate line 117 in a single-side driving manner according to the second scan trigger signal.
A second light emitting input terminal of the first-stage third light emitting control unit 143 is electrically connected to the second light emitting trigger signal terminal, and in each adjacent two-stage third light emitting control unit 143, a second light emitting input terminal of the next-stage third light emitting control unit 143 is electrically connected to a second light emitting output terminal of the previous-stage third light emitting control unit 143. The third gate driving unit 141 may drive the third gate line 115 in a single-side driving manner according to the second scan trigger signal.
A second light emitting input end of the first-stage fourth light emitting control unit 144 is electrically connected to the second light emitting trigger signal end, and in every two adjacent stages of the fourth light emitting control units 144, a second light emitting input end of the next-stage fourth light emitting control unit 144 is electrically connected to a second light emitting output end of the previous-stage fourth light emitting control unit 144. The fourth gate driving unit 142 may drive the fourth gate line 117 in a single-side driving manner according to the second scan trigger signal.
Specifically, when the third light-emitting control line 116 is connected to each second pixel unit in two adjacent rows in the second pixel block 101 b; when the fourth light-emitting control line 118 is connected to the second pixel units in the second pixel block 101b to two adjacent rows, the first sub-driving circuit can drive the third light-emitting control line 116 in a double-row single-side driving manner, and drive the fourth light-emitting control line 118 in a double-row single-side driving manner.
In one embodiment, the second gate output terminals of the third gate driving unit 141 and the fourth gate driving unit 142 in the same row may also be communicated with each other, that is, the third gate line 115 and the fourth gate line 117 in the same row are connected. Therefore, the third gate line 115 and the fourth gate line 117 located in the same row may be commonly driven by the third gate driving unit 141 and the fourth gate driving unit 142 to achieve dual-edge driving of the third gate line 115 and the fourth gate line 117. Accordingly, the second light emitting output terminals of the third light emitting control unit 143 and the fourth light emitting control unit 144 in the same row may also be communicated with each other, that is, the third light emitting control line 116 and the fourth light emitting control line 118 in the same row are connected to realize the bilateral driving of the third light emitting control line 116 and the fourth light emitting control line 118.
With continued reference to fig. 8, in one embodiment, the display panel further includes: a plurality of fifth gate lines 1191 and a plurality of fifth light-emitting control lines 1192 disposed in the second sub-display region 102 b. The fifth gate line 1191 is connected to each second pixel unit in the same pixel row in the second sub-display area 102 b; the fifth light-emitting control line 1192 is connected to each of the second pixel units in at least one of the pixel rows in the second sub-display region 102 b.
Specifically, the second sub-driving circuit includes a plurality of cascaded fifth gate driving units 145 and a plurality of cascaded fifth light emission control units 146. The fifth gate driving units 145 are symmetrically disposed on two sides of the second sub-display region 102b, and the fifth light-emitting control units 146 are also symmetrically disposed on two sides of the second sub-display region 102 b. Specifically, a second gate input end of the first-stage fifth gate driving unit 145 is electrically connected to the second scanning trigger signal end, and in every two adjacent stages of the fifth gate driving units 145, a second gate input end of the next-stage fifth gate driving unit 145 is electrically connected to a second gate output end of the previous-stage fifth gate driving unit 145. The fifth gate line 1191 is connected to the two fifth gate driving units 145 in the same row, so that the second sub-driving circuit can drive the fifth light-emitting control line 1192 in a dual-edge driving manner.
Optionally, when the fifth light-emitting control line 1192 is connected to each second pixel unit in two adjacent rows in the second sub-display area 102b, the second sub-driving circuit may drive the fifth light-emitting control line 1192 in a double-row double-sided driving manner, so that the gate driving capability and the light-emitting control driving capability of the second sub-display area 102b with a larger number of second pixel units are improved, and the response speed and the uniformity of the second sub-display area 102b are improved.
As shown in fig. 9, for convenience of explanation, the operation principle of the pixel driving circuit shown in fig. 5 for driving the first pixel cell of the a-th row of the first display region and the second pixel cell of the second row of the first sub-display region to achieve the same luminance (e.g., 100nit) of the first display region and the second display region is described. Wherein, the first scan signal inputted to the first display region can be represented by scan (a), and the second scan signal inputted to the first display region can be represented by scan (b); the first Scan signal input to the second display region may be represented by Scan (1), and the second Scan signal input to the second display region may be represented by Scan (2).
In the reset phase at time T1, the first Scan signals Scan (a) and Scan (1) input to the gate reset transistor T4 are simultaneously pulled low, and the gate reset transistor T4 is turned on, so that the gate transistors in the first pixel driving circuit and the second pixel driving circuit are reset.
In the charging stage at time T2, the second Scan signals Scan (b) and Scan (2) input to the data writing transistor T2 are simultaneously pulled low, the data writing transistor T2 is turned on, and the data writing transistor T2 of the first pixel driving circuit and the second pixel driving circuit can be charged. The first Data signal Data of the first pixel driving circuit and the second Data signal Data of the second pixel driving circuit can be set to be different, so that the same brightness can be displayed in the first display region 101 and the second display region 102. Specifically, the Data voltage Vdata of the Data signal Data is related to the duty ratio of the light emission control signal.
In the light-emitting period at time T3, the first driving circuit 130 may use the PWM dimming mode to correspondingly output a first light-emitting control signal em (a) corresponding to a target luminance of 100nit to dim each first pixel unit of the first display area, where the first light-emitting control signal em (a) is a PWM signal; the second driving circuit 140 may output the second emission control signal EM (1) corresponding to the DC dimming mode to dim each second pixel unit of the second display region 102, and adjust the data voltage Vdata of the second data signal to a voltage corresponding to the target luminance of 100 nit.
As shown in fig. 10, in one embodiment, the non-display area NAA includes a first area 151, a second area 152, a third area 153, and a fourth area 154, which are sequentially connected. The first region 151 and the third region 153 are disposed in parallel, the second region 152 and the fourth region 154 are disposed in parallel, and the second region 152 is connected to the first region 151 and the third region 153, respectively. The first driving circuit 130 is disposed in the first region 151 near the first display region 101. That is, if the first display area 101 is close to the upper frame of the display panel, the first area 151 may be understood as an area located at the upper side of the display area AA, if the first display area 101 is close to the right frame of the display panel, the first area 151 may be understood as an area located at the right side of the display area AA, if the first display area 101 is close to the left frame of the display panel, the first area 151 may be understood as an area located at the left side of the display area AA, and if the first display area 101 is close to the lower frame of the display panel, the first area 151 may be understood as an area located at the lower side of the display area AA.
For convenience of explanation, the first display area 101 is close to the upper frame of the display panel, and the display area AA is a rectangular area. Wherein the non-display area NAA includes a first area 151, a third area 153, a fourth area 154, and a second area 152 located at the upper side, the lower side, the left side, and the right side of the display area AA, respectively. The first driving circuit 130 may be disposed in the first region 151, and the second driving circuits 140 are symmetrically distributed in the second region 152 and the fourth region 154. Specifically, the first sub-driving circuits are symmetrically disposed in the second region 152 and the fourth region 154. Illustratively, the third gate driving unit 141 and the third light emission control unit 143 are disposed in the fourth region 154, and the fourth gate driving unit 142 and the fourth light emission control unit 144 are disposed in the second region 152. The second sub-driving circuits are also symmetrically disposed in the second region 152 and the fourth region 154. Illustratively, the fifth gate driving units 145 are symmetrically distributed in the second and fourth regions 152 and 154, and the fifth light emission control units 146 are also symmetrically distributed in the second and fourth regions 152 and 154.
In the embodiment of the present application, the first driving circuit 130 is disposed in the first region 151 close to the first display region 101, so that the routing distance of the gate line and the light emitting control line in the first driving circuit 130 can be saved, the overall circuit complexity of the display panel can be simplified, and the left and right frames can be reduced, so as to implement a display panel with a narrow frame.
Referring to fig. 7, in one embodiment, the first gate driving unit 131 and the second gate driving unit 132 of the first driving circuit 130 are located in the first region 151 disposed near the first display region 101; the first light-emitting control unit 133 and the second light-emitting control unit 134 in the first driving circuit 130 are symmetrically distributed in the second region 152 and the fourth region 154. Specifically, the first light-emitting control unit 133 may be disposed in the fourth region 154, and the second light-emitting control unit 134 may be disposed in the second region 152, where the first light-emitting control unit 133 and the second light-emitting control unit 134 are symmetrically disposed with respect to the first display region 101, so that routing distances of a gate line and a light-emitting control line in the first driving circuit 130 may be saved, the overall circuit complexity of the display panel may be simplified, and left and right frames may be reduced, so as to implement a narrow-frame display panel.
It should be noted that the positions of the first driving circuit 130 and the second driving circuit 140 in the non-display area in the embodiment of the present application are not limited to the above examples, and may also be adaptively adjusted according to actual requirements. In addition, the routing manner of the driving lines (e.g., gate lines and light emitting control lines) in the first display area 101 and the second display area 102 can also be adjusted according to the positions of the first driving circuit 130 and the second driving circuit 140.
The technical features of the above embodiments can be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the above embodiments are not described, but should be considered as the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above examples only show some embodiments of the present application, and the description thereof is specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for those skilled in the art, variations and modifications can be made without departing from the concept of the embodiments of the present application, and these embodiments are within the scope of the present application. Therefore, the protection scope of the embodiments of the present application shall be subject to the appended claims.

Claims (14)

1. A display panel, comprising:
a first display region including a plurality of first pixel units,
a second display area disposed adjacent to the first display area, the second display area including a plurality of second pixel units, wherein a load of the second pixel units is less than a load of the first pixel units;
the first driving circuit is respectively connected with each first pixel unit and used for driving each first pixel unit to emit light by adopting a pulse width modulation dimming mode;
and the second driving circuit is respectively connected with each second pixel unit and used for driving each second pixel unit to emit light by adopting one of the pulse width modulation dimming mode and the direct current dimming mode according to the target brightness of the display panel.
2. The display panel according to claim 1, wherein when the target brightness is less than a first threshold, the second driving circuit drives each of the second pixel units to emit light in the pwm dimming mode; when the target brightness is greater than a second threshold, the second driving circuit drives each second pixel unit to emit light in a direct-current dimming mode, wherein the first threshold is less than or equal to the second threshold.
3. The display panel according to claim 1, further comprising:
a display driving unit configured with a first group driving terminal and a second group driving terminal; wherein,
the first group of driving ends are connected with the first driving circuit and used for outputting a first group of driving signals to control the first driving circuit to drive each first pixel unit to emit light, wherein the first group of driving signals at least comprise a first scanning trigger signal and a first light emitting trigger signal;
the second group of driving ends are connected with the second driving circuit and used for outputting a second group of driving signals to control the second driving circuit to drive each second pixel unit to emit light; wherein the second group driving signal includes at least a second scan trigger signal and a second light emission trigger signal; wherein the first and second light emission trigger signals are different.
4. The display panel according to claim 3, wherein the plurality of second pixel units of the first display region are divided into a first pixel block and a second pixel block, wherein the display panel further comprises: a plurality of first gate lines and a plurality of first light emission control lines disposed at the first pixel block, and a plurality of second gate lines and a plurality of second light emission control lines disposed at the second pixel block, wherein the first driving circuit includes:
the first gate driving units are connected with the first gate lines in a one-to-one correspondence manner and used for driving the first gate lines in a single-side driving manner according to the first scanning trigger signal;
the plurality of cascaded second gate driving units are respectively connected with the plurality of second gate lines in a one-to-one correspondence manner, and the second gate driving units are used for driving the second gate lines in a single-side driving manner according to the first scanning trigger signal;
the first light-emitting control units are connected in series, and drive a first light-emitting control line in a unilateral driving mode according to the first light-emitting trigger signal;
and the second light-emitting control units are used for driving a second light-emitting control line in a unilateral driving mode according to the first light-emitting trigger signal.
5. The display panel according to claim 4, wherein each of the first light-emitting control units is correspondingly connected to two of the first light-emitting control lines, and each of the first light-emitting control units is correspondingly connected to two of the first light-emitting control lines.
6. The display panel according to claim 3, wherein the second display region comprises a first sub-display region and a second sub-display region, wherein the first sub-display region is located on at least one side of the first display region, and the first sub-display region and the first display region are arranged along a first direction; wherein the second drive circuit comprises:
the first sub-driving circuit is respectively connected with the second group of driving ends and each second pixel unit of the first sub-display area and is used for driving each second pixel unit of the first sub-display area to emit light according to the second group of driving signals;
and the second sub-driving circuit is respectively connected with the second group of driving ends and each second pixel unit of the second sub-display area and is used for driving each second pixel unit of the second sub-display area to emit light according to the second group of driving signals.
7. The display panel according to claim 6, wherein the plurality of second pixel units of the first sub-display area are divided into a third pixel block and a fourth pixel block, wherein the third pixel block, the first pixel block, the second pixel block, and the fourth pixel block are arranged along the first direction of the display panel; wherein the display panel further comprises: a plurality of third gate lines and a plurality of third light emission control lines disposed at the third pixel block, and a plurality of fourth gate lines and a plurality of fourth light emission control lines disposed at the fourth pixel block, wherein the first sub-driving circuit includes:
the plurality of cascaded third gate driving units are respectively connected with the plurality of third gate lines in a one-to-one correspondence manner, and the third gate driving units are used for driving the third gate lines in a single-side driving manner according to the second scanning trigger signal;
the plurality of cascaded fourth gate driving units are respectively connected with the plurality of fourth gate lines in a one-to-one correspondence manner, and the fourth gate driving units are used for driving the fourth gate lines in a single-side driving manner according to the second scanning trigger signal;
a plurality of cascaded third light-emitting control units, wherein the third light-emitting control units drive a third light-emitting control line in a single-side driving mode according to the first light-emitting trigger signal;
and the fourth light-emitting control units are connected in series and used for driving a fourth light-emitting control line in a unilateral driving mode according to the first light-emitting trigger signal.
8. The display panel according to claim 7, wherein each of the third light-emission control units is correspondingly connected to two of the third light-emission control lines, and each of the third light-emission control units is correspondingly connected to two of the third light-emission control lines.
9. The display panel according to claim 7, characterized by further comprising: and the second sub-driving circuit drives the fifth gate line in a bilateral driving mode, and drives the fifth light-emitting control line in a bilateral driving mode.
10. The display panel according to claim 1, wherein the display panel further comprises a non-display region disposed around the second display region, wherein the non-display region comprises a first region, a second region, a third region and a fourth region connected in sequence, the first region and the third region are disposed in parallel, and the second driving circuits are symmetrically distributed in the second region and the fourth region.
11. The display panel according to claim 10, wherein the first driving circuit is disposed in the first region adjacent to the first display region.
12. The display panel according to claim 10, wherein the first gate driving unit and the second gate driving unit in the first driving circuit are located in the first region disposed close to the first display region;
the first light emitting control unit in the first driving circuit is located in the second area, the second light emitting control unit in the first driving circuit is located in the fourth area, and the first light emitting unit and the second light emitting unit are symmetrically arranged about the first display area.
13. A display device, comprising: a light sensing device and a display panel as claimed in any one of claims 1-12; the photosensitive device is arranged corresponding to the first display area.
14. The display device according to claim 13, wherein the light sensing device is a camera.
CN202121188394.XU 2021-05-28 2021-05-28 Display panel and display device Active CN215868587U (en)

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