CN215646181U - ADCP multistage power supply circuit - Google Patents
ADCP multistage power supply circuit Download PDFInfo
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- CN215646181U CN215646181U CN202120327551.4U CN202120327551U CN215646181U CN 215646181 U CN215646181 U CN 215646181U CN 202120327551 U CN202120327551 U CN 202120327551U CN 215646181 U CN215646181 U CN 215646181U
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Abstract
The utility model discloses an ADCP (advanced digital control protocol) multistage power supply circuit, which comprises a pulse square wave generator and a driving module, wherein the pulse square wave generator is connected with the driving module; the pulse square wave generator is characterized in that the output end of the pulse square wave generator is connected with the first input end of the driving module, the pulse square wave generator is used for inputting high-frequency square wave pulse signals to the first input end of the driving module, the driving module is also provided with a plurality of low-frequency input ends used for inputting low-frequency driving signals, the driving module comprises a signal conversion circuit unit and a driving circuit unit, and the signal conversion circuit unit is connected with the driving circuit unit through a pulse transformer. The utility model can form a plurality of driving voltage signals by a plurality of low-frequency input ends, form a multi-stage power supply by connecting the plurality of driving voltage signals in series, and select the number of the low-frequency signals input by the low-frequency input ends according to the requirement to determine the low-frequency signals as several stages of power supply input.
Description
Technical Field
The utility model relates to the technical field of power supply circuits, in particular to an ADCP (advanced digital control channel) multistage power supply circuit.
Background
ADCP is an acoustic device dedicated to measuring the water flow velocity and direction of a section. When the water flow speed and direction are measured, the power supply stability and energy saving of the circuit are very important, especially different voltage and current are needed, and the circuit can be adjusted according to the needs to save electric energy, so that the water flow speed and direction measuring device is very important.
SUMMERY OF THE UTILITY MODEL
The present invention is directed to solving, at least to some extent, one of the technical problems in the related art. Therefore, an object of the present invention is to provide an ADCP multi-stage power supply circuit, which solves the problems that the power supply circuit is unstable and the power supply cannot be supplied in multiple stages.
The ADCP multistage power supply circuit provided by the utility model comprises a pulse square wave generator and a driving module;
the output end of the pulse square wave generator is connected with the first input end of the driving module, the pulse square wave generator is used for inputting high-frequency square wave pulse signals to the first input end of the driving module, the driving module is also provided with a plurality of low-frequency input ends for inputting low-frequency driving signals, the driving module comprises a signal conversion circuit unit and a driving circuit unit, and the signal conversion circuit unit is connected with the driving circuit unit through a pulse transformer;
the signal conversion circuit unit converts a plurality of input low-frequency driving signals and high-frequency square wave pulse signals into a plurality of alternating-current high-frequency pulse signals, and outputs driving voltage signals through the driving circuit unit after the high-frequency pulse signals are connected in series and then transformed.
In some embodiments of the present invention, at least two low frequency input terminals are provided on the driving module, the n-1 th low frequency input terminal is an nth input terminal, adjacent low frequency input terminals are connected by a line, and an automatic control switch is provided on each line.
In other embodiments of the present invention, the signal conversion circuit unit includes a plurality of not gate units and a plurality of full-bridge inverter circuit units, each input end of the driving module corresponds to one not gate unit, and each not gate unit corresponds to one full-bridge inverter circuit unit
In other embodiments of the present invention, the plurality of not gate units are U1-Un, the first input terminal of the driving module is connected to the second input terminal of U1, all low frequency input terminals on the driving module are connected in parallel to the first input terminal of U1, the nth input terminal on the driving module is correspondingly connected to the first input terminal of Un, the output terminal of U1 is connected to the first full bridge inverter circuit unit and the second input terminal of Un, and a line connecting the output terminal of U1 and the second input terminal of first Un is provided with an automatic control switch, n is greater than or equal to 2.
In other embodiments of the present invention, each full-bridge inverter circuit unit includes two gate resistors and two trench field effect transistors, wherein a gate series line of one gate resistor and one trench field effect transistor is connected in parallel with a gate series line of the other gate resistor and one trench field effect transistor, Un is connected to two gate resistors connected in parallel with the nth full-bridge inverter circuit unit, drain electrodes of the two trench field effect transistors on the full-bridge inverter circuit are connected, source electrodes of one trench field effect transistor on the full-bridge inverter circuit are connected to a power ground, source electrodes of the other trench field effect transistor are connected to a power source VCC, and a gate resistor is provided on a line connecting the power source VCC and the drain electrode of each trench field effect transistor.
In other embodiments of the present invention, the lines of the two trench fets connected to the first full-bridge inverter circuit unit are connected to the top end of the input end of the pulse transformer, and the lines of the two trench fets connected to the nth full-bridge inverter circuit unit are respectively connected to different parts of the input end of the pulse transformer.
In other embodiments of the present invention, the driving circuit unit includes a full-bridge rectifying circuit and an output circuit, an input end of the full-bridge rectifying circuit is connected to an output end of the pulse transformer, and an output end of the full-bridge rectifying circuit is connected to an input end of the output circuit.
In other embodiments of the present invention, the full-bridge rectifier circuit includes four diodes C1, C2, C3, and C4, the diodes C1 and C2 are connected in series and then connected in parallel with the series diodes C3 and C4, one end of the output end of the pulse transformer is connected to the anode of C1 and connected to the cathode of C2, and the other end of the output end of the pulse transformer is connected to the anode of C3 and connected to the cathode of C4.
In other embodiments of the present invention, the output circuit includes a gate resistor R12, a diode C5, and a trench fet, two ends of the gate resistor R12 are respectively connected to two ends of four diodes C1, C2, C3, and C4, and the gate resistor R12 is provided with a diode C5 on a line connected to cathode ends of four diodes C1, C2, C3, and C4.
The utility model comprises a pulse square wave generator and a driving module, wherein the driving module is provided with a plurality of low-frequency input ends, and the pulse square wave generator and the high-frequency input end (a first input end) on the driving module form a driving voltage signal with a low-frequency signal input by each low-frequency input end, so that the number of the low-frequency input ends can form a plurality of driving voltage signals, a multi-stage power supply is formed after the plurality of driving voltage signals are connected in series, and the number of the low-frequency signals input by the low-frequency input ends can be selected according to requirements to determine the input of the multi-stage power supply.
Drawings
The accompanying drawings, which are included to provide a further understanding of the utility model and are incorporated in and constitute a part of this specification, illustrate embodiments of the utility model and together with the description serve to explain the principles of the utility model and not to limit the utility model. In the drawings:
fig. 1 is a schematic structural diagram of an ADCP multi-stage power supply circuit according to the present invention.
FIG. 2 is a schematic diagram of an internal circuit of a driving module according to the present invention
In the figure: 10. a NOT gate unit; 20. a full-bridge inverter circuit unit; 30. a full-bridge rectifier circuit; 40. an output circuit;
MD1, pulse square wave generator; MD2, a driving module; an input terminal of the drive circuit, IN 1-INn; diodes C1-C5; gate resistors R1-R12 and channel FETs V1-V8.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments.
Examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the drawings are illustrative and intended to be illustrative of the utility model and are not to be construed as limiting the utility model.
Referring to fig. 1-2, an ADCP multi-stage power supply circuit includes a pulse square wave generator MD1 and a driving module MD2MD 2;
the output end of the pulse square wave generator MD1 is connected to the first input end IN1 of the driving module MD2, the pulse square wave generator MD1 is used for inputting high-frequency square wave pulse signals to the first input end IN1 of the driving module MD2, the driving module MD2 is further provided with a plurality of low-frequency input ends for inputting low-frequency driving signals, and the driving module MD2 comprises a signal conversion circuit unit and a driving circuit unit, wherein the signal conversion circuit unit is connected with the driving circuit unit through a pulse transformer;
the signal conversion circuit unit converts a plurality of input low-frequency driving signals and high-frequency square wave pulse signals into a plurality of alternating-current high-frequency pulse signals, and outputs driving voltage signals through the driving circuit unit after the high-frequency pulse signals are connected in series and then transformed. The pulse transformer has a primary winding and a secondary winding.
At least two low-frequency input ends are arranged on the driving module MD2, the n-1 th low-frequency input end is the n-th input end, the adjacent low-frequency input ends are connected through a circuit, and an automatic control switch is arranged on the circuit.
The output end of the pulse square wave generator MD1 is connected to the first input end IN1 of the driving module MD2 and a low frequency input end for inputting a low frequency driving signal to form a primary power supply, and several power supplies are formed by turning on several low frequency input ends.
The signal conversion circuit unit comprises a plurality of not gate units and a plurality of full-bridge inverter circuit units, each input end of the driving module MD2 corresponds to one not gate unit, and each not gate unit corresponds to one full-bridge inverter circuit unit.
The plurality of NOT gate units are U1-Un, a first input end of the driving module MD2 is connected with a second input end of U1, all low-frequency input ends on the driving module MD2 are connected to the first input end of U1 in parallel, an nth input end on the driving module MD2 is correspondingly connected with the first input end of Un, an output end of U1 is connected with the first full-bridge inverter circuit unit and the second input end of Un respectively, an automatic control switch is arranged on a circuit connecting the output end of U1 and the second input end of the first Un, and n is larger than or equal to 2.
Fig. 2, a schematic diagram of three low frequency inputs is used. The NOT gate unit is that a high-frequency signal input by U1 is input into a first full-bridge inverter circuit unit (composed of gate resistors R1, R2 and channel field effect transistors V1 and V2), and the NOT gate units U2, U3 and U4 are respectively connected with a second full-bridge inverter circuit unit (composed of gate resistors R3 and R4 and channel field effect transistors V3 and V4), a third full-bridge inverter circuit unit (composed of gate resistors R5 and R6 and channel field effect transistors V5 and V6) and a fourth full-bridge inverter circuit unit (composed of gate resistors R7 and R8 and channel field effect transistors V7 and V8). In fig. 2, the output lines of the second, third and fourth full-bridge inverter circuit units are respectively arranged at different positions of the primary winding from top to bottom.
Each full-bridge inverter circuit unit all includes two gate resistance and two trench field effect transistor, and one of them gate resistance is parallelly connected with the circuit of another gate resistance and a trench field effect transistor series connection with a trench field effect transistor gate series connection line, Un links to each other with two gate resistance that nth full-bridge inverter circuit unit is parallelly connected respectively, the drain electrode links to each other between two trench field effect transistor on the full-bridge inverter circuit, all the source electrode of a trench field effect transistor on the full-bridge inverter circuit links to each other with power ground, another trench field effect transistor source electrode links to each other with power VCC, and all be equipped with a gate resistance on the circuit that power VCC and every trench field effect transistor drain electrode link to each other.
The lines of the two channel field effect transistors connected with the first full-bridge inverter circuit unit are connected with the top end of the input end of the pulse transformer, and the lines of the two channel field effect transistors connected with the nth full-bridge inverter circuit unit are respectively connected with different parts of the input end of the pulse transformer.
The driving circuit unit comprises a full-bridge rectifying circuit and an output circuit, wherein the input end of the full-bridge rectifying circuit is connected with the output end of the pulse transformer, and the output end of the full-bridge rectifying circuit is connected with the input end of the output circuit.
The full-bridge rectifying circuit comprises four diodes C1, C2, C3 and C4, wherein the C1 and the C2 are connected in series and then connected in parallel with the C3 and the C4 after being connected in series, one end of an output end of the pulse transformer is connected with an anode of the C1 and connected with a cathode of the C2, and the other end of the output end of the pulse transformer is connected with an anode of the C3 and connected with a cathode of the C4.
The output circuit comprises a gate resistor R12, a diode C5 and a channel field effect transistor, wherein two ends of the gate resistor R12 are respectively connected with two ends of four diodes C1, C2, C3 and C4, and a diode C5 is arranged on a line of the gate resistor R12 connected with cathode ends of the four diodes C1, C2, C3 and C4.
The driving voltage signal output between the driving voltage signal output ends G and E changes with the number of low-frequency driving signal inputs on the driving module MD2, and the more low-frequency signals are input, the larger the output voltage. When the low-frequency input end is at a high level, driving signals exist on G and E of the driving module, otherwise, no driving signal exists, and therefore the purpose of the driving circuit is achieved.
The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art should be considered to be within the technical scope of the present invention, and equivalent alternatives or modifications according to the technical solution of the present invention and the inventive concept thereof should be covered by the scope of the present invention.
Claims (6)
1. An ADCP multistage power supply circuit is characterized in that: the pulse square wave generator comprises a pulse square wave generator and a driving module;
the output end of the pulse square wave generator is connected with the first input end of the driving module, the pulse square wave generator is used for inputting high-frequency square wave pulse signals to the first input end of the driving module, the driving module is also provided with a plurality of low-frequency input ends for inputting low-frequency driving signals, the driving module comprises a signal conversion circuit unit and a driving circuit unit, and the signal conversion circuit unit is connected with the driving circuit unit through a pulse transformer;
the signal conversion circuit unit converts a plurality of input low-frequency driving signals and high-frequency square wave pulse signals into a plurality of alternating-current high-frequency pulse signals, and outputs driving voltage signals through the driving circuit unit after the high-frequency pulse signals are connected in series and then transformed;
the number of the low-frequency input ends on the driving module is at least two, the n-1 th low-frequency input end is the nth input end, the adjacent low-frequency input ends are connected through a line, and the line is provided with an automatic control switch;
the signal conversion circuit unit comprises a plurality of NOT gate units and a plurality of full-bridge inverter circuit units, each input end on the driving module corresponds to one NOT gate unit, and each NOT gate unit corresponds to one full-bridge inverter circuit unit;
the plurality of NOT gate units are U1-Un, a first input end of the driving module is connected with a second input end of the U1, all low-frequency input ends on the driving module are connected with a first input end of the U1 in parallel, an nth input end on the driving module is correspondingly connected with the first input end of the Un, an output end of the U1 is respectively connected with the first full-bridge inverter circuit unit and the second input end of the Un, an automatic control switch is arranged on a circuit connecting the output end of the U1 with the second input end of the first Un, and n is larger than or equal to 2.
2. The ADCP multi-stage power supply circuit according to claim 1, wherein: each full-bridge inverter circuit unit all includes two gate resistance and two trench field effect transistor, and one of them gate resistance is parallelly connected with the circuit of another gate resistance and a trench field effect transistor series connection with a trench field effect transistor gate series connection line, Un links to each other with two gate resistance that nth full-bridge inverter circuit unit is parallelly connected respectively, the drain electrode links to each other between two trench field effect transistor on the full-bridge inverter circuit, all the source electrode of a trench field effect transistor on the full-bridge inverter circuit links to each other with power ground, another trench field effect transistor source electrode links to each other with power VCC, and all be equipped with a gate resistance on the circuit that power VCC and every trench field effect transistor drain electrode link to each other.
3. The ADCP multi-stage power supply circuit according to claim 2, wherein: the lines of the two channel field effect transistors connected with the first full-bridge inverter circuit unit are connected with the top end of the input end of the pulse transformer, and the lines of the two channel field effect transistors connected with the nth full-bridge inverter circuit unit are respectively connected with different parts of the input end of the pulse transformer.
4. The ADCP multi-stage power supply circuit according to claim 1, wherein: the driving circuit unit comprises a full-bridge rectifying circuit and an output circuit, wherein the input end of the full-bridge rectifying circuit is connected with the output end of the pulse transformer, and the output end of the full-bridge rectifying circuit is connected with the input end of the output circuit.
5. The ADCP multi-stage power supply circuit according to claim 4, wherein: the full-bridge rectifying circuit comprises four diodes C1, C2, C3 and C4, wherein the C1 and the C2 are connected in series and then connected in parallel with the C3 and the C4 after being connected in series, one end of an output end of the pulse transformer is connected with an anode of the C1 and connected with a cathode of the C2, and the other end of the output end of the pulse transformer is connected with an anode of the C3 and connected with a cathode of the C4.
6. The ADCP multi-stage power supply circuit of claim 5, wherein: the output circuit comprises a gate resistor R12, a diode C5 and a channel field effect transistor, wherein two ends of the gate resistor R12 are respectively connected with two ends of four diodes C1, C2, C3 and C4, and a diode C5 is arranged on a line of the gate resistor R12 connected with cathode ends of the four diodes C1, C2, C3 and C4.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202120327551.4U CN215646181U (en) | 2021-02-04 | 2021-02-04 | ADCP multistage power supply circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202120327551.4U CN215646181U (en) | 2021-02-04 | 2021-02-04 | ADCP multistage power supply circuit |
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| CN215646181U true CN215646181U (en) | 2022-01-25 |
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| CN202120327551.4U Active CN215646181U (en) | 2021-02-04 | 2021-02-04 | ADCP multistage power supply circuit |
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| CN (1) | CN215646181U (en) |
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- 2021-02-04 CN CN202120327551.4U patent/CN215646181U/en active Active
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