CN215641409U - Chip low-temperature test socket - Google Patents

Chip low-temperature test socket Download PDF

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Publication number
CN215641409U
CN215641409U CN202122104571.8U CN202122104571U CN215641409U CN 215641409 U CN215641409 U CN 215641409U CN 202122104571 U CN202122104571 U CN 202122104571U CN 215641409 U CN215641409 U CN 215641409U
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China
Prior art keywords
test
chip
top cover
temperature
base
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Active
Application number
CN202122104571.8U
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Chinese (zh)
Inventor
金永斌
侯燕兵
王芳
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Suzhou Fatedi Technology Co ltd
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FTdevice Technology Suzhou Co Ltd
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Priority to CN202122104571.8U priority Critical patent/CN215641409U/en
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Publication of CN215641409U publication Critical patent/CN215641409U/en
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Abstract

The utility model discloses a chip low-temperature test socket which comprises a test base, a test circuit board and a test circuit board, wherein the test base is provided with an accommodating cavity for accommodating a chip to be tested; the testing top cover is suitable for being pressed on the testing base; and the refrigerating assembly is arranged at the bottom of the test top cover and is suitable for being attached to the upper surface of the chip to be tested when the test top cover is pressed on the test base. Through set up the holding chamber on the test base for place the chip that awaits measuring, set up refrigeration subassembly on the test top cap, through refrigeration subassembly laminating on the upper surface of the chip that awaits measuring when test top cap gland is on the test base, thereby refrigerate the chip that awaits measuring, provide low temperature test environment for the chip that awaits measuring. Simple structure, economy and high efficiency.

Description

Chip low-temperature test socket
Technical Field
The utility model belongs to the technical field of chip testing, and particularly relates to a chip low-temperature testing socket.
Background
The high and low temperature test of the semiconductor chip is a necessary performance test before the chip leaves a factory, the high and low temperature test is an important means for evaluating the working stability of the chip in an extreme environment, the high and low temperature test of the semiconductor chip has wide application range, and can be used for the industries of electronic and electric components, automatic components, communication components, automobile accessories, metals, chemical materials and the like, and the physical change of national defense industry, aerospace, BGA, PCB base plates, electronic chip ICs, semiconductor ceramics and high polymer materials.
SUMMERY OF THE UTILITY MODEL
In view of the above technical problems, the present invention aims to: the utility model provides a chip low temperature test socket sets up refrigeration subassembly on the test top cap, laminates mutually with the chip that awaits measuring on the test base through refrigeration subassembly top cap gland and carries out heat-conduction for the temperature of the chip that awaits measuring reaches the low temperature environment of test requirement, simple structure, and economy is high-efficient.
The technical scheme of the utility model is as follows:
the utility model discloses a chip low-temperature test socket, which comprises:
the test base is provided with an accommodating cavity for placing a chip to be tested;
the testing top cover is suitable for being pressed on the testing base;
and the refrigerating assembly is arranged at the bottom of the test top cover and is suitable for pressing the test top cover to the test base, and the test top cover is attached to the upper surface of the chip to be tested.
Optionally, the refrigeration assembly comprises:
the cold guide block is arranged on the bottom surface of the test top cover through a connecting structure and is suitable for being attached to the upper surface of the chip to be tested;
the refrigerating structure comprises a refrigerating sheet embedded between the cold guide block and the testing top cover and a control system connected with the refrigerating sheet and used for controlling the temperature of the refrigerating sheet.
Optionally, the refrigeration structure further comprises a water cooling system.
Optionally, the connecting structure is a connecting convex part and/or a connecting concave part arranged around the cold guide block, and the test top cover is correspondingly provided with a connecting concave part matched with the connecting convex part and fixedly inserted and connected and/or a connecting convex part matched with the connecting concave part.
Optionally, the connection structure is a connection column arranged at four angular positions of the cold guide block, and the test top cover is correspondingly provided with a connection hole or a connection groove which is fixedly connected with the connection convex part in an inserted manner.
Optionally, the method further includes:
and the temperature sensing and monitoring device is embedded in one surface of the cold guide block, which faces the accommodating cavity.
Optionally, the temperature sensing and monitoring device is an online temperature monitoring device.
Optionally, a clamping block hinged and fixed is arranged on one side edge of the testing top cover and the testing base, and a clamping groove clamped and fixed with the clamping block is arranged on the other side edge of the testing top cover and the testing base;
the test top cover passes through the joint piece with the cooperation of draw-in groove joint and gland are in on the test base.
Compared with the prior art, the utility model has the advantages that:
according to the chip low-temperature test socket, the holding cavity is formed in the test base and used for placing the chip to be tested, the refrigeration component is arranged on the test top cover, and the refrigeration component is attached to the upper surface of the chip to be tested when the test top cover is pressed on the test base, so that the chip to be tested is refrigerated, and a low-temperature test environment is provided for the chip to be tested. Simple structure, economy and high efficiency.
Drawings
The utility model is further described with reference to the following figures and examples:
FIG. 1 is a perspective view of a low temperature test socket for a chip according to an embodiment of the present invention;
FIG. 2 is an exploded view of a low temperature test socket for a chip according to an embodiment of the present invention;
FIG. 3 is a cross-sectional view of a chip low temperature test socket according to an embodiment of the utility model.
Wherein: 1. testing the base; 11. an accommodating cavity; 2. testing the top cover; 3. a refrigeration assembly; 31. a cold conducting block; 310. connecting columns; 311. a through hole; 32. a refrigeration plate; 33. a water cooling system; 4. a temperature sensing and monitoring device; 5. and (5) testing the chip to be tested.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be described in further detail with reference to the accompanying drawings in conjunction with the following detailed description. It should be understood that the description is intended to be exemplary only, and is not intended to limit the scope of the present invention. Moreover, in the following description, descriptions of well-known structures and techniques are omitted so as to not unnecessarily obscure the concepts of the present invention.
Example (b):
as shown in fig. 1 to fig. 3, the chip low-temperature test socket of the present embodiment includes a test base 1, a test top cover 2, a cooling assembly 3, and a temperature sensing and monitoring device 4.
The test base 1 is provided with an accommodating cavity 11 for placing the chip 5 to be tested. As shown in fig. 2, the testing base 1 is a square base, a concave groove is formed in the middle of the top surface of the testing base 1, the concave groove is the accommodating cavity 11, the shape of the concave groove is not specifically limited, and the concave groove is matched with the shape structure of the chip 5 to be tested. The accommodation chamber 11 is also square in this embodiment. As an alternative embodiment, the accommodating cavity 11 may not be disposed in the middle of the top surface of the test base 1, and may be disposed at other positions on the top surface.
The test top 2 is also a square top. The refrigerating assembly 3 is arranged at the bottom of the testing top cover 2 and is suitable for being attached to the upper surface of the chip 5 to be tested placed in the accommodating cavity 11 when the testing top cover 2 is pressed on the testing base 1. Specifically, as shown in fig. 2 and 3, the refrigeration assembly 3 includes a cold conducting block 31 and a refrigeration structure, and the cold conducting block 31 is a square cold conducting block 31 and is installed at the bottom of the bottom surface of the test top cover 2 through a connection structure. The refrigeration structure comprises a refrigeration piece 32 and a control system for controlling the temperature of the refrigeration piece 32, the control system is an external control system, and the refrigeration piece 32 is connected with the external control system through a wire. The refrigerating sheet 32 is an existing conventional semiconductor refrigerating sheet 32, and the control system controls the refrigerating sheet 32 so as to realize temperature adjustment of the refrigerating sheet 32. In a preferred embodiment, the refrigeration structure of this embodiment further includes a water cooling system 33, as shown in fig. 2 and fig. 3, the water cooling system 33 includes two water cooling pipes connected to the refrigeration sheet 32, one is a water inlet pipe, and the other is a water outlet pipe. That is, the refrigeration structure includes the conventional refrigeration sheet 32 with the water cooling system 33 and the cold guide block 31, and the specific structure is not described and limited in detail herein, which can be easily conceived and realized by those skilled in the art. The water cooling system 33 can provide heat dissipation for the refrigeration chip 32, so that the test temperature of the chip is rapidly reduced to about-40 ℃, and rapid and efficient refrigeration is realized.
In order to facilitate understanding of the actual test temperature of the chip, the temperature sensing and monitoring device 4 is further included and is embedded in a surface of the cooling guide block 31 facing the accommodating cavity 11. Specifically, as shown in fig. 3, a through hole 311 penetrating through the lower surface of the cooling block 31 and extending to the side surface is formed in the cooling block 31, the temperature sensing and monitoring device 4 includes a temperature sensor and a monitor, the temperature sensor is embedded in the through hole 311 and is in communication connection with the monitor or is connected with the monitor through a wire, and the monitor is an external monitor. For example, the temperature sensing and monitoring device 4 is a conventional online temperature monitoring device, and includes a temperature sensor and a microprocessor. The specific construction and operation are not described or limited in detail herein. The actual test temperature of the chip 5 to be tested can be monitored in real time.
For the connection structure, the connection structure is a connection convex part and/or a connection concave part arranged around the cold guide block 31, and the test top cover 2 is correspondingly provided with a connection concave part matched with the connection convex part and/or a connection convex part matched with the connection concave part. That is, the connection structure may be a connection convex portion or a connection concave portion provided around the cooling block 31, or may be a combination of a connection convex portion and a connection concave portion provided around the cooling block 31, and correspondingly, a connection concave portion or a connection convex portion or a combination of a connection concave portion and a connection convex portion is correspondingly provided on the test top cap 2. As shown in fig. 2, the connection structure in this embodiment is a connection column 310 disposed at four corners of the square cold conducting block 31, and correspondingly, connection holes (not shown) or connection grooves (not shown) are correspondingly disposed at four corners of the bottom surface of the test top cover 2 and are fixedly connected with the connection column 310.
As shown in fig. 2, the left side and the right side of the testing top cover 2 are also provided with clamping blocks, and one ends of the clamping blocks are hinged and fixed with the testing top cover 2. The left side and the right side of the test base 1 are correspondingly provided with clamping grooves which are fixedly clamped with the clamping blocks. Be convenient for on test top cap 2 gland is on test base 1, go into to be fixed between test top cap 2 and the test base 1 in the draw-in groove through joint piece card, avoid test top cap 2 to drop from test base 1, influence the test.
It is to be understood that the above-described embodiments of the present invention are merely illustrative of or explaining the principles of the utility model and are not to be construed as limiting the utility model. Therefore, any modification, equivalent replacement, improvement and the like made without departing from the spirit and scope of the present invention should be included in the protection scope of the present invention. Further, it is intended that the appended claims cover all such variations and modifications as fall within the scope and boundaries of the appended claims or the equivalents of such scope and boundaries.

Claims (8)

1. A chip low temperature test socket, comprising:
the test device comprises a test base (1) and a test device, wherein an accommodating cavity (11) for placing a chip (5) to be tested is formed in the test base;
a test top cover (2) adapted to be pressed onto the test base (1);
and the refrigerating assembly (3) is arranged at the bottom of the test top cover (2) and is suitable for pressing the test top cover (2) on the test base (1) and attaching to the upper surface of the chip (5) to be tested.
2. The chip low temperature test socket according to claim 1, wherein the cooling assembly (3) comprises:
the cold guide block (31) is arranged on the bottom surface of the test top cover (2) through a connecting structure and is suitable for being attached to the upper surface of the chip (5) to be tested;
the refrigeration structure comprises a refrigeration piece (32) embedded between the cold guide block (31) and the test top cover (2) and a control system connected with the refrigeration piece (32) and used for controlling the temperature of the refrigeration piece (32).
3. The chip low temperature test socket according to claim 2, wherein the cooling structure further comprises a water cooling system (33).
4. The socket for low-temperature chip testing according to claim 2, wherein the connecting structure is a connecting convex portion and/or a connecting concave portion arranged around the cold conducting block (31), and the testing top cover (2) is correspondingly provided with a connecting concave portion matched with the connecting convex portion and/or a connecting convex portion matched with the connecting concave portion.
5. The socket for low-temperature chip testing according to claim 4, wherein the connecting structure is a connecting column (310) disposed at four angular positions of the cold-conducting block (31), and the testing top cover (2) is correspondingly provided with a connecting hole or a connecting groove for being fixedly connected with the connecting convex portion.
6. The chip cold test socket according to any one of claims 2-5, further comprising:
and the temperature sensing and monitoring device (4) is embedded in one surface of the cold guide block (31) facing the accommodating cavity (11).
7. The chip low-temperature test socket according to claim 6, wherein the temperature sensing and monitoring device (4) is an online temperature monitoring device.
8. The socket for low-temperature chip testing according to claim 1, wherein a hinged and fixed clamping block is arranged on one side edge of the testing top cover (2) and the testing base (1), and a clamping groove clamped and fixed with the clamping block is arranged on the other side edge;
the test top cover (2) is connected with the clamping groove in a clamping mode through the clamping block, and the clamping groove is clamped and matched with the clamping groove in a pressing mode and is pressed on the test base (1).
CN202122104571.8U 2021-09-02 2021-09-02 Chip low-temperature test socket Active CN215641409U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202122104571.8U CN215641409U (en) 2021-09-02 2021-09-02 Chip low-temperature test socket

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202122104571.8U CN215641409U (en) 2021-09-02 2021-09-02 Chip low-temperature test socket

Publications (1)

Publication Number Publication Date
CN215641409U true CN215641409U (en) 2022-01-25

Family

ID=79905977

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202122104571.8U Active CN215641409U (en) 2021-09-02 2021-09-02 Chip low-temperature test socket

Country Status (1)

Country Link
CN (1) CN215641409U (en)

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GR01 Patent grant
GR01 Patent grant
CP03 Change of name, title or address
CP03 Change of name, title or address

Address after: No. 200 Xingpu Road, Industrial Park, Suzhou City, Jiangsu Province, 215000, 5 # 101, 102, 201, 202

Patentee after: Suzhou Fatedi Technology Co.,Ltd.

Guo jiahuodiqu after: Zhong Guo

Address before: No. 200 Xingpu Road, Industrial Park, Suzhou City, Jiangsu Province, 215000, 5 # 101, 102, 201, 202

Patentee before: FTDEVICE TECHNOLOGY (SUZHOU) CO.,LTD.

Guo jiahuodiqu before: Zhong Guo