CN2155106Y

CN2155106Y - Remote control receiving device for satellite receiver

Info

Publication number: CN2155106Y
Application number: CN 93203091
Authority: CN
Inventors: 应惠明; 刘家建
Original assignee: Individual
Current assignee: Individual
Priority date: 1993-02-12
Filing date: 1993-02-12
Publication date: 1994-02-02
Anticipated expiration: 2003-02-12

Abstract

The utility model discloses an infrared remote control receiving device for a satellite receiver, which is composed of an SCM system, an infrared receiving part which is controlled by the SCM system, a frequency divider, a frequency measurement signal input and selection unit, a control signal output unit, a D/A conversion unit, etc. The utility model has the maximal characteristic that pulse width modulation output can be realized by the adoption of 8253 programmable counter, which omits the traditional three-sheet 14 bit D/A converter. Consequently, the utility model has the advantage of the reduction of cost.

Description

Remote control receiving device for satellite receiver

The utility model relates to remote control, more particularly, relates to a kind of remote-receiver that is used for satellite receiver.

Along with the space technology development, communicate with television broadcasting universal day by day by artificial satellite.It is good to utilize synchronous artificial satellite rebroadcast television program to have an image quality, characteristics such as wide coverage.Want to receive satellite television programming, must set up a grounded receiving station, this grounded receiving station mainly is made up of antenna, tuner and receiver.The wherein domestic existing production in enormous quantities of antenna, the main dependence on import of tuner and receiver, though minority manufacturer production receiver is arranged, but general quality is not good enough, use inconvenience, mostly be import machine or CKD assembling as for the remote control type, in the remote-receiver of the satellite receiver that can see, adopt three 14 D/A chips to produce 1 tunnel channel selection tuning voltage and 2 road sound accompaniment tuning voltage usually respectively, so cost is higher.

The purpose of this utility model is to provide that a kind of cost that is used for satellite receiver is lower, the remote-receiver of better performances, applicable different type of machines.

The purpose of this utility model is to realize like this, construct an infrared remote control receiving system that is used for satellite receiver, this receiving system comprises: infrared receiver, by single chip microcomputer, the EPROM program storage, data latches, the Single Chip Microcomputer (SCM) system that EEPROM data storage etc. constitute, by 32 frequency dividing circuits, the frequency measurement input unit that multicircuit switch etc. constitute, and the control signal output unit that constitutes by NOR gate and latch etc., this receiving system is characterised in that also and comprises: be made of 8253 programmable counters and three RC filter networks, be used for producing the D/A converter unit of three tunnel tuning voltage according to the data that described Single Chip Microcomputer (SCM) system provides.According to the infrared remote control receiving system that is used for satellite receiver of the present utility model, described frequency measurement input unit is with 4 binary divider 74LS393(2) and d type flip flop 74LS74 realize 32 frequency divisions from the signal of described multicircuit switch, and the signal behind this frequency division is delivered to described Single Chip Microcomputer (SCM) system, described multicircuit switch CD4052 receives FA1, FA2, the FFV frequency measurement signal from the satellite receiver other parts, and selects one of them and deliver to described 32 frequency dividing circuits under the signal controlling from Single Chip Microcomputer (SCM) system.Programmable counter in the described D/A converter unit receives from the signal of described Single Chip Microcomputer (SCM) system output is connected to three three road RC filtering networkings that are made of triode, resistance, capacitor respectively, provides FV, AV1 and AV2 three tunnel tuning voltage respectively by these three RC filter networks.

Implement satellite receiver remote-receiver of the present utility model, owing to adopt programmable counter to produce three tunnel tuning voltage, bring into play the flexibility of Single Chip Microcomputer (SCM) system more, when not influencing three tunnel tuning voltage precision, greatly reduced the cost of this receiving system.

With reference to the accompanying drawings, in conjunction with the embodiments feature of the present utility model is described further, in the accompanying drawing:

Fig. 1 is conventional PWM voltage waveform view;

Fig. 2 is the schematic diagram of explanation the utility model PWM voltage code;

Fig. 3 is the block diagram of remote-receiver of the present utility model;

Fig. 4 is a remote-receiver electrical schematic diagram of the present utility model;

Fig. 5 is the PWM interrupt routine FB(flow block) that is stored in the program storage.

The average voltage level that conventional pwm pulse voltage signal shown in Figure 1 is exported after filtering is the tuning voltage value

Wherein ti is the width of i pulse, and T is a pulse voltage amplitude for Cycle Length VO, and n is a pulse number in this T time cycle.

In conjunction with Fig. 2 PWM voltage code principle in the D/A converter unit is described in the utility model remote-receiver.Soon be divided into 64 minor cycles at each large period, each minor cycle is divided into main pulse level time t and additional period t1, this additional period t1 not necessarily occurs in each minor cycle, time, t was adjustable, time, t1 fixed, but t1 occurrence number n in whole large period T is adjustable, and like this, the average voltage of filtering output is

V is VO on average=(64t+nt1)/(T)

In the utility model embodiment, t1=1 μ s, t=mt1,0≤m≤255, T=256 * 64 μ S, 0≤n≤63 then has

V is average=((m)/256+(n)/(256 * 64)) VO

Voltage resolution is 1/(256 * 64)=1/160000, can reach the conversion accuracy of 14 2 system numbers, this binary number can be expressed as:

Promptly low 6 of this 14 bit is n, most-significant byte is m, and by the pwm pulse of above parameter generating, its fundamental frequency is about 3.9KHZ, be easy to filtering, for making good wave filtering effect, additional period t1 should be evenly distributed in the large period T, realizes that the equally distributed principle of t1 is very simple, least-significant byte is counted n(D5 D4 D3 D2 D1 D0) each, when this position is 1, be distributed in respectively on i cycle, then

D0=1 i=32 (1 t1)

D1=1 i=16,48 (2 t1)

D2=1 i=8,24,40,56 (4 t1)

D3=1 i=4,12,20,28,36,44 ... ..62 (8 t1)

D4=1 i=2,6,10,14,18,22......62 (16 t1)

D5=1 i=1,3,5,7,9 ... 63 (32 t1)

When n=0, there is not t1 to occur

Above-mentioned data are promptly known conversely:

When i=1, whether additional t1 is relevant with D5,

When i=2, whether additional t1 relevant with D4 or the like.

We adopt look-up method to calculate the appearance position of t1 on program according to above-mentioned relation.

Below introduce 8253 characteristics

The 8253rd, have three programmable 16 down counters that function is identical, the working method of each counter and counting constant are selected by software programming respectively, and the highest counting clock frequency is 2.6MHZ.

Control word

D7 D6 D5 D4 D3 D2 D1 D0

SC1 SC0 RL1 RL0 M2 M1 M0 BCD

SC1 SC0 gated counter

00 counters 0

11 counters 1

10 counters 2

11 is illegal

RL1 RL0 action type

00 counter latch operations

01 read/write low level peace joints

10 read/write upper bytes

11 read and write low byte earlier

Back read-write upper byte

M2 M1 M0 mode

0 0 0 0

0 0 1 1

0 1 0 2

0 1 1 3

1 0 0 4

1 0 1 5

BCD

0 binary counting

1 binary-coded decimal counting

Mode 0

Adopt this mode, when counter is kept to zero, make output become high level, writing after practising when the mode control word is low level at output out, after the counting constant writes, counter begins counting, and counting phase when keeping the low level counter and being kept to zero, and output ont becomes high level, to CPU, write control just or write till the new count value time-out counting when low level appears in GAT

Three counters all select mode 0 in this circuit

Control word is respectively 01010000

10010000

00010000

Setting timer T0 in main program is the timing mode of resetting automatically, and every 256US produces once and interrupts, and interrupting inlet is the PWM program.

Fig. 3 and Fig. 4 provide the circuit layout of the utility model remote-receiver respectively with block diagram and circuit, only add that with 1 8253 programmable counter several resistance realization resolution are 14 three tunnel tuning voltage FV1, AV1 and AV2.

Fig. 5 illustrates PWM modulation program block diagram.

In Fig. 3, the signal of infrared receiving unit 1 is coupled to Single Chip Microcomputer (SCM) system 2 inputs, this Single Chip Microcomputer (SCM) system 2 is delivered to control signal output unit 3 with each control signal under the program control in its program storage, the data that form three kinds of humorous voltages are delivered to the D/A converter unit 4 that is made of 8253 counters and three road RC filter networks, described Single Chip Microcomputer (SCM) system 2 also receives the three drive tests frequency signal of satellite receiver by frequency measurement input selected cell 5, realize the frequency lock function by the frequency lock subprogram in the working procedure memory.

Among Fig. 4, understand the principle and the feature of this remote-receiver in more detail.As

As shown in Figure 4, the coding infrared pulse that is produced by infrared remote-control emitter is delivered to the INT1 of monolithic 8031 through infrared receiver; After this 8031 single-chip microcomputer receives remote signal, produce control signal corresponding and frequency tuning voltage.In Fig. 4, Single Chip Microcomputer (SCM) system 2 is by single-chip microcomputer 8031(or 8032), latch 74LS373(1), EPROM program storage 2764, EEPROM data storage 2816A and frequency divider 74LS393 constitute.Control signal output unit 3 is by NOR gate 74LS02 and latch 74LS373(2) constitute.Frequency measurement input selected cell 5 comprises multiplexer CD4052 and is used to realize the tetrad frequency divider 74LS393(2 of 32 frequency divisions) and d type flip flop 74LS74 formation.D/A converter unit 4 is made of the counter 8253 and three road RC filter networks of the pwm pulse that is used to produce tuning voltage, and described three road RC filter networks produce FV, AV1, three direct current tuning voltage of AV2 respectively.Described frequency measurement input selected cell 5 receives from left and right passage sound accompaniment tuned frequency FA1, the FA2 of satellite receiver and these three signals of channel tuning signal FV and by 74LS393(2), 74LS74 carries out delivering to behind 32 frequency divisions T1 end of monolithic 8031.Output 74LS373(2) provides control signal output, 3 devices of signal such as the wide and narrow strip selection and the mode selection of postemphasising adopt the 12M crystal oscillator, produce the 2MHZ pulse by 8031 ALE end, by 74LS393(1) deliver to 8253 clock pulse terminal after reducing to 1MHZ behind the frequency division.

Claims

1, a kind of remote-receiver that is used for satellite receiver, comprise: infrared receiver, by single chip microcomputer, the EPROM program storage, data latches, the Single Chip Microcomputer (SCM) system that EEPROM data storage etc. constitute, by 32 frequency dividing circuits, the frequency measurement input unit that multicircuit switch etc. constitute, and the control signal output unit that constitutes by NOR gate and latch etc., this receiving system is characterised in that, also comprises by 8253 programmable counters and three RC filter networks to constitute, the D/A converter unit that provides data to produce three tunnel tuning voltage according to described monolithic system is provided.

2, remote-receiver according to claim 1, it is characterized in that, described frequency measurement input unit is with 42 o'clock system frequency divider 74LS393(2) and d type flip flop 74LS74 realize 32 frequency divisions from the signal of described multicircuit switch, and signal behind this frequency division delivered to described Single Chip Microcomputer (SCM) system, the described multicircuit switch that is made of CD4052 receives FA1, FA2, the FFV frequency measurement signal from these satellite receiver other parts, and selects one of them to deliver to described 32 frequency dividers under from the signal controlling of described Single Chip Microcomputer (SCM) system.