CN215384562U - Sample-and-hold control device and host - Google Patents

Abstract

The utility model relates to a sample-and-hold control device and a host. The device is applied to a host of a radio frequency electric wave knife system, the host comprises a sampling holding device, the device comprises a signal input circuit and a synchronous signal conditioning circuit, and the signal input circuit comprises a trigger. The trigger is used for acquiring a target signal generated by the radio frequency electric wave knife and triggering to generate a synchronous signal in phase with the target signal; the target signal is used for reflecting the output power of the radio frequency electric wave knife; the synchronous signal conditioning circuit is respectively connected with the trigger and the sampling holding device and is used for generating a sampling control signal according to the synchronous signal and outputting the sampling control signal to the sampling holding device; the sampling control signal is in phase with the target signal, and the duration of the effective level signal in the sampling control signal corresponds to the target sampling time period, so as to control the sampling and holding device to sample the target signal within the duration of the effective level signal. Therefore, the applicability and flexibility of sampling can be improved.

Description

Sample-and-hold control device and host

Technical Field

The utility model relates to the technical field of medical instruments, in particular to a sampling holding control device and a host.

Background

The radio frequency electric wave knife system is a medical instrument realized based on a directional radio frequency electric wave emission technology and can comprise a system host and a radio frequency electric wave knife. In the operation process of the system, a system host needs to sample and hold a specific signal for realizing the functions of control, output regulation and the like so as to complete the acquisition of the signal and perform the next processing according to the acquired data.

However, under the influence of the peak voltage of the periodic signal, the conventional device has the problems of poor flexibility and low applicability.

SUMMERY OF THE UTILITY MODEL

Based on this, there is a need for a sample-and-hold circuit and host that can improve flexibility and applicability.

In a first aspect, an embodiment of the present application provides a sample-and-hold control device, which is applied to a host of a radio frequency electric wave knife system, where the host includes the sample-and-hold device. The sampling hold control device comprises a signal input circuit and a synchronous signal conditioning circuit, wherein the signal input circuit comprises a trigger.

The trigger is used for acquiring a target signal generated by the radio frequency electric wave knife and triggering to generate a synchronous signal; the target signal is used for reflecting the output power of the radio frequency electric wave knife; the synchronization signal is in phase with the target signal;

the synchronous signal conditioning circuit is respectively connected with the trigger and the sampling holding device and is used for generating a sampling control signal according to the synchronous signal and outputting the sampling control signal to the sampling holding device;

the sampling control signal is in phase with the target signal, and the duration of the effective level signal in the sampling control signal corresponds to the target sampling time period, so as to control the sampling and holding device to sample the target signal within the duration of the effective level signal.

In one embodiment, the synchronization signal conditioning circuit comprises: the synchronous pulse generating module is connected with the trigger and used for outputting a synchronous pulse signal according to the synchronous signal; the synchronous pulse signal is in phase with the target signal; the phase modulation module is connected with the synchronous pulse generation module and is used for generating a phase modulation signal according to the target sampling time period and the synchronous pulse signal; the phase of the phase modulated signal corresponds to a target sampling time period; and the control signal output module is respectively connected with the phase modulation module and the sampling holding device and is used for generating a sampling control signal according to the phase modulation signal.

In one embodiment, the phase modulation module is provided with a charge and discharge unit. The phase modulation module is used for adjusting the charge and discharge parameters of the charge and discharge unit according to the target sampling time period, so that the charge and discharge unit carries out charge and discharge based on the adjusted charge and discharge parameters and the synchronous pulse signal, and a phase modulation signal is generated.

In one embodiment, the phase modulation module is used for performing waveform shaping on the phase modulation signal to obtain a shaped signal; or the phase modulation module is used for carrying out phase inversion processing on the phase modulation signal based on the reference voltage signal to obtain a shaping signal;

the control signal output module is used for generating sampling control signals according to the shaping signals, the sampling control signals comprise effective level signals and invalid level signals, the control signal output module is used for outputting the effective level signals with preset duration when the edges of the shaping signals are detected to arrive, and otherwise, the control signal output module outputs the invalid level signals.

In one embodiment, the phase modulation module comprises an adjustable resistor, a first capacitor and an inverter; one end of the adjustable resistor is respectively connected with the synchronous pulse generation module, one end of the first capacitor and the input end of the phase inverter; the output end of the phase inverter is connected with the control signal output module; the other end of the adjustable resistor and the other end of the first capacitor are both used for grounding.

In one embodiment, the control signal output module comprises a first not gate, a first resistor, a second capacitor and a first nand gate; the input end of the first NOT gate is connected with the phase modulation module, and the output end of the first NOT gate is connected with one end of the first resistor; the other end of the first resistor is respectively connected with one end of the second capacitor and the first input end of the first NAND gate; the second input end of the first NAND gate is connected with the phase modulation module, and the output end of the first NAND gate is connected with the sampling holding device; the other end of the second capacitor is used for grounding.

In one embodiment, the control signal output module is configured to output the shaped signal as the sampling control signal.

In one embodiment, the synchronization pulse signal includes a charge level signal and a discharge level signal. The synchronous pulse generation module is used for outputting a charging level signal with preset duration when the edge of the synchronous signal is detected to arrive, otherwise, outputting a discharging level signal.

In one embodiment, the synchronization pulse generation module comprises a second not gate, a second resistor, a second nand gate, a third capacitor and a third not gate; the input end of the second NOT gate is connected with the trigger, and the output end of the second NOT gate is connected with one end of the second resistor; the other end of the second resistor is respectively connected with one end of the third capacitor and the first input end of the second NAND gate; the second input end of the second NAND gate is connected with the trigger, and the output end of the second NAND gate is connected with the input end of the third NOT gate; the output end of the third NOT gate is connected with the phase modulation module; the other end of the third capacitor is used for grounding.

In one embodiment, the trigger is a Schmitt trigger.

In one embodiment, the synchronization pulse generation module is configured to output the target signal as a synchronization pulse signal.

In a second aspect, an embodiment of the present application provides a host, which is applied to a radio frequency electric wave knife system; the host comprises a sampling holding device and the sampling holding control device; the sampling and holding device is connected with the sampling and holding control device and is used for acquiring the sampling control signal and sampling the target signal in the duration time of the effective level signal of the sampling control signal.

In one embodiment, the sample and hold apparatus comprises: the sampling and holding module is connected with the synchronous signal conditioning circuit and used for acquiring a sampling control signal, sampling a target signal within the duration time of an effective level signal of the sampling control signal and outputting a sampling signal; the frequency division module is connected with the signal input circuit and used for generating a frequency division signal according to the synchronous signal; and the energy release module is respectively connected with the frequency division module and the sampling and holding module and is used for releasing energy to the sampling and holding module according to the frequency division signal.

In one embodiment, the host further comprises an analog-to-digital converter; the sampling and holding device also comprises a detection module; and the detection module is respectively connected with the energy release module and the analog-to-digital converter and is used for detecting the sampling signal and outputting the detection signal to the analog-to-digital converter.

In a third aspect, an embodiment of the present application provides a radio frequency electric wave knife system, which includes a radio frequency electric wave knife and the above-mentioned host; the host is connected with the radio frequency electric wave knife.

In the sampling and holding control device, the host and the radio frequency electric wave knife system, a target signal of the radio frequency electric wave knife is obtained through the signal input circuit and is triggered to generate a synchronous signal, a sampling control signal is generated through the synchronous signal conditioning circuit, the duration time period of an effective level signal of the sampling control signal corresponds to the target sampling time period, and the sampling control signal is in phase with the target signal. Under the control of the sampling control signal, the sampling holding device can sample the target signal within the duration time of the effective level signal, so that the selective sampling of the target signal is realized, and the applicability and flexibility of the sampling are improved. Meanwhile, when the target sampling time period is adjusted, the duration time period of the effective level signal is correspondingly adjusted, so that the sampling and holding device can accurately acquire the signal segment corresponding to the target sampling time period in the target signal, the sampling and holding of any segment of regional signal in the target signal period can be realized, and the applicability and flexibility of sampling can be further improved.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments or the conventional technologies of the present application, the drawings used in the descriptions of the embodiments or the conventional technologies will be briefly introduced below, it is obvious that the drawings in the following descriptions are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.

FIG. 1 is a block diagram showing a schematic configuration of a sample-and-hold control apparatus according to an embodiment;

FIG. 2 is a circuit diagram of a signal input circuit in one embodiment;

FIG. 3 is a schematic block diagram of a synchronization signal conditioning circuit according to an embodiment;

FIG. 4 is a circuit diagram of a phase modulation module in one embodiment;

FIG. 5 is a circuit diagram of a control signal output module in one embodiment;

FIG. 6 is a circuit diagram of a sync pulse generation module in one embodiment;

FIG. 7 is a circuit diagram of a sample-and-hold control device in one embodiment;

FIG. 8 is a signal waveform diagram of output signals of the devices in the circuit diagram of FIG. 7;

FIG. 9 is a schematic block diagram showing a host computer according to one embodiment;

fig. 10 is a schematic block diagram of a sample-and-hold apparatus according to an embodiment.

FIG. 11 is a circuit diagram of a sample and hold module in one embodiment;

FIG. 12 is a circuit diagram of an energy bleed-off module and a frequency divider module in one embodiment;

FIG. 13 is a signal waveform diagram of output signals of devices of a host in one embodiment;

description of reference numerals:

the device comprises a sample-hold control device-10, a signal input circuit-110, a synchronous signal conditioning circuit-120, a synchronous pulse generation module-121, a phase modulation module-123, a control signal output module-125, a sample-hold device-20, a sample-hold module-210, a frequency division module-220, an energy discharge module-230 and a detection module-240.

Detailed Description

To facilitate an understanding of the present application, the present application will now be described more fully with reference to the accompanying drawings. Embodiments of the present application are set forth in the accompanying drawings. This application may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.

Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

It is to be understood that "connection" in the following embodiments is to be understood as "electrical connection", "communication connection", and the like if the connected circuits, modules, units, and the like have communication of electrical signals or data with each other.

As used herein, the singular forms "a", "an" and "the" may include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises/comprising," "includes" or "including," etc., specify the presence of stated features, integers, steps, operations, components, parts, or combinations thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, components, parts, or combinations thereof. Also, as used in this specification, the term "and/or" includes any and all combinations of the associated listed items.

As described in the background art, the conventional techniques have problems of poor flexibility and low applicability. The inventors have studied and found that the problem is caused because the conventional sample-and-hold apparatus can only collect the peak voltage of the target signal, and cannot sample and hold the portion other than the peak point. In a complex environment, however, the peak voltage is not necessarily a sampling target. Under the limitation that a sampling target is not adjustable, the host machine can only control the power of the radio-frequency electric wave knife based on the peak voltage, so that the problems of poor control precision and the like are easily caused. In view of the above, there is a need for a sample-and-hold control method, device, host, and rf knife system that can improve the flexibility and applicability of sampling.

In addition, limited by the operating frequency band of the radio frequency electric wave knife system, in order to realize signal sampling at a speed higher than 10 mega, most of the conventional hosts adopt an acquisition card for acquisition, or a professional chip is matched with a Complex Programmable Logic Device (CPLD), so that the problem of high cost exists. In order to solve the problem, in the host and the radio frequency electric wave knife system in some embodiments of the present application, the sampling holding device is used for storing and then sampling the useful signal in the target signal, and storing and holding a small segment of the target signal, so that the requirements on the acquisition device can be reduced on the premise of ensuring the acquisition effect, the cost can be greatly reduced, and the system is suitable for synchronous sampling in a low-cost specific area.

In one embodiment, as shown in fig. 1, a sample-and-hold control device 10 is provided for a host of a radio-frequency knife system, the host is provided with a sample-and-hold device, and the sample-and-hold device can sample and hold a target signal to obtain a sampled signal. The apparatus specifically includes a signal input circuit 110 and a synchronization signal conditioning circuit 120.

The signal input circuit 110 may be electrically connected or communicatively connected to the rf electric wave knife to obtain and forward a target signal generated by the rf electric wave knife. The target signal is used for reflecting the output power of the radio frequency electric wave knife and can be a periodic signal involved in the process of generating or outputting the radio frequency electric wave by the radio frequency electric wave knife. In one embodiment, the signal input circuit 110 may also pre-process the target signal before outputting the target signal, and output the pre-processed target signal. Wherein the preprocessing may be, but is not limited to, filtering, waveform shaping, and/or phase adjustment, etc.

In one embodiment, the signal input circuit 110 includes a flip-flop, and it is understood that the flip-flop can be implemented by any type, any principle, or any trigger type of flip-flop in the prior art, which is not specifically limited in this application, and only needs to generate the synchronization signal under the trigger of the target signal. Taking the schmitt trigger as an example, the input end of the schmitt trigger is used for connecting the radio frequency electric wave knife, acquiring a target signal generated by the radio frequency electric wave knife, performing waveform shaping on the target signal, and shaping an irregular target signal into a regular synchronous signal. The synchronous signal is in phase with the target signal, so that the frequency information of the target signal is reflected, errors caused by irregular signals can be reduced, the reliability is improved, and the signal processing difficulty of the synchronous signal conditioning module is reduced. In one specific example, referring to fig. 2, the signal input circuit 110 may include a signal input port P1 and a schmitt trigger U1. The signal input port P1 is respectively connected with the Schmitt trigger U1 and the synchronous pulse signal conditioning module and is used for connecting with a sample-and-hold device. The signal input port P1 divides the target signal into two paths, and one path is supplied to the Schmitt trigger U1 for waveform shaping so as to shape the target signal into a square wave synchronous signal. The other path is supplied to a sampling and holding device to wait for the sampling and holding device to sample. In this way, waveform shaping can be realized by a simple circuit configuration, and the cost of the sample-and-hold control device 10 can be reduced.

The synchronization signal conditioning circuit 120 is respectively connected to the output end of the schmitt trigger U1 and the sample-and-hold device, and is configured to generate a sampling control signal in phase with the target signal according to the synchronization signal, and output the sampling control signal to the sample-and-hold device. The duration time of the effective level signal of the sampling control signal corresponds to the target sampling time period, and the sampling holding device can finish sampling holding of the target signal under the control of the sampling control signal. It can be understood that the synchronization signal conditioning circuit 120 may be based on a circuit structure formed by combining various functional circuits and electronic components in the prior art, and the present application is not limited thereto specifically, and only needs to implement the foregoing functions. In one example, the synchronization signal conditioning circuit 120 is a trigger circuit with an adjustable trigger level, and the trigger level corresponds to a target sampling time period, and is used for generating and outputting a sampling control signal under the trigger of a target signal. In another example, the synchronization signal is conditioned to a comparison circuit with adjustable reference voltage, the reference voltage corresponds to a target sampling time, and is used for comparing the target signal with the reference voltage, and generating and outputting a sampling control signal according to a comparison result.

In this embodiment, when the target sampling time period is adjusted, the duration of the effective level signal is correspondingly adjusted, so that the sample-and-hold device can accurately collect the signal segment corresponding to the target sampling time period in the target signal, thereby implementing sample-and-hold of any segment of the area signal in the target signal period, and further increasing the applicability and flexibility of sampling.

In one embodiment, as shown in fig. 3, the synchronization signal conditioning circuit 120 includes a synchronization pulse generating module 121, a phase modulating module 123, and a control signal output module 125. The synchronization pulse generating module 121 is respectively connected to the signal input circuit 110 and the phase modulating module 123, the phase modulating module 123 is connected to the control signal output module 125, and the control signal output module 125 is used for connecting to a sample-and-hold device.

Specifically, the synchronization pulse generating module 121 is configured to generate a synchronization pulse signal in phase with the target signal according to the synchronization signal, where a pulse width of the synchronization pulse signal may be determined according to device parameters of the phase modulating module 123 and sampling accuracy. The phase modulation module 123 generates a phase modulation signal according to the target sampling time period and the synchronization pulse signal, phase information of the phase modulation signal can be used for reflecting the target sampling time period, and the phase modulation signal is in phase with the synchronization pulse signal, that is, the phase modulation signal is in phase with the target signal. The control signal output module 125 may generate a sampling control signal according to the phase modulation signal, and output the sampling control signal to the sample-and-hold device to control the sample-and-hold device to complete sampling. The phase information of the phase modulation signal may be used to control the control signal output module 125 to output an active level signal, which may be, but is not limited to, a phase corresponding to the trigger voltage or a phase corresponding to the trigger edge. When the target sampling time period is changed, the phase information of the phase modulation signal is correspondingly changed so as to adjust and control the duration time period of the effective level signal output by the pulse output module, and further adjust the sampling time period of the sampling holding device.

In one embodiment, the phase modulation module 123 may be provided with a charge and discharge unit, and the phase modulation module 123 may adjust charge and discharge parameters of the charge and discharge unit according to the target sampling time period. After adjustment, the charging and discharging unit takes the synchronous pulse signal as a power supply signal, performs charging and discharging under the action of charging and discharging parameters, and generates a phase modulation signal. The phase modulation signal is a charge and discharge voltage signal of the charge and discharge unit in the charge and discharge process. It can be understood that the charging and discharging unit can realize the charging and discharging function through the charging and discharging device (such as a battery, etc.), the charging and discharging circuit (such as a capacitor, etc.), etc., and the application does not specifically limit this, but only needs to realize the above function.

In one embodiment, the phase modulation module 123 may directly output the phase modulation signal to the control signal output module 125, and the control signal output module 125 generates the sampling control signal according to the phase modulation signal, thereby simplifying the circuit structure. In another embodiment, phase modulation module 123 may waveform shape the phase modulated signal and output a shaped phase modulated signal (i.e., a shaped signal). Therefore, the phase modulation signal can be converted into a regular shaping signal, so that the control signal output module 125 can generate a sampling control signal according to the shaping signal, thereby avoiding the interference of the irregular phase modulation signal on the subsequent control and improving the accuracy of sampling.

In one embodiment, phase modulation module 123 may perform phase inversion processing on the phase modulated signal based on the reference voltage signal to generate a shaped signal. In one example, phase modulation module 123 may include an inverter, and the shaped signal may be generated by inputting a phase modulated signal into the inverter. In another example, phase modulation module 123 may include a comparison circuit or controller and generate the shaped signal by the comparison circuit or controller.

In one embodiment, referring to fig. 4, the phase modulation module 123 may include an adjustable resistor R1, a first capacitor C1, and an inverter U2. The adjustable resistor R1 is connected in parallel with the first capacitor C1, i.e. one end of the adjustable resistor R1 is connected with one end of the first capacitor C1, and the other end of the adjustable resistor R1 is connected with the other end of the first capacitor C1. After parallel connection, one end of the adjustable resistor R1 is further connected to the input ends of the synchronization pulse generation module 121 and the inverter U2, respectively, and the output end of the inverter U2 is connected to the control signal output module 125. The other end of the adjustable resistor R1 is also used for ground. In a specific example, the phase modulation module 123 may further include a diode D1, an anode of the diode D1 is connected to the synchronization pulse generation module 121, and a cathode of the diode D1 is connected to one end of the adjustable resistor R1, one end of the first capacitor C1, and an input end of the inverter U2, respectively.

The first capacitor C1 is used as an energy storage element, and can be charged and discharged according to the synchronous pulse signal and output a phase modulation signal. Specifically, the first capacitor C1 is charged when the sync pulse signal is at a high level and discharged when the sync pulse signal is at a low level. In the discharging process, because the adjustable resistor R1 is arranged on the discharging loop of the first capacitor C1, the discharging time constant of the first capacitor C1 changes with the change of the resistance value of the adjustable resistor R1, and therefore, when the resistance value of the adjustable resistor R1 is adjusted, the discharging rate of the first capacitor C1 is also adjusted, so that the phase modulation signal is also changed, and the phase modulation purpose is realized.

The inverter U2 inverts the phase-modulated signal output from the first capacitor C1 with the reference voltage signal as a trigger level. Specifically, when the voltage value of the phase modulation signal is greater than the trigger level, the inverter U2 outputs a first level signal; the inverter U2 outputs a second level signal when the voltage value of the phase modulated signal is less than the trigger level. The first level signal and the second level signal may be determined according to circuit configurations of the control signal output module 125 and the sample-and-hold device. In a specific example, if the first level signal may be a low level signal, the second level signal may be a high level signal. When the phase modulation signal and/or the phase modulation signal are/is changed, the duty ratio of the shaping signal is adjusted along with the phase modulation signal, so that the duration of the effective level signal in the sampling control signal can correspond to the target sampling time period.

In this embodiment, the phase modulation module 123 is implemented by the adjustable resistor R1, the first capacitor C1, and the inverter U2, so that the circuit structure can be simplified and the device cost can be reduced. Meanwhile, the adjustment of the shaping signal is realized by adjusting the resistance value of the adjustable resistor R1 or the reference level signal of the inverter U2, so that the adjustment of a sampling point can be realized, the signal sampling and holding of any section of area in the target signal period can be realized, and the flexibility and the applicability of the sampling and holding circuit can be further improved.

In one embodiment, the control signal output module 125 may directly output the shaped signal as the sampling control signal to the sample-and-hold device, so that the circuit configuration may be simplified.

In one embodiment, the sampling control signal includes an active level signal and an inactive level signal. The control signal output module 125 is configured to perform edge detection on the shaped signal and output a sampling control signal according to a detection result. Specifically, the control signal output module 125 outputs an active level signal of a preset duration to instruct the sampling control device to sample and hold the target signal when detecting that a rising edge and/or a falling edge of the shaping signal arrives. The control signal output module 125 outputs an invalid level signal to instruct the sampling control device to suspend sampling when the valid level signal is output and the next edge is not detected. The duration of the effective level signal may be determined according to sampling precision, signal waveform, and/or device parameters of the sample-and-hold device, and the like, which is not particularly limited in the present application, and only needs to implement the aforementioned functions. Therefore, the duration of the sampling and holding can be adjusted by adjusting the duration of the effective level signal, so that the interference of the part except the sampling target in the target signal on the sampling can be avoided, and the sampling accuracy can be improved.

In one embodiment, referring to fig. 5, the control signal output module 125 includes a first not gate U3, a first resistor R2, a second capacitor C2, and a first nand gate U4. The input end of the first not gate U3 is connected to the phase modulation module 123, and the output end is connected to one end of the first resistor R2. The other end of the first resistor R2 is connected to one end of the second capacitor C2 and the first input terminal of the first nand gate U4, respectively. A second input of the first nand gate U4 is connected to the phase modulation block 123, and an output thereof is connected to the sample-and-hold means. The other terminal of the second capacitor C2 is used for ground. In a specific example, as shown in fig. 8, the control signal output module 125 may further include a third resistor R3 connected between the output of the first nand gate U4 and the sample-and-hold device.

Specifically, the first resistor R2 and the second capacitor C2 form a delay circuit, and the delay circuit cooperates with the first not gate U3 and the first nand gate U4 to achieve rising edge detection. The first NOT gate U3 performs a logical NOT operation on the shaping signal A to output a signal

After being delayed by the first resistor R2 and the second capacitor C2, the delayed signal is input into the first NAND gate U4 from the first input end of the first NAND gate U4. The first nand gate U4 also obtains a shaping signal a through a second input terminal thereof, and pairs a and the delayed signal

And carrying out NAND operation and outputting a sampling control signal. Wherein the duration of the active level signal is determined by the rising edge of the shaped signal and circuit parameters of the delay circuit. In this embodiment, the control pulse output module is implemented by the first not gate U3, the first resistor R2, the second capacitor C2, and the first nand gate U4, so that the circuit structure can be simplified and the device cost can be reduced.

In one embodiment, the synchronization pulse generating module 121 may directly output the target signal to the phase modulating module 123 as a synchronization pulse signal, so that the circuit structure may be simplified.

In one embodiment, the synchronization pulse signal includes a charge level signal and a discharge level signal. The synchronization pulse generation module 121 is configured to acquire a synchronization signal, and output a charging level signal with a preset duration to charge the phase modulation module 123 when a rising edge and/or a falling edge of the synchronization signal is detected to arrive; and outputting the discharge level signal when the output of the current charge level signal is finished and the next edge is not detected. The duration of the charge level signal may be determined according to sampling accuracy and/or charge-discharge parameters of the phase modulation module 123, and the like, which is not specifically limited in the present application, and only needs to implement the aforementioned functions. Therefore, the duration of the charging level signal is adjusted, so that the charging time in each charging and discharging period can be reduced, the discharging time is prolonged (or the discharging time is reduced, and the charging time is prolonged), the adjustable area in the phase modulation signal can be widened, and the adjustment precision and the sampling accuracy can be improved.

In one embodiment, referring to fig. 6, the sync pulse generation module 121 includes a second not gate U5, a second resistor R4, a second nand gate U6, a third capacitor C3, and a third not gate U7. The input end of the second not gate U5 is connected to the output end of the flip-flop, the output end of the second not gate U5 is connected to one end of a second resistor R4, and the other end of the second resistor R4 is connected to one end of a third capacitor C3 and the first input end of a second nand gate U6. A second input end of the second nand gate U6 is connected to the output end of the flip-flop, an output end of the second nand gate U6 is connected to the input end of the third not gate U7, and an output end of the third not gate U7 is connected to the phase modulation module 123. The other terminal of the third capacitor C3 is connected to ground.

Specifically, the second resistor R4 and the third capacitor C3 form a delay circuit, the delay circuit cooperates with the second not gate U5 and the second nand gate U6 to realize rising edge detection, and the third not gate U7 converts a detection result into a synchronous pulse signal matched with the phase modulation circuit. The second NOT gate U5 performs a logical NOT operation on the synchronization signal B to output a signal

Signal

The voltage is delayed by a second resistor R4 and a third capacitor C3 and then input to a second NAND gate U6. The second nand gate U6 also obtains the synchronization signal B and combines the synchronization signal B with the delayed signal

And performing NAND operation and outputting a NAND signal. The third not gate U7 performs a logical not operation on the nand signal, and outputs a synchronization pulse signal. The duration time of the charging level signal is related to the rising edge of the synchronous signal and the circuit parameter of the delay circuit.

It is understood that in this embodiment, the functions of the second nand gate U6 and the third not gate U7 may be implemented by using an and gate, that is, the second nand gate U6 and the third not gate U7 may be replaced by an and gate, a first input end of the and gate may be connected to the other end of the second resistor R4 and one end of the third capacitor C3, respectively, a second input end of the and gate may be connected to an output end of the flip-flop, and an output end of the and gate may be connected to the phase modulation module 123.

In this embodiment, the synchronous pulse conditioning module is implemented by the second not gate U5, the second resistor R4, the second nand gate U6, the third capacitor C3 and the third not gate U7, so as to simplify the circuit structure and reduce the device cost.

To facilitate understanding of the aspects of the present application, a specific example will be described below. As shown in fig. 7, a sample-and-hold control apparatus 10 is provided, which includes a signal input port P1, a diode D1, a schmitt trigger U1, an inverter U2, a first not gate U3, a first nand gate U4, a second not gate U5, a second nand gate U6, a third not gate U7, an adjustable resistor R1, a first resistor R2, a third resistor R3, a second resistor R4, a first capacitor C1, a second capacitor C2, and a third capacitor C3.

The signal input port P1 is connected with the input end of the Schmitt trigger U1 and is used for being respectively connected with the radio-frequency wave knife and the sampling holding device. The output end of the schmitt trigger U1 is connected to the second input end of the second nand gate U6 and the input end of the second not gate U5, respectively, the output end of the second not gate U5 is connected to one end of the second resistor R4, and the other end of the second resistor R4 is connected to one end of the third capacitor C3 and the first input end of the second nand gate U6, respectively. The output end of the second NAND gate U6 is connected with the input end of the third NOT gate U7, and the output end of the third NOT gate U7 is connected with the anode of the diode D1.

The cathode of the diode D1 is connected to one end of the adjustable resistor R1, one end of the first capacitor C1, and the input end of the inverter U2, the output end of the inverter U2 is connected to the second input end of the first nand gate U4 and the input end of the first not gate U3, the output end of the first not gate U3 is connected to one end of the first resistor R2, and the other end of the first resistor R2 is connected to one end of the second capacitor C2 and the first input end of the first nand gate U4. The output end of the first nand gate U4 is connected to the sample-and-hold device through a third resistor R3. The other end of the adjustable resistor R1, the other end of the first capacitor C1, the other end of the second capacitor C2 and the other end of the third capacitor C3 are all used for grounding.

As shown in fig. 8, if the voltage at the point a in the target signal needs to be sampled and held, the sample-and-hold circuit can control the sample-and-hold device through the following process. The signal input port P1 acquires a target signal and divides the target signal into two paths, one path of which is supplied to the schmitt trigger U1, and the other path of which is supplied to the sample-and-hold device. The schmitt trigger U1 performs waveform shaping on the target signal and outputs the synchronization signal shown in fig. 8. After edge detection is performed by the second not gate U5, the second nand gate U6, the third not gate U7, the second resistor R4 and the third capacitor C3, the synchronization signal can be conditioned into a rising edge pulse signal (i.e., a synchronization pulse signal) as shown in fig. 8. The rising edge pulse signal charges the first capacitor C1 through the diode D1, the first capacitor C1 charges when the sync pulse signal is a high level signal, and the first capacitor C1 discharges when the sync pulse signal is a low level signal. Since the charging and discharging time constants of the first capacitor C1 are not uniform, the phase modulation signal shown in fig. 8 can be formed. The capacitance discharge speed of the first capacitor C1 is changed by changing the resistance value of the adjustable resistor R1, so that phase modulation can be realized. After obtaining the phase modulation signal, the third not gate U7 may be used to shape the phase modulation signal and output the shaped signal as shown in fig. 8, and finally the rising edge of the shaped signal is detected by the first not gate U3, the first nand gate U4, the first resistor R2, the third resistor R3 and the second capacitor C2, so as to generate the sampling control signal as shown in fig. 8.

In one embodiment, as shown in fig. 9, there is provided a host applied to a radio frequency electric wave knife system, the host comprises a sample-and-hold device 20, and a sample-and-hold control device 10 in any of the above embodiments. The sample-and-hold means 20 is connected to the sample-and-hold control means 10 for acquiring the sampling control signal and sampling the target signal during the duration of the active level signal of the sampling control signal. In other words, the sample-and-hold means 20 samples the currently acquired target signal when acquiring the active level signal; when the active level signal is not acquired, the sampling is suspended. It is understood that the sample-and-hold device 20 may implement sampling through a capacitor, and may also implement sample-and-hold of a signal through other circuit structures or devices, which is not specifically limited in this application, and only the sample-and-hold device 20 may implement the above-mentioned functions.

In one embodiment, as shown in fig. 10, the sample and hold apparatus 20 may include a sample and hold module 210, a divide-by module 220, and an energy bleed-off module 230. The sample-and-hold module 210 is connected to the synchronous signal conditioning circuit 120 and the energy bleeding module 230, the energy bleeding module 230 is connected to the frequency dividing module 220, and the frequency dividing module 220 is connected to the signal input circuit 110.

The sample-and-hold module 210 may obtain a target signal from the signal input circuit 110 (e.g., the signal input port P1) and a sampling control signal from the synchronization signal conditioning circuit 120, and sample the target signal during a duration of an active level signal of the sampling control signal, and output the sampling signal. It is to be understood that the sample-and-hold module 210 may implement sampling by capacitance, and may implement sample-and-hold of signals by other circuit structures or devices.

In one embodiment, the sample-and-hold module 210 may include a switching device Q1 and a fourth capacitor C4. The control end of the switching device Q1 is connected to the synchronous signal conditioning circuit 120, the first end is connected to the signal input circuit 110 and one end of the fourth capacitor C4, respectively, and the other end of the fourth capacitor C4 and the second end of the switching device Q1 are both used for grounding. The switching device Q1 switches the on/off state between the first terminal and the second terminal under the control of the sampling control signal. When the first terminal is disconnected from the second terminal, the target signal flows from the signal input circuit 110 to the fourth capacitor C4, so that the fourth capacitor C4 can sample the target signal; when the first terminal and the second terminal are turned on, the target signal flows to the ground through the switching device Q1, but does not flow to the fourth capacitor C4, so the fourth capacitor C4 suspends sampling. The selection of the switching device Q1 can be determined according to the signal waveform of the active level signal, design parameters, and other factors.

In a specific example, as shown in fig. 11, the switching device Q1 is an NMOS transistor, and the sample-and-hold module 210 further includes a fourth resistor R5 and a diode D2. The gate of the NMOS transistor is connected to the synchronization signal conditioning circuit 120, the drains of the NMOS transistor are respectively connected to one end of the fourth resistor R5 and the anode of the diode D2, the cathode of the diode D2 is connected to one end of the fourth capacitor C4, and the other end of the fourth capacitor C4 is used for grounding. The other end of the fourth resistor R5 is connected to the signal input circuit 110. The active level signal is a low level signal.

When the sampling control signal is at high level, the NMOS transistor is turned on, and the target signal flows to ground through the NMOS transistor and does not flow to the fourth capacitor C4, so that the fourth capacitor C4 suspends sampling. When the sampling control signal is at a low level, the NMOS transistor is turned off, the target signal flows to the fourth capacitor C4 through the diode D2, and the fourth capacitor C4 is charged, so that a signal segment of a specific region in the target signal period can be sampled. In this way, the sampling control module can switch on the switching device Q1 when the target signal is the signal segment of the specific region by the signal holding principle, and the signal segment is collected after being stored by the fourth capacitor C4, so that the circuit structure of the sampling and holding device 20 can be simplified, and the equipment cost can be reduced.

The frequency dividing module 220 obtains an unprocessed or processed target signal (a processed target signal, that is, a synchronization signal) from the signal input circuit 110, and generates a frequency-divided signal according to the target signal or the synchronization signal. The energy bleeding module 230 bleeds energy from the sample-and-hold module 210 according to the divided signal. Since the voltage of the sample-and-hold module 210 tends to be stable after a plurality of signal cycles, in order to avoid the influence of the electric energy remaining in the sample-and-hold module 210 on the sampling of the next sampling target, the energy release module 230 may control the sample-and-hold module 210 to release the energy, and complete the reset of the sample-and-hold module 210. Meanwhile, in order to control the frequency of energy release and avoid the problem of inaccurate sampling result caused by excessive or insufficient release frequency, the frequency of energy release can be adjusted through a frequency division signal.

In one embodiment, as shown in fig. 12, the energy dump module 230 includes a switching device Q2 and a fifth capacitor C5. The control terminal of the switching device Q2 is connected to the frequency dividing module 220, the first terminal is connected to the sample-and-hold module 210, and the second terminal is connected to ground. The switching device Q2 switches the on-off state between the first terminal and the second terminal under the control of the frequency-divided signal. When the first terminal and the second terminal are conducted, the sample-and-hold module 210 is connected to the ground through the switching device Q2, so that the electric energy stored therein can be discharged through the ground. When the first terminal is disconnected from the second terminal, the sample-and-hold module 210 normally performs a sample-and-hold function. The selection of the switching device Q2 may be determined according to the signal waveform of the frequency-divided signal, design parameters, sampling parameters of the sample-and-hold module 210, and other factors. In one specific example, the switching device Q2 may be an NMOS transistor.

In one embodiment, as shown in FIG. 12, the frequency divider module 220 includes a first ripple counter U8 and a second ripple counter U9 connected in series. The first ripple counter U8 is also connected to the signal input circuit 110 for obtaining a synchronization signal. The second ripple counter U9 is connected to the energy dump module 230 and outputs a frequency divided signal.

In one embodiment, the host may further comprise an analog-to-digital converter, and the sample-and-hold apparatus 20 may further comprise a detection module 240. The detection module 240 is respectively connected to the sample-and-hold module 210, the energy bleeding module 230, and the analog-to-digital converter, and is configured to perform detection processing on the sampled signal, convert the ac sampled signal into a dc detection signal, and output the detection signal to the analog-to-digital converter. The analog-to-digital converter is used for performing analog-to-digital conversion on the detection signal to obtain a voltage value of a sampling target and sampling a specific area in the high-speed periodic signal. Thus, by detecting the sampling signal and outputting the detected signal to the analog-to-digital converter for processing, the analog-to-digital converter device does not need to identify the received signal to determine whether the signal is the energy bleeding module 230, and the analog-to-digital converter device directly performs analog-to-digital conversion on the received detected signal, so that the limitation on the analog-to-digital converter device can be reduced, and the sampling requirement of the low-rate analog-to-digital converter can be met. Therefore, the analog-to-digital converter can be realized by adopting a low-speed analog-to-digital converter, so that the acquisition accuracy is ensured and the cost is reduced.

In one embodiment, the host may further include a first isolation module connected between the detector module 240 and the energy dump module 230, and a second isolation module connected to the output of the detector module 240, so that the isolation of the modules may be improved.

As shown in fig. 13, the voltage value of the point a in the target signal may be acquired by the following procedure. The switching device Q1 acquires the sampling control signal as shown in fig. 13, and when the sampling control signal is at a high level, the switching device Q1 is turned on, and the target signal flows to the ground through the switching device Q1 without flowing to the fourth capacitor C4, so that the fourth capacitor C4 suspends sampling. When the sampling control signal is at a low level, the switching device Q1 is turned off, the target signal flows to the fourth capacitor C4 through the diode D2, and the fourth capacitor C4 is charged. After a plurality of signal cycles, the voltage of the fourth capacitor C4 tends to be stable, and in order to avoid the influence of the residual power therein on the sampling of the next sampling target, the switching device Q2 may be periodically turned on to discharge the fourth capacitor C4 under the trigger of the frequency-divided signal output by the second ripple counter U8. When the switching device Q1 is turned off, the fourth capacitor C4 can be recharged, and this cycle forms a square wave signal (i.e., the sampling signal) having a peak value of the target point voltage (i.e., the voltage at point a) minus the diode turn-on voltage drop, and the waveform of the sampling signal can be as shown in fig. 13. The sampling signal is subjected to signal isolation through a first operational amplifier U10, and is input into a detection module 240 composed of a diode D3, a sixth capacitor C6 and a sixth resistor R7, the detection module 240 converts the alternating-current sampling signal into a stable direct-current detection signal, and the stable direct-current detection signal is output to an analog-to-digital converter through a signal output port P2 for collection, so that the voltage value of the point A is obtained.

In one embodiment, a radio frequency electric wave knife system is also provided. The radio frequency electric wave knife system comprises a radio frequency electric wave knife and the host in any embodiment, wherein the host is connected with the radio frequency electric wave knife and can control the output power of the radio frequency electric wave knife according to a sampling signal so as to improve the control accuracy.

In the description herein, references to the description of "some embodiments," "other embodiments," "desired embodiments," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the utility model. In this specification, a schematic description of the above terminology may not necessarily refer to the same embodiment or example.

The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.

The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the utility model. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.

Claims (10)

1. A sample hold control device is characterized in that the sample hold control device is applied to a host of a radio frequency electric wave knife system, and the host comprises a sample hold device; the sample-and-hold control device includes: the circuit comprises a signal input circuit and a synchronous signal conditioning circuit, wherein the signal input circuit comprises a trigger;

the trigger is used for acquiring a target signal generated by the radio frequency electric wave knife and triggering to generate a synchronous signal; the target signal is used for reflecting the output power of the radio frequency electric wave knife; the synchronization signal is in phase with the target signal;

the synchronous signal conditioning circuit is respectively connected with the trigger and the sampling holding device and is used for generating a sampling control signal according to the synchronous signal and outputting the sampling control signal to the sampling holding device;

the sampling control signal is in phase with the target signal, and the duration of an active level signal in the sampling control signal corresponds to a target sampling time period, so as to control the sampling and holding device to sample the target signal within the duration of the active level signal.

2. The sample-and-hold control device of claim 1, wherein the synchronization signal conditioning circuit comprises:

the synchronous pulse generating module is connected with the trigger and used for outputting a synchronous pulse signal according to the synchronous signal; the synchronization pulse signal is in phase with the target signal;

the phase modulation module is connected with the synchronous pulse generation module and is used for generating a phase modulation signal according to the target sampling time period and the synchronous pulse signal; the phase of the phase modulated signal corresponds to the target sampling time period;

and the control signal output module is respectively connected with the phase modulation module and the sampling holding device and is used for generating the sampling control signal according to the phase modulation signal.

3. The sample-and-hold control device according to claim 2, wherein the phase modulation module is provided with a charge-discharge unit;

the phase modulation module is used for adjusting the charge and discharge parameters of the charge and discharge unit according to a target sampling time period, so that the charge and discharge unit carries out charge and discharge based on the adjusted charge and discharge parameters and the synchronous pulse signal, and the phase modulation signal is generated.

4. The sample-and-hold control device according to claim 2 or 3, wherein the phase modulation module is configured to perform waveform shaping on the phase-modulated signal to obtain a shaped signal; or,

the phase modulation module is used for carrying out phase-reversal processing on the phase modulation signal based on a reference voltage signal to obtain the shaping signal;

the control signal output module is used for generating the sampling control signal according to the shaping signal, the sampling control signal comprises an effective level signal and an ineffective level signal, the control signal output module is used for outputting the effective level signal with preset duration when the edge of the shaping signal is detected to arrive, and otherwise, the control signal output module outputs the ineffective level signal.

5. The sample-and-hold control device of claim 4, wherein the phase modulation module comprises an adjustable resistor, a first capacitor, and an inverter;

one end of the adjustable resistor is respectively connected with the synchronous pulse generation module, one end of the first capacitor and the input end of the phase inverter; the output end of the phase inverter is connected with the control signal output module; the other end of the adjustable resistor and the other end of the first capacitor are both used for grounding.

6. The sample-and-hold control device of claim 4, wherein the control signal output module comprises a first NOT gate, a first resistor, a second capacitor, and a first NAND gate;

the input end of the first NOT gate is connected with the phase modulation module, and the output end of the first NOT gate is connected with one end of the first resistor; the other end of the first resistor is respectively connected with one end of the second capacitor and the first input end of the first NAND gate; the second input end of the first NAND gate is connected with the phase modulation module, and the output end of the first NAND gate is connected with the sampling and holding device;

the other end of the second capacitor is used for grounding.

7. The sample-hold control device according to claim 2 or 3, wherein the synchronization pulse signal includes a charge level signal and a discharge level signal;

the synchronous pulse generation module is used for outputting the charging level signal with preset duration when detecting that the edge of the synchronous signal arrives, and otherwise, outputting the discharging level signal.

8. The sample-hold control device of claim 7, wherein the sync pulse generation module comprises a second not gate, a second resistor, a second nand gate, a third capacitor, and a third not gate;

the input end of the second NOT gate is connected with the trigger, and the output end of the second NOT gate is connected with one end of the second resistor; the other end of the second resistor is respectively connected with one end of the third capacitor and the first input end of the second NAND gate; the second input end of the second NAND gate is connected with the trigger, and the output end of the second NAND gate is connected with the input end of the third NAND gate; the output end of the third NOT gate is connected with the phase modulation module;

the other end of the third capacitor is used for grounding.

9. A sample-and-hold control device according to any of claims 1 to 3, characterized in that the trigger is a schmitt trigger.

10. A host is characterized by being applied to a radio frequency electric wave knife system; the host comprises a sample-and-hold device, and a sample-and-hold control device according to any one of claims 1 to 9;

the sampling and holding device is connected with the sampling and holding control device and is used for acquiring a sampling control signal and sampling a target signal in the duration time of an effective level signal of the sampling control signal.

Images