CN215268840U

CN215268840U - COF driving module and COF display module

Info

Publication number: CN215268840U
Application number: CN202120290844.XU
Authority: CN
Inventors: 朱庆华; 黄双平; 华卫华
Original assignee: Shenzhen Quanzhou Automation Equipment Technology Co ltd
Current assignee: Shenzhen Quanzhou Automation Equipment Technology Co ltd
Priority date: 2021-02-02
Filing date: 2021-02-02
Publication date: 2021-12-21
Anticipated expiration: 2031-02-02

Abstract

The utility model provides a COF drive module, which comprises a FPC submodule and a COG drive submodule, wherein the FPC submodule comprises a first FPC flat cable and a second FPC flat cable; the COG driving submodule comprises COG glass arranged on the FPC submodule and a driving chip arranged on the COG glass, and the COG glass is provided with a micron-sized bonding pad and a conductive lead; the COG glass is respectively connected with the first FPC flat cable and the second FPC flat cable; the input end of the driving chip is connected to an external control module through COG glass and a second FPC flat cable; the output end of the driving chip is connected to an external display panel through COG glass and a first FPC flat cable; the bottleneck of the conventional COF scheme can be overcome by a mode of mixing and assembling the hard substrate (COG glass) and the flexible substrate (FPC submodule), and micron-sized fine lines can be realized in the COF with high yield and low cost. The utility model discloses COF display module assembly, OLED display module assembly and electron ink display module assembly including this COF drive module are still provided.

Description

COF driving module and COF display module

Technical Field

The utility model relates to a show technical field, especially relate to a manufacturing method of COF drive module, COF liquid crystal display module, COFOLED display module, COF electronic ink display module, COF liquid crystal display module, OLED display module and the manufacturing method of electronic ink display module.

Background

In the technical field of related display modules such as liquid crystal display modules, OLED display modules or electronic ink display modules, the current mainstream solution is the COG (COG is an abbreviation of Chip On Glass, i.e. a Chip is directly bonded On Glass) technology, and referring to fig. 1, a wider step 2a for placing an external connection line of a driving Chip 3a and a driving Chip 3a is required to be reserved at the edge of a panel 1a by adopting the COG solution. When the same size panel adopts COF (Chip On Flex, or, Chip On Film, commonly called as Chip On Film), which is a technology of packaging a Chip On a flexible circuit board, and a flexible additional circuit board is used as a carrier for packaging the Chip, and the Chip is combined with a flexible substrate circuit), the area occupation ratio of the display area can be improved because no Chip occupies a part of the area of the display panel. Under the condition that the overall dimension of the panel is kept unchanged, the display module can achieve higher resolution than a display module adopting the COG technology.

SUMMERY OF THE UTILITY MODEL

Currently, the conventional COF solution is greatly limited due to insufficient line precision of the FPC. The line width/line distance of the conventional FPC is generally not less than 50/50 μm, the line with the highest precision in the global range can reach 20/20 μm, and the cost is extremely high. This is far from the conventional size (around 10 μm) of the COG solution, resulting in a COF solution that is very limited in chip selection, and also increases the cost of the overall solution. Therefore, how to improve the line accuracy of FPC at a low cost becomes a problem to be solved in the development of COF technology.

Solution to the problem

The COF driving module comprises an FPC submodule and a COG driving submodule, wherein the FPC submodule comprises a first FPC flat cable and a second FPC flat cable; the COG driving submodule comprises COG glass arranged on the FPC submodule and a driving chip arranged on the COG glass, and the COG glass is provided with a micron-sized bonding pad and a conductive lead; the COG glass is respectively connected with the first FPC flat cable and the second FPC flat cable; the input end of the driving chip is connected to an external control module through COG glass and a second FPC flat cable; the output end of the driving chip is connected to an external display panel through the COG glass and the first FPC flat cable.

By the technical scheme, the COF is partially changed into a COG glass-hard substrate; the bottleneck of the conventional COF scheme can be overcome by a mode of mixing and assembling the hard substrate (COG glass) and the flexible substrate (FPC submodule), and micron-sized fine lines can be realized in the COF with high yield and low cost.

The micron-sized fine wiring can be processed on a hard substrate such as COG glass, so that a conventional low-cost small-sized driver IC can be used without selecting a COF-dedicated high-cost IC. Then the flexible substrate is connected with a flexible substrate circuit in a fan-in and fan-out mode, the circuit with the distance of 25 micrometers can be used on the flexible substrate, and the circuit with the distance of 50 micrometers or more can also be used on the flexible substrate, so that the requirements on the precision of the flexible substrate and the flexible circuit are obviously reduced; the combination of the two can greatly reduce the process difficulty and the comprehensive cost of COF products.

Preferably, the COG glass is small, integrated on a large flexible circuit board, or connected between two small flexible circuits, or on one of two interconnected flexible circuit boards. The COG glass is a constituent element of the patent protection object, and the width dimension of the line and the pad is in the micron order, and the COG glass is named as RU, namely a hardboard-micron hardboard with the line width of the micron order. The advantages are that: the integration of the traditional hard board manufacturing process is improved, the occupied area is reduced, the resource consumption is reduced, the yield is improved, the output is improved, and the product cost is reduced; compared with the traditional hard board, the product has higher integration level, smaller volume and smaller installation space, and can be directly butted with an IC with fine pins or a device with dense lines (such as an LCD screen); the product is lead-free, the harm of the production process to the environment and the investment cost for sewage and waste gas treatment are far less than those of the traditional PCB industry, the harm to the human society can be reduced, and the resource consumption can be reduced. The product is a product which meets the future development requirement of the human society because the process of replacing the product is accelerated by the environmental protection advantage of the product from the production process.

Preferably, a chip input end bonding pad, a chip output end bonding pad, a lead input end bonding pad and a lead output end bonding pad are arranged on the COG glass;

the lead input end bonding pad and the lead output end bonding pad are positioned on the peripheral side of the upper surface of the COG glass; the chip input end bonding pad and the chip output end bonding pad are positioned at the non-edge position of the upper surface of the COG glass;

an input end bonding pad of the driving chip is connected to an input end bonding pad of the chip through a bonding process, and an output end bonding pad of the driving chip is connected to an output end bonding pad of the chip through the bonding process;

the lead input end bonding pad is connected to the chip input end bonding pad through a fan-in lead positioned on the COG glass, and the chip output end bonding pad is connected to the lead output end bonding pad through a fan-out lead positioned on the COG glass;

the lead input end bonding pad is welded with an output end lead of the second FPC flat cable; and the lead output end bonding pad is welded with an input end lead of the first FPC flat cable.

Preferably, the lead wires of the FPC sub-module and the COG drive sub-module which are butted are in a two-side outgoing line mode, a three-side outgoing line mode or a four-side outgoing line mode.

Preferably, the number of the chip input end bonding pads, the number of the chip output end bonding pads, the number of the lead input end bonding pads and the number of the lead output end bonding pads are more than 2;

the typical distance between adjacent chip input end bonding pads is 3-50 mu m;

the typical distance between adjacent chip output end bonding pads is 3-50 mu m;

the typical distance between adjacent lead input end bonding pads is 15-1000 mu m;

the typical distance between adjacent lead output end bonding pads is 15-500 mu m.

Preferably, the connection mode of the COG glass and the FPC sub-module is a full-enclosure structure enclosed by four sides, a semi-enclosed structure enclosed by three sides, a semi-enclosure structure enclosed by two sides, or an open structure in which a plurality of sections of FPC and COG are mixed.

When the FPC is completely surrounded, the FPC is a whole, and the middle of the FPC is hollowed (or not hollowed); when the semi-surrounding is performed, one side of the FPC is provided with an opening; with the open configuration, the FPC is divided into sections.

Preferably, the first FPC cable and the second FPC cable are provided with direct-connection conductive lines, and the direct-connection conductive lines are provided as power lines, ground lines, or other lines that do not need to pass through the driver chip.

Preferably, the substrate in the width direction of the first FPC flat cable and/or the second FPC flat cable is provided with half-cut, slotted or hollowed-out parts, so that deformation caused by thermal expansion and cold contraction cannot be accumulated excessively, larger stress can be avoided, and the reliability of combination of the first FPC flat cable and/or the second FPC flat cable, the COG glass and the display panel is improved.

Preferably, the material of the COG glass may be replaced by polyimide, phenolic resin, fiberglass/epoxy resin, BT resin, epoxy resin, soda lime glass, borosilicate glass, quartz glass, sapphire, ceramic, silicon wafer, or the material of the COG glass may be replaced by a combination of a conductor, a semiconductor substrate, and an insulating layer.

The pad and the conducting circuit material on the COG glass can be replaced by conducting film materials which can realize high photoetching precision, such as copper, chromium, nickel, gold, silver, ITO (ITO is an N-type oxide semiconductor-indium tin oxide, and an ITO film is an indium tin oxide semiconductor transparent conducting film), Mo, Al/Mo or other various semiconductor conducting materials and the like; or, the pad and the conducting circuit on the COG glass are made of an ITO layer as a substrate, and a copper layer, a chromium layer, a nickel layer, a gold layer, a silver layer, a Mo layer, an Al/Mo layer or a semiconductor conducting material layer is added.

The applicant supplements the description here, the problem of the traditional COG process for processing fine lines:

in the LCD and TP industries, a hard substrate such as glass is used as a carrier, and a conductive film (such as ITO, MO, AL/MO and the like) on a base material can be processed into a micron-sized precise circuit. In order to process micron-sized fine lines, the thickness of the coating film on the hard substrate is usually between 10 and 300 nm. The thicker the film layer, the more likely side etching occurs during processing. In this respect, the smaller the thickness of the film layer, the easier it is to ensure the yield of fine lines. However, from another perspective, the thinner the thickness of the film, the weaker the power supply capability. Taking the traditional COG technology as an example, the typical thickness of an ITO coating film is 30-100 nm, the resistance of the film is large, and a line with the diameter of 10 mu m is difficult to drive an LCD screen with more than six inches. The power consumption of products in the LCD and TP industries is very low, and the requirement on the load capacity of a line is not high. The micron-scale circuit processed based on the traditional COG process has power supply capacity which is difficult to meet the requirements of COF and other application scenes. In order to improve the power supply capacity, the traditional COG process needs to be modified, a metal film is added on an ITO film layer, or the glass plated with the metal film is directly used for making a fine circuit.

A COF display module comprises a display panel and the COF drive module, wherein the COF drive module is introduced above, and the input end of the display panel is connected with the output end of a first FPC flat cable.

Preferably, the display panel is a liquid crystal display panel, an OLED display panel or an electronic ink display panel

A method of manufacturing a COF driving module includes:

a, manufacturing a micron-sized chip bonding pad, a lead bonding pad and a conductive lead on a small piece of COG glass, wherein the conductive lead is divided into an input lead and an output lead, the chip bonding pad is divided into a chip input end bonding pad and a chip output end bonding pad, and the lead bonding pad is divided into a lead input end bonding pad and a lead output end bonding pad; the input lead is connected with the lead input end bonding pad and the chip input end bonding pad in a fan-in mode, and the output lead is connected with the chip output end bonding pad and the lead output end bonding pad in a fan-out mode;

b, bonding a driving chip on the COG glass, wherein a bonding pad on the driving chip is correspondingly connected with a bonding pad at the chip input end and a bonding pad at the chip output end on the COG glass;

c, correspondingly connecting one end interfaces of the first FPC flat cable and the second FPC flat cable with the lead bonding pads respectively;

the other end interface of the second FPC flat cable is used for connecting an external control module; and the other end interface of the first FPC flat cable is used for connecting the display panel and sending a display signal to the display panel.

Preferably, in step a: manufacturing a micron-sized ITO chip bonding pad, an ITO lead bonding pad and an ITO conductive lead on COG glass;

then, a layer of copper, gold or other types of metal materials is added on the ITO chip bonding pad, the ITO lead bonding pad and the ITO conductive lead in a copper, gold, copper or gold plating mode.

The material of the circuit is optimized, the plating layer is thickened, and the conductivity of the fine circuit can be greatly improved on the premise of ensuring the circuit precision.

Preferably, in step a: the thickness of the ITO layer for manufacturing the micron-sized ITO chip bonding pad, the ITO lead bonding pad and the ITO conductive lead on the COG glass is 10-1000 nm.

Preferably, step a comprises:

step A1: coating primary photosensitive glue on ITO glass (the ITO conductive glass is manufactured by plating an indium tin oxide film on the basis of soda-lime-based or silicon-boron-based substrate glass by various methods such as sputtering, evaporation and the like), wherein the ITO glass comprises an ITO layer and a glass layer;

step A2: exposing and developing for the first time, and removing the photosensitive adhesive layer outside the chip bonding pad, the lead bonding pad and the upper part of the conductive lead;

step A3: etching the ITO layer outside the chip bonding pad, the lead bonding pad and the upper part of the conductive lead; demolding, and removing the chip bonding pad, the lead bonding pad and the photosensitive adhesive layer on the upper part of the conductive lead;

step A4: coating secondary photosensitive resist, exposing, developing, and removing the secondary photosensitive resist on the chip bonding pad, the lead bonding pad and the upper part of the conductive lead;

step A5: adding a conductive layer on the chip bonding pad, the lead bonding pad and the upper part of the ITO layer of the conductive lead; removing the secondary photosensitive resist;

the new technical scheme provided by the patent is summarized as follows: the method comprises the following steps of (1) taking a hard board substrate such as glass and the like as a carrier, and realizing the wiring of materials (such as ITO, CR, MO, AL/MO and the like) of a high-precision conducting circuit on the carrier; firstly, realizing a precise circuit; then, the conducting performance of the circuit is greatly improved on the premise of ensuring the circuit precision by thickening the original circuit by using a material with stronger conducting performance through modes of film coating after masking or direct film coating and the like. For example, copper plating on the surface of the ITO wiring is exemplified, but the method and material are not limited thereto.

Manufacturing an ITO circuit: at present, a circuit with 10/10 mu m precision manufactured in the LCD industry belongs to the conventional technology, and has low difficulty and low cost. The specific process comprises the following steps: after the ITO glass incoming material is subjected to processes of cleaning- > gluing- > developing- > etching- > demolding and the like, the ITO film can be processed into a micron-sized precise circuit.

However, the resistance of the ITO material is 2-3 orders of magnitude greater than that of pure metal, and the power supply capacity of an ITO circuit cannot meet the requirements of COF application scenes and the like easily; in the patent, a layer of metal film is plated on an ITO fine circuit to improve the load capacity of the fine circuit.

Firstly, as described in steps A1-A5, after an ITO circuit is formed, a secondary photosensitive resist mask is formed on the surface to protect a non-circuit area, and chemical copper deposition is performed on the ITO circuit; the secondary photoresist mask is similar to the primary photoresist mask, but a negative-tone lithographic chrome plate is used for alignment overlay exposure.

In order to avoid the deformation of the circuit after film plating, the design of the chrome plate and the primary and secondary photoetching processes ensure that the secondary photosensitive resist mask pattern is slightly smaller than the ITO pattern made for the first time, the amplitude is about 0.5-1.0 mu m staggered from each edge (the gap is used for wrapping the ITO pattern to achieve the effect of completely sealing the ITO circuit by the copper layer), the process needs to be completed by adopting an overlay exposure machine, when the alignment precision can not be achieved due to large area, a STEPPER alignment exposure machine (stepping alignment exposure machine) can be adopted to complete the process, after the process is completed and the post-development baking is carried out, a layer of photosensitive resist line is formed in the ITO line gap, the height of the ITO line step is generally 10-300 nm, the height of the photoresist line step is 1400-2000 nm, the height drop is 1100-1700 nm, within this height difference, copper can be plated, the copper thickness must not exceed 1700 nm, otherwise the stripping problem is easy to occur. Electroless copper plating is described by way of example using copper plating water, but the copper plating scheme and materials are not limited thereto. Copper ions in the copper plating solution only deposit on the ITO circuit but cannot be combined with the photosensitive resist, so that after a period of soaking, a copper layer with a certain thickness is deposited on the ITO surface, and the photosensitive resist circuit between the ITO surface and the photosensitive resist circuit is kept intact. And when the thickness of the copper layer meets the requirement, taking the ITO glass out of the copper plating solution, cleaning the ITO glass, and finally demoulding to obtain the high-precision copper circuit.

The advantages of the new method are: a) the related technologies belong to mature technologies and are popularized in China, and the material supply and the cost are suitable for large-scale production. b) Compared with the traditional PCB process, the method can process micron-sized precise circuits, and easily breaks through the processing limit of the existing PCB/FPC industry. c) Compared with the traditional COG process, the defect of large resistance of the ITO circuit is overcome, and the power supply capacity of the fine circuit is greatly improved.

Example two

The step A comprises the following steps:

step A6: coating photosensitive adhesive on ITO glass, wherein the ITO glass comprises an ITO layer and a glass layer;

step A7: exposing and developing, and removing the photosensitive resist on the chip bonding pad, the lead bonding pad and the upper part of the conductive lead;

step A8: adding a conductive layer on the chip bonding pad, the lead bonding pad and the upper part of the ITO layer of the conductive lead;

step A9: completely removing the photosensitive resist;

step A10: and removing the exposed ITO layer by using a micro-etching technology, namely removing the ITO outside the chip bonding pad, the lead bonding pad and the conductive lead.

Steps A6-A10 are summarized as follows: firstly, using a negative image photo-etching chromium plate to carry out exposure and development, exposing the expected circuit, and covering other areas with photosensitive resist; then, the semi-finished product is coated with a film, such as chemical copper deposition, and a layer of pure metal film is coated on the circuit; then cleaning, stripping, and slightly etching with weak acid to remove the non-circuit region. And finally, cleaning and drying to obtain the high-precision copper circuit.

Preferably, the COG glass is soda-lime glass, and may be replaced by polyimide, phenolic resin, glass fiber/epoxy resin, BT resin, epoxy resin, borosilicate glass, quartz glass, sapphire, ceramic, silicon wafer, or a combination of a conductor, a semiconductor substrate and an insulating layer;

the ITO layer on the COG glass is made of copper, chromium, nickel, gold, silver, Mo, Al/Mo or semiconductor conductive materials; or the ITO layer on the COG glass is replaced by an ITO layer serving as a substrate and an additional copper layer, a chromium layer, a nickel layer, a gold layer, a silver layer, a Mo layer, an Al/Mo layer or a semiconductor conducting material layer.

Preferably, in the step C, the first FPC cable and the second FPC cable are located on the same roll of flexible circuit board, and the step C is completed in a roll-to-roll processing form.

the typical distance between adjacent chip input end bonding pads is 3-50 mu m;

The utility model discloses following beneficial effect has: the partial use of COF is realized by using COG glass-hard substrate; the bottleneck of the conventional COF scheme can be overcome with lower cost by a mode of mixing and matching the hard substrate (COG glass) and the flexible substrate (FPC submodule). The micron-sized fine wiring can be processed on a hard substrate such as COG glass, so that a conventional low-cost small-sized driver IC can be used without selecting a COF-dedicated high-cost IC. Then the flexible substrate is connected with a flexible substrate circuit in a fan-in and fan-out mode, the circuit with the distance of 25 micrometers can be used on the flexible substrate, and the circuit with the distance of 50 micrometers or more can also be used on the flexible substrate, so that the requirements on the precision of the flexible substrate and the flexible circuit are obviously reduced; the combination of the two can greatly reduce the process difficulty and the comprehensive cost of COF products. The advantages of the new method are: a) the related technologies belong to mature technologies and are popularized in China, and the material supply and the cost are suitable for large-scale production. b) Compared with the traditional PCB process, the method can process micron-sized precise circuits, and easily breaks through the processing limit of the existing PCB/FPC industry. c) Compared with the traditional COG process, the defect of large resistance of the ITO circuit is overcome, and the power supply capacity of the fine circuit is greatly improved.

Drawings

Fig. 1 is a schematic structural diagram of a prior art COG solution.

Fig. 2 is a schematic structural diagram of an embodiment of the COF driving module of the present invention.

Fig. 3 is a schematic diagram of a module structure of COG glass according to an embodiment of the present invention.

Fig. 4 is a schematic structural diagram of an embodiment of a COF display module according to the present invention.

Fig. 5 is a schematic structural diagram of another embodiment of a COF display module according to the present invention.

Fig. 6 is a schematic structural diagram illustrating a processing procedure of an embodiment of a COG glass module of a COF driving module according to the present invention.

Fig. 7 is a schematic structural diagram illustrating a process of another embodiment of a COG glass module of a COF driving module according to the present invention.

Fig. 8 is a schematic diagram of an assembly process of an embodiment of a COF display module according to the present invention, a single chip.

Fig. 9 is a schematic view of an assembly process of another embodiment of a COF display module according to the present invention, a single chip.

Fig. 10 is a schematic view illustrating an assembly process of a roll material of a COF display module according to the present invention.

In the figure:

1-a display panel; 21-FPC submodule; 211-a first FPC cable; 2111-hollow out construction; 212-second FPC cable; 22-COG driver submodule; 221-COG glass; 2211 — first lead; 2212-second lead; 2213-lead input terminal pads; 2214-lead out terminal pads; 2215-chip input terminal pad; 2216-chip output terminal pad; 222-a driving chip; 00-pad; 01-conductive lines; 05-primary photosensitive glue; 06-secondary photosensitive resist; 08-ITO glass; 081-ITO layer; 082-glass layer; 083-conductive layer.

Detailed Description

As shown in FIGS. 2 to 3:

a COF driving module comprises an FPC submodule 21 and a COG driving submodule 22, wherein the FPC submodule 21 comprises a first FPC flat cable 211 and a second FPC flat cable 212;

the COG driving sub-module 22 comprises COG glass 221 arranged on the FPC sub-module 21 and a driving chip 222 arranged on the COG glass 221, and the COG glass 221 is provided with micron-sized bonding pads and conductive leads;

the COG glass 221 is connected with the first FPC flat cable 211 and the second FPC flat cable 212 respectively;

the input end of the driving chip 222 is connected to the external control module through the COG glass 221 and the second FPC flat cable 212;

the output terminal of the driving chip 222 is connected to an external display panel through the COG glass 221 and the first FPC cable 211. COFs were partially replaced with rigid substrates. The bottleneck of the conventional COF scheme can be overcome by a mode of mixing the hard substrate and the flexible substrate.

In this embodiment, a chip input terminal pad 2215, a chip output terminal pad 2216, a lead input terminal pad 2213 and a lead output terminal pad 2214 are disposed on the COG glass 221; COG glass 221 is provided with first and

second leads

2211 and 2212, first lead 2211 connecting chip output terminal pad 2216 and lead output terminal pad 2214 in a fan-out manner, and second lead 2212 leading input terminal pad 2213 and chip input terminal pad 2215 in a fan-in manner.

In this embodiment, the connection mode between the COG glass 221 and the FPC sub-module 21 is a three-side bonded enclosure structure.

As shown in fig. 2-4, the utility model also provides a COF display module assembly, including above-mentioned COF drive module, still include display panel 1, display panel 1 is connected with lead wire output end pad 2214, provides drive signal through COF drive module.

The embodiment of the utility model

The present invention will be further described with reference to fig. 1 to 10.

The utility model provides a COF drive module.

the output terminal of the driving chip 222 is connected to an external display panel through the COG glass 221 and the first FPC cable 211. The local part of the COF is changed into a hard substrate, and the bottleneck of the conventional COF scheme can be overcome by a mode of mixing the hard substrate and a flexible substrate.

Micron-sized fine lines can be processed on a rigid substrate, thus enabling the use of conventional, low-cost, small-size ICs without the need for COF-specific, high-cost ICs. And then connected with the flexible substrate circuit by means of fan-in and fan-out, the circuit with the distance of 25 μm can be used on the flexible substrate, and the circuit with the distance of 50 μm or more can also be used on the flexible substrate, which can obviously reduce the requirements on the precision of the flexible substrate and the flexible circuit. The combination of the two can greatly reduce the process difficulty and the comprehensive cost of COF products.

second leads

The lead input terminal pad 2213 and the lead output terminal pad 2214 are located on the peripheral side of the upper surface of the COG glass 221; chip input terminal bonding pad 2215 and chip output terminal bonding pad 2216 are located at non-edge positions of the upper surface of COG glass 221;

an input terminal pad of the driver chip 222 is connected to the chip input terminal pad 2215 through a bonding process, and an output terminal pad of the driver chip 222 is connected to the chip output terminal pad 2216 through a bonding process;

wire input pad 2213 is connected to die input pad 2215 by fan-in wires located on COG glass 221, and die output pad 2216 is connected to wire output pad 2214 by fan-out wires located on COG glass 221;

the lead input terminal bonding pad 2213 is welded with an output terminal lead of the second FPC flat cable 212; the lead output terminal pad 2214 is soldered to the input terminal lead of the first FPC cable 211.

In this embodiment, the number of each of the chip input terminal pads 2215, the chip output terminal pads 2216, the lead input terminal pads 2213, and the lead output terminal pads 2214 is more than 2; the distance between adjacent chip input terminal pads 2215 is 15 μm; the distance between adjacent chip output terminal pads 2216 is 15 μm; the distance between adjacent lead input terminal pads 2213 is 150 μm; the distance between the adjacent lead output terminal pads 2214 is 150 μm.

As a preferred alternative, or in accordance with actual needs, with the process of the present invention, the distance between adjacent chip input pads 2215 may also be 5 μm, 8 μm, 10 μm, 15 μm, 20 μm, 25 μm, 30 μm, 35 μm, 40 μm, 45 μm, 48 μm, or 50 μm; the distance between adjacent chip output terminal pads 2216 may also be 5 μm, 8 μm, 10 μm, 15 μm, 20 μm, 25 μm, 30 μm, 35 μm, 40 μm, 45 μm, 48 μm, or 50 μm; the distance between adjacent lead input pads 2213 may also be 20 μm, 30 μm, 50 μm, 75 μm, 100 μm, 125 μm, 150 μm, 200 μm, 250 μm, 300 μm, 400 μm, or 500 μm; the distance between adjacent lead output terminal pads 2214 may also be 20 μm, 30 μm, 50 μm, 75 μm, 100 μm, 125 μm, 150 μm, 200 μm, 250 μm, 300 μm, 400 μm, or 500 μm.

In this embodiment, the connection mode between the COG glass 221 and the FPC sub-module 21 is a full-enclosure structure with four sides bonded.

In this embodiment, the first FPC cable 211 and the second FPC cable 212 are provided with a direct-connection conductive line, and the direct-connection conductive line is provided as a power line, a ground line, or other lines that do not need to pass through the driver chip.

In this embodiment, the COG glass 221 is made of soda lime glass, and may be replaced by polyimide, phenolic resin, glass fiber/epoxy resin, BT resin, epoxy resin, borosilicate glass, quartz glass, sapphire, ceramic, silicon wafer, or a combination of a conductor, a semiconductor substrate, and an insulating layer;

the bonding pad and the conducting circuit on the COG glass 221 are made of copper, chromium, nickel, gold, silver, ITO, Mo, Al/Mo or semiconductor conducting materials; or, the pad and the conductive circuit on the COG glass 221 are made of an ITO layer as a substrate, and a copper layer, a chromium layer, a nickel layer, a gold layer, a silver layer, a Mo layer, an Al/Mo layer, or a semiconductor conductive material layer is added.

As shown in FIGS. 4-10.

Embodiment one, as shown in fig. 4.

A COF display module comprises a display panel 1 and the COF driving module, wherein the input end of the display panel 1 is connected with the output end of a first FPC (flexible printed circuit) flat cable 211.

Example two, as shown in fig. 5.

Example III is shown in FIGS. 8 to 9.

Example four, as shown in fig. 10.

The substrate in the width direction of the first FPC flat cable 211 and/or the second FPC flat cable 212 is provided with a half-cut, grooved or hollowed-out structure 2111, so that deformation during thermal expansion and cold contraction does not accumulate excessively, generation of large stress can be avoided, and the reliability of the combination of the first FPC flat cable 211 and/or the second FPC flat cable 212 with the COG glass 221 and the display panel is improved.

A method of manufacturing a COF driving module includes:

step A, manufacturing micron-sized chip bonding pads, lead bonding pads and conductive leads on the small piece of COG glass 221, wherein the conductive leads are divided into input leads and output leads, the chip bonding pads are divided into chip input end bonding pads 2215 and chip output end bonding pads 2216, and the lead bonding pads are divided into lead input end bonding pads 2213 and lead output end bonding pads 2214; the input lead is connected with a lead input terminal bonding pad 2213 and a chip input terminal bonding pad 2215 in a fan-in mode, and the output lead is connected with a chip output terminal bonding pad 2216 and a lead output terminal bonding pad 2214 in a fan-out mode;

step B, bonding the driving chip 222 on the COG glass 221, wherein a bonding pad on the driving chip 222 is correspondingly connected with a bonding pad 2215 at the chip input end and a bonding pad 2216 at the chip output end on the COG glass 221;

step C, connecting one end interfaces of the first FPC flat cable 211 and the second FPC flat cable 212 with the lead bonding pads correspondingly respectively;

the other end interface of the second FPC cable 212 is used for connecting an external control module; the other end interface of the first FPC cable 211 is used to connect a display panel and send a display signal to the display panel.

In this embodiment, in step a: manufacturing a micron-sized ITO chip bonding pad, an ITO lead bonding pad and an ITO conductive lead on COG glass 221;

In this embodiment, in step a: the thickness of the ITO layer for manufacturing the micron-sized ITO chip bonding pad, the ITO lead bonding pad and the ITO conductive lead on the COG glass 221 is 10-1000 nm.

As shown in fig. 6.

In this embodiment, step a includes:

step A1: coating a primary photoresist 05 on an ITO glass 08, fig. 6c2, the ITO glass 08 comprising an ITO layer 081 and a glass layer 082, fig. 6c 1;

step A2: exposing and developing for the first time, and removing the photosensitive adhesive layer outside the chip bonding pad, the lead bonding pad and the upper part of the conductive lead, and the photosensitive adhesive layer is shown in figure 6c 3;

step A3: etching the ITO layer outside the upper portions of the chip pads, lead pads and conductive leads, FIG. 6c 4; demolding, and removing the chip bonding pad, the lead bonding pad and the photosensitive adhesive layer on the upper part of the conductive lead;

step A4: coating secondary photosensitive resist 06, exposing, developing, and removing the secondary photosensitive resist 06 on the chip bonding pad, the lead bonding pad and the conductive lead, as shown in fig. 6c 5;

step A5: adding conductive layer 083 over the ITO layer of the chip pad, lead pad and conductive leads, fig. 6c 5; the secondary photoresist is removed, FIG. 6c 6.

As shown in fig. 7, steps a 1-a 5 are replaced by steps a 6-a 10, and conductive layer 083 may have a copper thickness of 2 μm:

step A6: coating a primary photoresist 05 on an ITO glass 08, fig. 7d1, the ITO glass 08 comprising an ITO layer 081 and a glass layer 082;

step A7: exposing and developing for the first time, and removing the primary photosensitive resist 05 on the chip bonding pad, the lead bonding pad and the conductive lead, as shown in fig. 7d 2;

step A8: adding a conductive layer 083 on the upper parts of the ITO layers of the chip bonding pad, the lead bonding pad and the conductive lead, wherein the thickness of the conductive layer 083 is more than 5 times of that of the ITO layers, and 7d 3;

step A9: the primary photoresist layer 05 is completely removed, fig. 7d 4;

step A10: the exposed ITO layer is removed by a microetching technique, fig. 7d 5.

the ITO layer on the COG glass 221 is made of copper, chromium, nickel, gold, silver, Mo, Al/Mo or semiconductor conducting materials; or, the ITO layer on the COG glass 221 is replaced by an ITO layer as a substrate, and a copper layer, a chromium layer, a nickel layer, a gold layer, a silver layer, a Mo layer, an Al/Mo layer, or a semiconductor conductive material layer is added.

In this embodiment, in step C, the first FPC cable 211 and the second FPC cable 212 are located on the same roll of flexible circuit board, and step C is completed in a roll-to-roll processing manner.

In this embodiment, the number of each of the chip input terminal pads 2215, the chip output terminal pads 2216, the lead input terminal pads 2213, and the lead output terminal pads 2214 is more than 2;

the typical distance between adjacent chip input terminal pads 2215 is 3-50 μm;

the typical distance between adjacent chip output end bonding pads 2216 is 3-50 μm;

the typical distance between adjacent lead input terminal pads 2213 is 15-1000 μm;

typical distances between adjacent lead output terminal pads 2214 are 15-500 μm.

The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, several modifications can be made without departing from the principle of the present invention, and these modifications should also be regarded as the protection scope of the present invention.

Claims

1. A COF driver module is characterized by comprising an FPC sub-module (21) and a COG driver sub-module (22), wherein the FPC sub-module (21) comprises a first FPC flat cable (211) and a second FPC flat cable (212);

the COG drive submodule (22) comprises COG glass (221) arranged on the FPC submodule (21) and a drive chip (222) arranged on the COG glass (221), and the COG glass (221) is provided with micron-sized bonding pads and conductive leads;

the COG glass (221) is connected with the first FPC flat cable (211) and the second FPC flat cable (212) respectively;

the input end of the driving chip (222) is connected to an external control module through the COG glass (221) and a second FPC flat cable (212);

the output end of the driving chip (222) is connected to an external liquid crystal display panel, an OLED display panel or an electronic ink display panel through the COG glass (221) and the first FPC flat cable (211).

2. The COF driving module according to claim 1, wherein the COG glass (221) is provided with a chip input terminal pad (2215), a chip output terminal pad (2216), a lead input terminal pad (2213) and a lead output terminal pad (2214);

the lead input terminal bonding pad (2213) and the lead output terminal bonding pad (2214) are positioned on the periphery side of the upper surface of the COG glass (221); the chip input terminal bonding pad (2215) and the chip output terminal bonding pad (2216) are positioned at the non-edge position of the upper surface of the COG glass (221);

the lead wires of the FPC submodule (21) and the COG drive submodule (22) in butt joint are in a mode of two-side outgoing wires, three-side outgoing wires or four-side outgoing wires;

the input terminal pad of the driving chip (222) is connected to the chip input terminal pad (2215) through a bonding process, and the output terminal pad of the driving chip (222) is connected to the chip output terminal pad (2216) through a bonding process;

the lead input pad (2213) is connected to the die input pad (2215) by fan-in leads located on the COG glass (221), the die output pad (2216) is connected to the lead output pad (2214) by fan-out leads located on the COG glass (221);

the lead input end bonding pad (2213) is welded with an output end lead of the second FPC flat cable (212); the lead output end bonding pad (2214) is welded with an input end lead of the first FPC flat cable (211).

3. The COF driving module according to claim 2, wherein the number of each of the chip input terminal pads (2215), the chip output terminal pads (2216), the lead input terminal pads (2213) and the lead output terminal pads (2214) is 2 or more;

the distance between the adjacent chip input end bonding pads (2215) is 3-50 mu m;

the distance between the adjacent chip output end bonding pads (2216) is 3-50 mu m;

the distance between the adjacent lead input end bonding pads (2213) is 15-1000 mu m;

the distance between the adjacent lead output end bonding pads (2214) is 15-500 mu m.

4. The COF driver module according to claim 1, wherein the FPC sub-module (21) is connected to the COG glass (221) in a four-sided totally enclosed structure, a three-sided semi-enclosed structure, or an open structure in which multiple FPC and COG segments are mixed.

5. The COF driver module according to claim 1, wherein the first FPC cable (211) and the second FPC cable (212) are provided with direct conductive traces provided as power and/or ground lines.

6. The COF driving module according to claim 1, wherein the substrate in the width direction of the first FPC (211) and/or the second FPC (212) is provided with a half-cut, grooved or hollowed-out structure (2111); the structures can absorb the deformation caused by expansion with heat and contraction with cold, and avoid overlarge stress accumulation.

7. A COF display module comprising a display panel (1), further comprising the COF driving module of any one of claims 1 to 6, wherein an input terminal of the display panel (1) is connected to an output terminal of the first FPC cable (211).

8. The COF display module according to claim 7, wherein the display panel (1) is a liquid crystal display panel, an OLED display panel or an electronic ink display panel.