CN215263834U

CN215263834U - Manual test verification device for semiconductor

Info

Publication number: CN215263834U
Application number: CN202121006717.9U
Authority: CN
Inventors: 刘春青; 李立; 张伟聪; 陈彪; 孙林; 宋晓莉; 蔡亚桥; 饶锡林
Original assignee: Guangdong Chippacking Technology Co ltd
Current assignee: Guangdong Chippacking Technology Co ltd
Priority date: 2021-05-12
Filing date: 2021-05-12
Publication date: 2021-12-21
Anticipated expiration: 2031-05-12

Abstract

The utility model relates to a manual test verifying attachment of semiconductor, including test PCB board, the fixed tool of semiconductor, test stitch, dial switch, first test common port and second test common port. The principle of the test is that pins of a semiconductor are connected to a first test public end and a second test public end through test pins, a circuit on a test PCB and a dial switch, one side of each test pin is connected with the semiconductor pins one by one, and the other side of each test pin is connected with two dial circuits, the connection of the semiconductor pins and the first test public end or the second test public end is finally realized by controlling the on-off of the two dial circuits, and the relation of any two pins can be detected by connecting the first test public end or the second test public end through test equipment. The test is quick and accurate, the efficiency is high, the pin of the product is not easy to damage, and the technical problems that a technician misjudges and spends long time when measuring more pins of the product and the pin of the product is easy to damage are well solved.

Description

Manual test verification device for semiconductor

Technical Field

The utility model relates to a semiconductor test technical field especially relates to a manual test verification device of semiconductor.

Background

The method comprises the steps that a multimeter is used for testing the relation between each pin in the test quantity in a first-line confirmation processing method, due to the fact that a multi-pin product (such as LQFP48) is small in pitch and thin in pin, the pin position of the measured pin is difficult to distinguish clearly in the measuring process, misjudgment is easy, careless wing processing is needed, time and labor are wasted in measuring, and in addition, a stylus of the multimeter easily bends and deforms the thin product pin, so that the product is scrapped and needs to be improved.

SUMMERY OF THE UTILITY MODEL

An object of the utility model is to provide a manual test verification device of semiconductor of efficiency of software testing height, difficult erroneous judgement, difficult damage product pin.

The utility model discloses a realize like this: the utility model provides a manual test verifying attachment of semiconductor, includes test PCB board, the fixed tool of semiconductor, test stitch, dial switch, first test common port and second test common port, test stitch and dial switch welding are on test PCB board, the fixed tool of semiconductor sets up on test PCB board for location and fixed semiconductor, make the pin and the test stitch contact one by one of semiconductor, every test stitch is connected respectively with the one end pin of two dial circuits of dial switch through the circuit on the test PCB board again, and the other end pin of these two dial circuits is connected to first test common port and second test common port respectively through the circuit on the test PCB board, first test common port and second test common port are used for being connected with test equipment in order to test.

The semiconductor fixing jig is a semiconductor socket, pins of the semiconductor socket are welded on the test PCB to form test pins, and the semiconductor is inserted into the semiconductor socket.

The testing equipment is a universal meter, and a red meter pen and a black meter pen of the universal meter are respectively contacted with the first testing public end and the second testing public end.

The number of pins of the semiconductor is 48, and the number of dial circuits of the dial switch is 96.

Wherein, the dial switch is the four-bit dial switch, and the quantity is 24.

The utility model has the advantages that: the semiconductor manual test verification device comprises a test PCB, a semiconductor fixing jig, test pins, a dial switch, a first test public end and a second test public end, wherein the test principle is that the pins of a semiconductor are connected to the first test public end and the second test public end through the test pins, circuits on the test PCB and the dial switch.

Under the initial condition, all dial-up circuits are in an off state, an operator only needs to put a semiconductor into the semiconductor fixing jig and then dials the corresponding dial-up circuit to conduct, the operator can know the relation between the two pins through the test equipment, the test is quick and accurate, the efficiency is very high, the semiconductor fixing jig is not easy to damage the pins of the product, and the technical problem that the product is scrapped due to misjudgment and long time consumption when the pins of the product are measured by a technician and the fact that the pins of the product are easily damaged is well solved.

Drawings

Fig. 1 is a schematic structural diagram of a semiconductor manual test verification apparatus according to the present invention;

fig. 2 is a schematic circuit diagram of the semiconductor manual test verification device according to the present invention;

fig. 3 is a schematic circuit diagram of the present invention for testing the relationship between semiconductor pin 1 and pin 48 (pin 1 is connected to a first test common);

fig. 4 is a schematic circuit diagram of the present invention for testing the relationship between semiconductor pin 1 and pin 48 (pin 1 is connected to a second test common).

1. Testing the PCB; 2. a semiconductor fixing jig; 3. testing pins; 4. a dial switch; 5. a first test common; 6. a second test common; 7. a semiconductor.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

As an embodiment of the semiconductor manual test and verification device of the present invention, as shown in FIGS. 1 to 4, the device comprises a test PCB 1, a semiconductor fixing jig 2, a test pin 3, a dial switch 4, a first test common 5 and a second test common 6, the test pins 3 and the dial switch 4 are welded on the test PCB board 1, the semiconductor fixing jig 2 is arranged on the test PCB board 1, is used for positioning and fixing the semiconductor 7, leads of the semiconductor 7 are contacted with the test pins 3 one by one, each test pin 3 is respectively connected with one end lead of two dial-up circuits of the dial-up switch 4 through a circuit on the test PCB board 1, the other end pins of the two dial-up circuits are respectively connected to a first test common terminal 5 and a second test common terminal 6 through the circuits on the test PCB board 1, the first and second test common 5, 6 are used for connection with test equipment for testing.

The semiconductor manual test verification device comprises a test PCB (printed circuit board) 1, a semiconductor fixing jig 2, test pins 3, a dial switch 4, a first test public end 5 and a second test public end 6, wherein the test principle is that pins of a semiconductor 7 pass through the test pins 3, circuits on the test PCB 1 and the dial switch 4 to be connected to the first test public end 5 and the second test public end 6, one side of each test pin 3 is connected with the pins of the semiconductor 7 one by one, the other side of each test pin is connected with the two dial circuits, the connection of the semiconductor pins and the first test public end or the second test public end is finally realized by controlling the on-off of the two dial circuits, and the relation of any two pins can be detected by connecting the first test public end or the second test public end through test equipment.

In the present embodiment, the semiconductor fixing jig 2 is a burn-in socket of the prior art LQFP48 product, and can be directly used.

In this embodiment, the test equipment is a multimeter, and a red meter pen and a black meter pen of the multimeter are respectively in contact with the first test common terminal and the second test common terminal.

In the present embodiment, a semiconductor is exemplified by LQFP48, pins of the semiconductor are 48, and the number of dial circuits of the dial switch is 96; the dial switches are four-bit dial switches, and the number of the dial switches is 24. Of course, other numbers of dial switches may be used as long as the total number of dial circuits is appropriate.

The relationship between test pin 1 and pin 48 is exemplified below: as shown in fig. 3, first, a semiconductor is placed on a semiconductor fixing jig, so that pins of the semiconductor are in one-to-one contact with test pins, a red meter pen of a multimeter is in contact with a first test public end, and a black meter pen is in contact with a second test public end; then, the dial circuit K1 connected to the pin 1 is turned on, the dial circuit K95 connected to the pin 48 is turned on, and according to the connection relationship of the components in the circuit, the black pen of the multimeter is connected to the pin 1, and the red pen of the multimeter is connected to the pin 48, so that the relationship between the pin 1 and the pin 48 can be directly tested.

If the red meter pen and the black meter pen are considered to be reversely connected, the red meter pen and the black meter pen do not need to be manually adjusted, the dial circuit K1 and the dial circuit K95 are both dialed to be in an off state, the dial circuit K2 connected with the pin 1 is connected, the dial circuit K96 connected with the pin 48 is connected, according to the connection relation of all elements in the circuits, the red meter pen of the multimeter is equivalently conducted with the pin 1, and the black meter pen of the multimeter is conducted with the pin 48 (equivalently, the red meter pen and the black meter pen are interchanged), so that the relation between the pin 1 and the pin 48 can be directly tested.

The utility model discloses in, the fixed tool of semiconductor still can be for the semiconductor socket, and the pin welding of semiconductor socket forms the test stitch on the test PCB board, and the semiconductor is pegged graft on the semiconductor socket.

The above description is only exemplary of the present invention and should not be taken as limiting the scope of the present invention, as any modifications, equivalents, improvements and the like made within the spirit and principles of the present invention are intended to be included within the scope of the present invention.

Claims

1. The utility model provides a manual test verification device of semiconductor, its characterized in that, includes test PCB board, the fixed tool of semiconductor, test stitch, dial switch, first test common port and second test common port, test stitch and dial switch welding are on test PCB board, the fixed tool of semiconductor sets up on test PCB board for location and fixed semiconductor, make the pin and the test stitch contact one by one of semiconductor, and every test stitch is connected respectively with the one end pin of two dial circuits of dial switch through the circuit on the test PCB board again, and the other end pin of these two dial circuits is connected to first test common port and second test common port respectively through the circuit on the test PCB board, first test common port and second test common port are used for being connected with test equipment in order to test.

2. The manual semiconductor test and verification device as claimed in claim 1, wherein the semiconductor fixing jig is a semiconductor socket, pins of the semiconductor socket are soldered to the test PCB to form test pins, and the semiconductor is plugged into the semiconductor socket.

3. The semiconductor manual test validation apparatus of claim 1, wherein the test device is a multimeter, and a red stylus and a black stylus of the multimeter are in contact with the first test common and the second test common, respectively.

4. The semiconductor manual test verification device of claim 1, wherein the number of pins of the semiconductor is 48, and the number of dial circuits of the dial switch is 96.

5. The semiconductor manual test verification device of claim 4, wherein the dial switches are four-bit dial switches, and the number of the dial switches is 24.