CN215185827U - Monitoring system with positive and negative voltage logic control and double communication functions - Google Patents
Monitoring system with positive and negative voltage logic control and double communication functions Download PDFInfo
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- CN215185827U CN215185827U CN202120661403.6U CN202120661403U CN215185827U CN 215185827 U CN215185827 U CN 215185827U CN 202120661403 U CN202120661403 U CN 202120661403U CN 215185827 U CN215185827 U CN 215185827U
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Abstract
The utility model provides a monitoring system with positive and negative voltage logic control and double communication functions, which comprises a singlechip; the first positive voltage protection circuit is connected with the single chip microcomputer; the second positive voltage protection circuit is connected with the singlechip; the negative voltage protection circuit is connected with the singlechip; the first communication interface is connected with the single chip microcomputer; the second communication interface is connected with the singlechip; and the power supply module is connected with the singlechip, the first positive voltage protection circuit, the second positive voltage protection circuit and the negative voltage protection circuit. The monitoring system can detect the input positive and negative voltages and perform over-voltage and under-voltage protection, and meanwhile, the detection data of each circuit can be sent to external equipment through the set communication interface, so that the circuits are monitored in real time, and the rear-stage components are prevented from being damaged.
Description
Technical Field
The utility model relates to a power supply technical field particularly, relates to a monitored control system with positive and negative voltage logic control and dual-communication function.
Background
The power module is an important component of an electronic product. The existing power supply chip and power supply circuit for providing positive and negative power supplies output a positive power supply and a negative power supply in a mode of a DC/DC converter, generally carry out current detection and protection only through a single circuit, and cannot better monitor and report positive and negative input voltages in real time while carrying out under-voltage protection on the circuit.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide a monitoring system with positive negative voltage logic control and dual communication function for carry out the technological effect that real-time supervision and report to positive negative input voltage when carrying out under-voltage protection.
The embodiment of the utility model provides a monitoring system with positive and negative voltage logic control and dual communication functions, which comprises a singlechip; the first positive voltage protection circuit is connected with the single chip microcomputer; the second positive voltage protection circuit is connected with the singlechip; the negative voltage protection circuit is connected with the singlechip; the first communication interface is connected with the single chip microcomputer; the second communication interface is connected with the singlechip; the power module is connected with the single chip microcomputer, the first positive voltage protection circuit, the second positive voltage protection circuit and the negative voltage protection circuit;
the first positive voltage protection circuit and the second positive voltage protection circuit each include: a positive voltage input port; a first switch control circuit connected to the positive voltage input port; the first current sampling circuit is connected with the first switch control circuit; the first over-voltage and under-voltage protection circuit is connected with the first current sampling circuit; the first power output port and the first voltage sampling and filtering circuit are connected with the first over-voltage and under-voltage protection circuit;
the negative voltage protection circuit comprises a negative voltage input port; the second switch control circuit is connected with the negative voltage input port; the second current sampling circuit is connected with the second switch control circuit; a second power output port connected to the second current sampling circuit; the second voltage sampling and filtering circuit is connected with the second current sampling circuit; and the second overvoltage and undervoltage protection circuit is connected with the second current sampling circuit.
Further, the first switch control circuit comprises a first PMOS transistor, a first triode, a first voltage regulator diode and a second voltage regulator diode; the cathode of the first voltage stabilizing diode and the cathode of the second voltage stabilizing diode are both grounded; the anode of the first voltage stabilizing diode, the anode of the second voltage stabilizing diode and the source electrode of the first PMOS tube are connected with the positive voltage input port; the collector electrode of the first triode and the grid electrode of the first PMOS tube are both connected with the positive voltage input port; the drain electrode of the first PMOS tube is connected with the input end of the first current sampling circuit; the base electrode of the first triode is connected with the singlechip; and the emitter of the first triode is grounded.
Further, the first current sampling circuit comprises a first sampling resistor, a second sampling resistor and a first current detection amplifier; the first end of the first sampling resistor, the first end of the second sampling resistor and the non-inverting input end of the first current detection amplifier are connected with the drain electrode of the first PMOS tube; the second end of the first sampling resistor, the second end of the second sampling resistor and the input end of the over-voltage and under-voltage protection circuit are connected with the inverting input end of the first current detection amplifier; the output end of the first current detection amplifier is connected with the single chip microcomputer.
Further, the first overvoltage and undervoltage protection circuit comprises a second triode, a first resistor, a second resistor, a third resistor, a fourth resistor, an overvoltage and undervoltage protection controller, a first NMOS transistor, a third sampling resistor and a fourth sampling resistor; the first end of the first resistor, the VIN pin of the over-voltage and under-voltage protection controller and the drain electrode of the NMOS tube are all connected with the inverting input end of the current detection amplifier; the first end of the second resistor, the collector of the second triode and the SHDN pin of the over-voltage and under-voltage protection controller are all connected with the second end of the first resistor; the emitter of the second triode is grounded; the base electrode of the second triode is connected with the singlechip; the first end of the third resistor and the UV pin of the overvoltage and undervoltage protection controller are both connected with the second end of the second resistor; the first end of the fourth resistor and the OV pin of the overvoltage and undervoltage protection controller are both connected with the second end of the third resistor; a second end of the fourth resistor is grounded; the grid electrode of the first NMOS tube is connected with a GATE pin of the over-voltage and under-voltage protection controller; the first end of the third sampling resistor and the first end of the fourth sampling resistor are connected with a SENSE pin of the overvoltage and undervoltage protection controller; the second end of the third sampling resistor and the second end of the fourth sampling resistor are connected with a VOUT pin of the over-voltage and under-voltage protection controller; and a FAULT pin of the over-voltage and under-voltage protection controller is connected with the singlechip.
Further, the first voltage sampling and filtering circuit comprises a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth resistor, a sixth resistor and a third zener diode; the first end of the first capacitor, the first end of the second capacitor, the first end of the third capacitor, the first end of the fifth resistor and the cathode of the third voltage stabilizing diode are all connected with a VOUT pin of the overvoltage and undervoltage protection controller; the second end of the first capacitor, the second end of the second capacitor and the second end of the third capacitor are all grounded; the first end of the sixth resistor, the first end of the fourth capacitor and the second end of the fifth resistor are connected with a single chip microcomputer; and the second end of the sixth resistor, the second end of the fourth capacitor and the anode of the third voltage stabilizing diode are all grounded.
Further, the second switch control circuit comprises a second PMOS transistor, a third triode, a fourth zener diode, a fifth zener diode and a phase inverter; the anode of the fourth voltage stabilizing diode and the anode of the fifth voltage stabilizing diode are both grounded; the negative electrode of the fourth voltage stabilizing diode, the negative electrode of the fifth voltage stabilizing diode and the source electrode of the second PMOS tube are connected with the negative voltage input port; the grid electrode of the second PMOS tube and the collector electrode of the third triode are both connected with the negative voltage input port; the drain electrode of the second PMOS tube is connected with the input end of the second current sampling circuit; an emitter of the third triode is connected with the output end of the phase inverter; the input end of the phase inverter is connected with the +5V output of the power module; the base electrode of the third triode is connected with the collector electrode of the fourth triode; the base electrode of the fourth triode is grounded; and an emitting electrode of the fourth triode is connected with the singlechip.
Further, the second current sampling circuit comprises a fifth sampling resistor, a sixth sampling resistor and a second current detection amplifier; the first end of the fifth sampling resistor, the first end of the sixth sampling resistor and the non-inverting input end of the second current detection amplifier are connected with the drain electrode of the second PMOS tube; the second end of the fifth sampling resistor, the second end of the sixth sampling resistor and the input end of the second voltage sampling and filtering circuit are connected with the inverting input end of the second current detection amplifier; and the output end of the second current detection amplifier is connected with the singlechip.
Further, the second voltage sampling and filtering circuit comprises a fifth capacitor, a sixth capacitor, a seventh capacitor, a sixth zener diode and a positive-negative voltage conversion circuit; the first end of the fifth capacitor, the first end of the sixth capacitor, the first end of the seventh capacitor and the anode of the sixth zener diode are all connected with the inverting input end of the second current sense amplifier; a second end of the fifth capacitor, a second end of the sixth capacitor, a second end of the seventh capacitor and a cathode of the sixth zener diode are all grounded; the input end of the positive and negative voltage conversion circuit is connected with the second current output port; the output end of the positive and negative voltage conversion circuit is connected with the single chip microcomputer.
Further, the second overvoltage and undervoltage protection circuit comprises a reference voltage chip and a comparator; the input end of the reference voltage chip is connected with the power supply module; the output end of the reference voltage chip is connected with the inverting input end of the comparator; the output end of the second current detection amplifier is connected with the non-inverting input end of the comparator; the output end of the comparator is connected with the single chip microcomputer.
Further, the power supply module comprises a first filter circuit, a first voltage stabilizer, a second filter circuit, a second voltage stabilizer, a first output port and a second output port; the input end of the first filter circuit is connected with an external power supply; the input end of the first voltage stabilizer is connected with the output end of the first filter circuit; the first end of the second filter circuit and the first output port are both connected with the output end of the first voltage stabilizer; the input end of the second voltage stabilizer is connected with the output end of the second filter circuit; the second output port is connected with the output end of the second voltage stabilizer.
The utility model discloses the beneficial effect that can realize is: the utility model provides a monitored control system can detect and cross undervoltage protection to the positive and negative voltage of input, can send the detection data of each circuit for external equipment through the communication interface who sets up simultaneously to carry out real time monitoring to the circuit, guarantee that back level components and parts are not damaged.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments of the present invention will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present invention, and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained according to these drawings without inventive efforts.
Fig. 1 is a schematic view of a topology structure of a monitoring system having positive and negative voltage logic control and dual communication functions according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a first switch control circuit according to an embodiment of the present invention;
fig. 3 is a schematic diagram of a first current sampling circuit according to an embodiment of the present invention;
fig. 4 is a schematic diagram of a first overvoltage/undervoltage protection circuit according to an embodiment of the present invention;
fig. 5 is a schematic diagram of a first voltage sampling and filtering circuit according to an embodiment of the present invention;
fig. 6 is a schematic diagram of a second switch control circuit according to an embodiment of the present invention;
fig. 7 is a schematic diagram of a second current sampling circuit according to an embodiment of the present invention;
fig. 8 is a schematic diagram of a second voltage sampling and filtering circuit according to an embodiment of the present invention;
fig. 9 is a schematic diagram of a second overvoltage and undervoltage protection circuit according to an embodiment of the present invention;
fig. 10 is a schematic diagram of a power module according to an embodiment of the present invention;
fig. 11 is a schematic diagram of an effective detection circuit for a-5V power supply according to an embodiment of the present invention;
fig. 12 is a schematic diagram of a circuit for detecting the power supply effectiveness of a power supply 12V according to an embodiment of the present invention.
Icon: 10-a monitoring system; 100-a single chip microcomputer; 200-a first positive voltage protection circuit; 300-a second positive voltage protection circuit; 400-negative voltage protection circuit; 500-a power module; 510-a first filter circuit; 520-a second filter circuit; 600-a first communication interface; 700-second communication interface.
Detailed Description
The technical solution in the embodiment of the present invention will be described below with reference to the accompanying drawings in the embodiment of the present invention.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures. Meanwhile, in the description of the present invention, the terms "first", "second", and the like are used only for distinguishing the description, and are not to be construed as indicating or implying relative importance.
Referring to fig. 1, fig. 1 is a schematic diagram of a topology structure of a monitoring system having positive and negative voltage logic control and dual communication functions according to an embodiment of the present invention.
In one embodiment, the present invention provides a monitoring system 10 with positive and negative voltage logic control and dual communication functions, which includes a single chip 100; a first positive voltage protection circuit 200 connected to the single chip microcomputer 100; a second positive voltage protection circuit 300 connected to the single chip microcomputer 100; a negative voltage protection circuit 400 connected to the single chip microcomputer 100; a first communication interface 600 connected to the single chip microcomputer 100; a second communication interface 700 connected to the single chip microcomputer 100; and a power module 500 connected to the single chip microcomputer 100, the first positive voltage protection circuit 200, the second positive voltage protection circuit 300, and the negative voltage protection circuit 400;
the first positive voltage protection circuit 200 and the second positive voltage protection circuit 300 each include: a positive voltage input port; a first switch control circuit connected to the positive voltage input port; the first current sampling circuit is connected with the first switch control circuit; the first over-voltage and under-voltage protection circuit is connected with the first current sampling circuit; the first power output port and the first voltage sampling and filtering circuit are connected with the first over-voltage and under-voltage protection circuit;
the negative voltage protection circuit 400 includes a negative voltage input port; a second switch control circuit connected to the negative voltage input port; the second current sampling circuit is connected with the second switch control circuit; the second power output port is connected with the second current sampling circuit; the second voltage sampling and filtering circuit is connected with the second current sampling circuit; and the second overvoltage and undervoltage protection circuit is connected with the second current sampling circuit.
Specifically, the positive voltage input port can input various types of positive voltages, wherein the positive voltage input port of the first positive voltage protection circuit 200 inputs a voltage of +24V, the positive voltage input port of the second positive voltage protection circuit 300 inputs a voltage of +5V, the voltages of +24V and +5V can be subjected to current detection by the first positive voltage protection circuit 200 and the second positive voltage protection circuit 300, and meanwhile, the circuits can be subjected to overcurrent protection and overvoltage protection by the arranged overvoltage and undervoltage protection circuit. Thereby ensuring that the follow-up components are not damaged. The first communication interface 600 may be an RS232 communication interface; the second communication interface 700 may adopt an RS485 communication interface; the two types of communication interfaces can be arranged to communicate with external equipment in different modes so as to meet the use requirements of users.
Referring to fig. 2, fig. 3, fig. 4 and fig. 5, fig. 2 is a schematic diagram of a first switch control circuit according to an embodiment of the present invention; fig. 3 is a schematic diagram of a first current sampling circuit according to an embodiment of the present invention; fig. 4 is a schematic diagram of a first overvoltage/undervoltage protection circuit according to an embodiment of the present invention; fig. 5 is a schematic diagram of a first voltage sampling and filtering circuit according to an embodiment of the present invention.
As shown in fig. 2, in one embodiment, the first switch control circuit includes a first PMOS transistor Q2, a first transistor Q3, a first zener diode D1, and a second zener diode D2; the cathode of the first voltage-stabilizing diode D1 and the cathode of the second voltage-stabilizing diode D2 are both grounded; the anode of the first zener diode D1, the anode of the second zener diode D2 and the source of the first PMOS transistor Q2 are all connected to the positive voltage input port (+ VCC _ IN); the collector electrode of the first triode Q3 and the grid electrode of the first PMOS pipe Q2 are both connected with the positive voltage input port; the drain electrode of the first PMOS pipe Q2 is connected with the input end of the first current sampling circuit; the base electrode of the first triode Q3 is connected with the singlechip 100; the emitter of the first transistor Q3 is grounded.
In the implementation process, the single chip microcomputer 100 can control the base input voltage of the first triode Q3, so as to control the on-off state of the first PMOS transistor Q2, and at the same time, the input voltage can be regulated through the first voltage-regulating diode D1 and the second voltage-regulating diode D2.
As shown in fig. 3, in one embodiment, the first current sampling circuit includes a first sampling resistor R2, a second sampling resistor R3, and a first current sense amplifier U2; the first end of the first sampling resistor R2, the first end of the second sampling resistor R3 and the non-inverting input end of the first current detection amplifier U2 are all connected with the drain electrode of the first PMOS tube Q2; the second end of the first sampling resistor R2, the second end of the second sampling resistor R3 and the input end of the overvoltage and undervoltage protection circuit are connected with the inverting input end of the first current detection amplifier U2; the output end of the first current detection amplifier U2 is connected with the singlechip 100.
In the implementation process, the first sampling resistor R2 and the second sampling resistor R3 are connected in parallel, so that damage caused by overload of the resistors can be avoided, and detection noise caused by overhigh temperature rise of the resistors due to overlarge current of the resistors can be avoided. The first sampling resistor R2 and the second sampling resistor R3 use the same resistor, and in addition, considering that the positive voltages input by the first positive voltage protection circuit 200 and the second positive voltage protection circuit 300 are not the same, the resistances of the first sampling resistor R2 and the second sampling resistor R3 can be adjusted according to the actual use requirement.
As shown in fig. 4, in an embodiment, the first overvoltage and undervoltage protection circuit includes a second transistor Q4, a first resistor R10, a second resistor R12, a third resistor R19, a fourth resistor R20, an overvoltage and undervoltage protection controller U3, a first NMOS transistor Q1, a third sampling resistor R1, and a fourth sampling resistor R4; the first end of the first resistor R10, the VIN pin of the over-voltage and under-voltage protection controller U3 and the drain of the NMOS tube are all connected with the inverting input end of the current detection amplifier U2; the first end of the second resistor R12, the collector of the second triode Q4 and the SHDN pin of the under-voltage protection controller U3 are all connected with the second end of the first resistor R10; the emitter of the second triode Q4 is grounded; the base electrode of the second triode Q4 is connected with the singlechip 100; the first end of the third resistor R19 and the UV pin of the overvoltage and undervoltage protection controller U3 are both connected with the second end of the second resistor R12; the first end of the fourth resistor R20 and the OV pin of the undervoltage protection controller U3 are both connected with the second end of the third resistor R19; a second end of the fourth resistor R20 is grounded; the grid of the first NMOS tube Q1 is connected with a GATE pin of an over-voltage and under-voltage protection controller U3; the first end of the third sampling resistor R1 and the first end of the fourth sampling resistor R4 are connected with a SENSE pin of the undervoltage protection controller U3; the second end of the third sampling resistor R1 and the second end of the fourth sampling resistor R4 are connected with the VOUT pin of the undervoltage protection controller U3; the FAULT pin of the over-voltage and under-voltage protection controller U3 is connected to the single chip microcomputer 100.
In the implementation process, the single chip microcomputer 100 can control the voltage input to the base of the second triode Q4, so that the circuit is subjected to overvoltage and undervoltage protection through the undervoltage protection controller U3 and the first NMOS transistor Q1.
As shown in fig. 5, in one embodiment, the first voltage sampling and filtering circuit includes a first capacitor C3, a second capacitor C1, a third capacitor C5, a fourth capacitor C12, a fifth resistor R5, a sixth resistor R11, and a third zener diode D3; the first end of the first capacitor C3, the first end of the second capacitor C1, the first end of the third capacitor C5, the first end of the fifth resistor R5 and the cathode of the third zener diode D3 are all connected to a VOUT pin of the undervoltage protection controller U3; the second end of the first capacitor C3, the second end of the second capacitor C1 and the second end of the third capacitor C5 are all grounded; the first end of the sixth resistor R11, the first end of the fourth capacitor C12 and the second end of the fifth resistor R5 are all connected with the singlechip 100; the second end of the sixth resistor R11, the second end of the fourth capacitor C12, and the anode of the third zener diode D3 are all grounded.
Through the first voltage sampling and filter circuit who sets up, can acquire the output voltage of circuit through singlechip 100, filter and steady voltage to output voltage simultaneously, make output voltage more steady.
Referring to fig. 6, fig. 7, fig. 8 and fig. 9, fig. 6 is a schematic diagram of a second switch control circuit according to an embodiment of the present invention; fig. 7 is a schematic diagram of a second current sampling circuit according to an embodiment of the present invention; fig. 8 is a schematic diagram of a second voltage sampling and filtering circuit according to an embodiment of the present invention; fig. 9 is a schematic diagram of a second overvoltage/undervoltage protection circuit according to an embodiment of the present invention.
As shown in fig. 6, in one embodiment, the second switch control circuit includes a second PMOS transistor Q10, a third transistor Q12, a fourth transistor Q11, a fourth zener diode D9, a fifth zener diode D16, and an inverter U10; the anode of the fourth zener diode D9 and the anode of the fifth zener diode D16 are both grounded; the cathode of the fourth voltage stabilizing diode D9, the cathode of the fifth voltage stabilizing diode D16 and the source electrode of the second PMOS transistor Q10 are all connected with the negative voltage input port (-VCC _ IN); the grid electrode of the second PMOS pipe Q10 and the collector electrode of the third triode Q12 are both connected with a negative voltage input port (-VCC _ IN); the drain electrode of the second PMOS pipe Q10 is connected with the input end of the second current sampling circuit; an emitter of the third triode Q12 is connected with the output end of the inverter U10; the input end of the inverter U10 is connected with the +5V output of the power supply module 500; the base electrode of the third triode Q12 is connected with the collector electrode of the fourth triode Q11; the base of the fourth triode Q11 is grounded; the emitter of the fourth triode Q11 is connected to the single chip 100.
In the implementation process, the single chip microcomputer 100 may control the voltage input by the emitter of the fourth transistor D11, so as to control the on/off state of the second PMOS transistor Q10, and at the same time, the input voltage may be regulated by the fourth zener diode D9 and the fifth zener diode D16.
As shown in fig. 7, in one embodiment, the second current sampling circuit includes a fifth sampling resistor R47, a sixth sampling resistor R50, and a second current sense amplifier U8; the first end of the fifth sampling resistor R47, the first end of the sixth sampling resistor R50 and the non-inverting input end of the second current detection amplifier U8 are all connected with the drain electrode of the second PMOS tube Q10; the second end of the fifth sampling resistor R47, the second end of the sixth sampling resistor R50 and the input end of the second voltage sampling and filtering circuit are connected with the inverting input end of the second current detection amplifier U8; the output end of the second current detection amplifier U8 is connected with the singlechip 100.
As shown in fig. 8, in one embodiment, the second voltage sampling and filtering circuit includes a fifth capacitor C34, a sixth capacitor C33, a seventh capacitor C36, a sixth zener diode D10, and a positive-negative voltage converting circuit; the first end of the fifth capacitor C34, the first end of the sixth capacitor C33, the first end of the seventh capacitor C36 and the anode of the sixth zener diode D10 are all connected to the inverting input terminal of the second current sense amplifier U8; the second end of the fifth capacitor C34, the second end of the sixth capacitor C33, the second end of the seventh capacitor C36 and the cathode of the sixth zener diode D10 are all grounded; the input end of the positive and negative voltage conversion circuit is connected with a second current output port (-VCC _ OUT); the output end of the positive and negative voltage conversion circuit is connected with the singlechip 100.
Through the second voltage sampling and filtering circuit, the voltage output by the negative voltage protection circuit 400 can be filtered and stabilized, so that the output negative voltage is smoother.
As shown in fig. 9, in one embodiment, the second undervoltage protection circuit includes a reference voltage chip U13 and a comparator U20; the input end of the reference voltage chip U13 is connected with the power supply module 500; the output end of the reference voltage chip U13 is connected with the inverting input end of the comparator U20; the output end of the second current detection amplifier U8 is connected with the non-inverting input end of the comparator U20; the output end of the comparator U20 is connected with the singlechip 100.
The reference voltage chip U13 that sets up can provide the reference voltage of 3.3V, then send singlechip 100 after comparing this reference voltage and the electric current that second current sampling circuit detected, singlechip 100 just can control the second switch control circuit according to the comparative result to protect the circuit.
Referring to fig. 10, 11 and 12, fig. 10 is a schematic diagram of a power module according to an embodiment of the present invention; fig. 11 is a schematic diagram of an effective detection circuit for a-5V power supply according to an embodiment of the present invention; fig. 12 is a schematic diagram of a-12V power supply effective detection circuit according to an embodiment of the present invention.
In one embodiment, in order to meet the power supply requirements of each single chip microcomputer 100 and the components used in each circuit, the power supply module 500 includes a first filter circuit 510, a first voltage regulator U11, a second filter circuit 520, a second voltage regulator U12, a first output port (+5V) and a second output port (+ 3.3V); the input end of the first filter circuit 510 is connected with an external power supply; the input end of the first voltage stabilizer U11 is connected with the output end of the first filter circuit 510; the first end and the first output port of the second filter circuit 520 are both connected with the output end of the first voltage stabilizer U11; the input end of the second voltage stabilizer U12 is connected with the output end of the second filter circuit 520; the second output port is connected to the output of a second voltage regulator U12.
Specifically, the external power supply provides +12V and-12V input voltages, and the input terminal of the first filter circuit 510 is connected to the +12V input voltage. The first voltage stabilizer can be a voltage stabilizer with a target voltage of 5V, and the second voltage stabilizer can be a voltage stabilizer with a target voltage of 3.3V.
As shown in fig. 11, in order to detect whether the-5V voltage inputted by the negative voltage protection circuit 400 is valid or not, the embodiment of the present invention further provides a-5 power supply valid detection circuit, and the single chip microcomputer 100 can detect the validity of the-5 power supply by detecting the voltage (-VCC _ Volid) of the collector of the transistor Q13.
As shown in fig. 12, in order to detect whether the-12V voltage inputted from the external power supply is valid, the embodiment of the present invention further provides a-12V power supply valid detection circuit, and the single chip microcomputer 100 can detect the validity of the-5V power supply by detecting the voltage (ikey _ En) of the collector of the transistor Q14.
To sum up, the embodiment of the utility model provides a monitored control system with positive and negative voltage logic control and dual-communication function can detect and cross undervoltage protection the positive and negative voltage of input through this monitored control system, can send the detection data of each circuit for external equipment through the communication interface who sets up simultaneously to carry out real time monitoring to the circuit, guarantee that back level components and parts are not damaged.
The above description is only for the specific embodiments of the present invention, but the protection scope of the present invention is not limited thereto, and any person skilled in the art can easily think of the changes or substitutions within the technical scope of the present invention, and all should be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (10)
1. A monitoring system with positive and negative voltage logic control and double communication functions is characterized by comprising a singlechip; the first positive voltage protection circuit is connected with the single chip microcomputer; the second positive voltage protection circuit is connected with the singlechip; the negative voltage protection circuit is connected with the singlechip; the first communication interface is connected with the single chip microcomputer; the second communication interface is connected with the singlechip; the power module is connected with the single chip microcomputer, the first positive voltage protection circuit, the second positive voltage protection circuit and the negative voltage protection circuit;
the first positive voltage protection circuit and the second positive voltage protection circuit each include: a positive voltage input port; a first switch control circuit connected to the positive voltage input port; the first current sampling circuit is connected with the first switch control circuit; the first over-voltage and under-voltage protection circuit is connected with the first current sampling circuit; the first power output port and the first voltage sampling and filtering circuit are connected with the first over-voltage and under-voltage protection circuit;
the negative voltage protection circuit comprises a negative voltage input port; the second switch control circuit is connected with the negative voltage input port; the second current sampling circuit is connected with the second switch control circuit; a second power output port connected to the second current sampling circuit; the second voltage sampling and filtering circuit is connected with the second current sampling circuit; and the second overvoltage and undervoltage protection circuit is connected with the second current sampling circuit.
2. The monitoring system of claim 1, wherein the first switch control circuit comprises a first PMOS transistor, a first triode, a first zener diode, and a second zener diode; the cathode of the first voltage stabilizing diode and the cathode of the second voltage stabilizing diode are both grounded; the anode of the first voltage stabilizing diode, the anode of the second voltage stabilizing diode and the source electrode of the first PMOS tube are connected with the positive voltage input port; the collector electrode of the first triode and the grid electrode of the first PMOS tube are both connected with the positive voltage input port; the drain electrode of the first PMOS tube is connected with the input end of the first current sampling circuit; the base electrode of the first triode is connected with the singlechip; and the emitter of the first triode is grounded.
3. The monitoring system of claim 2, wherein the first current sampling circuit comprises a first sampling resistor, a second sampling resistor, and a first current sense amplifier; the first end of the first sampling resistor, the first end of the second sampling resistor and the non-inverting input end of the first current detection amplifier are connected with the drain electrode of the first PMOS tube; the second end of the first sampling resistor, the second end of the second sampling resistor and the input end of the over-voltage and under-voltage protection circuit are connected with the inverting input end of the first current detection amplifier; the output end of the first current detection amplifier is connected with the single chip microcomputer.
4. The monitoring system of claim 3, wherein the first under-voltage protection circuit comprises a second triode, a first resistor, a second resistor, a third resistor, a fourth resistor, an under-voltage protection controller, a first NMOS transistor, a third sampling resistor and a fourth sampling resistor; the first end of the first resistor, the VIN pin of the over-voltage and under-voltage protection controller and the drain electrode of the NMOS tube are all connected with the inverting input end of the current detection amplifier; the first end of the second resistor, the collector of the second triode and the SHDN pin of the over-voltage and under-voltage protection controller are all connected with the second end of the first resistor; the emitter of the second triode is grounded; the base electrode of the second triode is connected with the singlechip; the first end of the third resistor and the UV pin of the overvoltage and undervoltage protection controller are both connected with the second end of the second resistor; the first end of the fourth resistor and the OV pin of the overvoltage and undervoltage protection controller are both connected with the second end of the third resistor; a second end of the fourth resistor is grounded; the grid electrode of the first NMOS tube is connected with a GATE pin of the over-voltage and under-voltage protection controller; the first end of the third sampling resistor and the first end of the fourth sampling resistor are connected with a SENSE pin of the overvoltage and undervoltage protection controller; the second end of the third sampling resistor and the second end of the fourth sampling resistor are connected with a VOUT pin of the over-voltage and under-voltage protection controller; and a FAULT pin of the over-voltage and under-voltage protection controller is connected with the singlechip.
5. The monitoring system of claim 4, wherein the first voltage sampling and filtering circuit comprises a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth resistor, a sixth resistor, and a third zener diode; the first end of the first capacitor, the first end of the second capacitor, the first end of the third capacitor, the first end of the fifth resistor and the cathode of the third voltage stabilizing diode are all connected with a VOUT pin of the overvoltage and undervoltage protection controller; the second end of the first capacitor, the second end of the second capacitor and the second end of the third capacitor are all grounded; the first end of the sixth resistor, the first end of the fourth capacitor and the second end of the fifth resistor are connected with a single chip microcomputer; and the second end of the sixth resistor, the second end of the fourth capacitor and the anode of the third voltage stabilizing diode are all grounded.
6. The monitoring system of claim 1, wherein the second switch control circuit comprises a second PMOS transistor, a third transistor, a fourth zener diode, a fifth zener diode, and an inverter; the anode of the fourth voltage stabilizing diode and the anode of the fifth voltage stabilizing diode are both grounded; the negative electrode of the fourth voltage stabilizing diode, the negative electrode of the fifth voltage stabilizing diode and the source electrode of the second PMOS tube are connected with the negative voltage input port; the grid electrode of the second PMOS tube and the collector electrode of the third triode are both connected with the negative voltage input port; the drain electrode of the second PMOS tube is connected with the input end of the second current sampling circuit; an emitter of the third triode is connected with the output end of the phase inverter; the input end of the phase inverter is connected with the +5V output of the power module; the base electrode of the third triode is connected with the collector electrode of the fourth triode; the base electrode of the fourth triode is grounded; and an emitting electrode of the fourth triode is connected with the singlechip.
7. The monitoring system of claim 6, wherein the second current sampling circuit comprises a fifth sampling resistor, a sixth sampling resistor, and a second current sense amplifier; the first end of the fifth sampling resistor, the first end of the sixth sampling resistor and the non-inverting input end of the second current detection amplifier are connected with the drain electrode of the second PMOS tube; the second end of the fifth sampling resistor, the second end of the sixth sampling resistor and the input end of the second voltage sampling and filtering circuit are connected with the inverting input end of the second current detection amplifier; and the output end of the second current detection amplifier is connected with the singlechip.
8. The monitoring system of claim 7, wherein the second voltage sampling and filtering circuit comprises a fifth capacitor, a sixth capacitor, a seventh capacitor, a sixth zener diode, and a positive-negative voltage conversion circuit; the first end of the fifth capacitor, the first end of the sixth capacitor, the first end of the seventh capacitor and the anode of the sixth zener diode are all connected with the inverting input end of the second current sense amplifier; a second end of the fifth capacitor, a second end of the sixth capacitor, a second end of the seventh capacitor and a cathode of the sixth zener diode are all grounded; the input end of the positive and negative voltage conversion circuit is connected with the second current output port; the output end of the positive and negative voltage conversion circuit is connected with the single chip microcomputer.
9. The monitoring system of claim 1, wherein the second brown-out protection circuit comprises a reference voltage chip and a comparator; the input end of the reference voltage chip is connected with the power supply module; the output end of the reference voltage chip is connected with the inverting input end of the comparator; the output end of the second current detection amplifier is connected with the non-inverting input end of the comparator; the output end of the comparator is connected with the single chip microcomputer.
10. The monitoring system of claim 1, wherein the power module comprises a first filter circuit, a first voltage regulator, a second filter circuit, a second voltage regulator, a first output port, and a second output port; the input end of the first filter circuit is connected with an external power supply; the input end of the first voltage stabilizer is connected with the output end of the first filter circuit; the first end of the second filter circuit and the first output port are both connected with the output end of the first voltage stabilizer; the input end of the second voltage stabilizer is connected with the output end of the second filter circuit; the second output port is connected with the output end of the second voltage stabilizer.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202120661403.6U CN215185827U (en) | 2021-03-31 | 2021-03-31 | Monitoring system with positive and negative voltage logic control and double communication functions |
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| CN202120661403.6U CN215185827U (en) | 2021-03-31 | 2021-03-31 | Monitoring system with positive and negative voltage logic control and double communication functions |
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| CN215185827U true CN215185827U (en) | 2021-12-14 |
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| CN202120661403.6U Active CN215185827U (en) | 2021-03-31 | 2021-03-31 | Monitoring system with positive and negative voltage logic control and double communication functions |
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