CN215068001U - Redundant computer - Google Patents

Abstract

The utility model discloses a redundant computer, which comprises a core board and an expansion board, wherein the core board is provided with an AI core processor, a cache unit and a storage unit, and the AI core processor is used for calculating and processing an AI algorithm; the cache unit is electrically connected with the AI core processor and is used for caching data; the storage unit is electrically connected with the AI core processor and is used for storing the application program of the user and recording the application scene data of the user; the expansion board is electrically connected with the core board and is used for coprocessing function and interface expansion; connectors are arranged on the core board and the expansion board. According to the utility model discloses a redundant computer has adopted the modular design method, divides redundant computer into nuclear core plate and expansion board, realizes different functions with different circuit boards, and the expansion board can be according to different application scenes and product form, and the pertinence designs to the suitability of redundant computer in different application scenes has been promoted.

Description

Redundant computer

Technical Field

The utility model belongs to the technical field of artificial intelligence and specifically relates to a redundant computer is related to.

Background

With the rapid development of artificial intelligence, AI algorithms such as neural networks and deep learning are widely applied in the fields of automatic driving, robots, aerospace and the like. However, AI algorithms such as neural networks and deep learning require training and calculation with a large data volume, the requirement on the computing power of a processor is very high, and common processors such as CPUs cannot meet the requirement of the AI algorithms. At present, a core processor for an AI algorithm adopts either a gpu (graphics Processing unit) or an asic (application Specific Integrated circuit), but these processors have a single function and low computing power, and cannot meet the flexibility and energy efficiency required by the AI algorithm; and the board card structure size of these processors is great, and the design is not flexible enough, and the applicable scene receives great restriction.

SUMMERY OF THE UTILITY MODEL

The utility model discloses aim at solving one of the technical problem that exists among the prior art at least. Therefore, the utility model provides a redundant computer can be used for carrying out AI algorithm's calculation and processing to adopt the modular design on hardware, can expand according to the product demand, have fine scene suitability.

According to the utility model discloses redundant type computer, include: a core board; the AI core processor is arranged on the core board and used for calculating and processing an AI algorithm; the cache unit is arranged on the core board, electrically connected with the AI core processor and used for caching data; the memory unit is arranged on the core board, electrically connected with the AI core processor and used for storing the application program of the user and recording the application scene data of the user; the expansion board is electrically connected with the core board and is used for coprocessing and interface expansion; the core board and the expansion board are provided with connectors, and the core board and the expansion board are connected through the connectors.

According to the utility model discloses redundant type computer has following beneficial effect at least: a modular design method is adopted in the aspect of hardware, a redundant computer is divided into a core board and an expansion board, and different functions are realized by different circuit boards; the core board is responsible for the calculation and processing process of the most core AI algorithm, and the design difficulty of the core board is high, and the process is complex, so that the modification is not needed according to different application scenes after the design and the design are finalized; the expansion board is used for completing the coprocessing function and interface expansion, has low design difficulty, and can be designed in a targeted manner aiming at different application scenes and product forms; through the arrangement, the applicability of the redundant computer in different application scenes is improved, customized expansion can be performed according to requirements, and the method is flexible.

According to some embodiments of the utility model, the nuclear core plate still include with AI core processor electric connection's first power supply unit, first power supply unit is used for providing working power supply.

According to some embodiments of the present invention, the core plate further comprises: the clock unit is electrically connected with the AI core processor and is used for providing an input clock source; the reset unit is electrically connected with the AI core processor and is used for providing a reset signal for the AI core processor; and the frequency doubling unit is electrically connected with the AI core processor.

According to some embodiments of the invention, the cache unit is DDR 3.

According to some embodiments of the invention, the storage unit is a Nand FLASH memory.

According to some embodiments of the invention, the AI core processor is a Yulong410SE processor, the AI core processor including a heterogeneous processor and an AI accelerated processing co-processing neural network element.

According to some embodiments of the present invention, the expansion board includes several of a debugging interface, an industrial camera interface, a USB interface, a RapidIO interface, an aerospace interface, an interactive interface, a field bus interface, and an ethernet interface.

According to some embodiments of the utility model, the interface of industry Camera interface for supporting the connection Camera-Link Camera, the USB interface is the USB2.0 interface of supporting Host mode and Device mode, RapidIO interface is the RapidIO3.0 interface of supporting the backplate communication, the aerospace interface includes SpaceWire interface and 1553B interface, mutual interface includes I2C interface, I2S interface, SPI interface and GPIO interface.

According to some embodiments of the invention, the expansion board further comprises a second power supply unit for providing an operating power supply.

According to some embodiments of the invention, the connector is an HPC connector.

Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.

Drawings

The above and/or additional aspects and advantages of the present invention will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:

fig. 1 is a schematic structural diagram of a core board according to an embodiment of the present invention;

fig. 2 is a schematic structural diagram of an expansion board according to an embodiment of the present invention;

reference numerals:

the core board 100, the AI core processor 110, the cache unit 120, the memory unit 130, the clock unit 140, the first power supply unit 150, the reset unit 160, and the frequency doubling unit 170;

the system comprises an expansion board 200, a debugging interface 210, an industrial camera interface 220, a USB interface 230, a RapidIO interface 240, a SpaceWire interface 251, a 1553B interface 252, an interactive interface 260, a field bus interface 270, an Ethernet interface 280 and a second power supply unit 290.

Detailed Description

This section will describe in detail the embodiments of the present invention, preferred embodiments of the present invention are shown in the attached drawings, which are used to supplement the description of the text part of the specification with figures, so that one can intuitively and vividly understand each technical feature and the whole technical solution of the present invention, but they cannot be understood as the limitation of the protection scope of the present invention.

In the description of the present invention, a plurality of means are one or more, a plurality of means are two or more, and the terms greater than, less than, exceeding, etc. are understood as not including the number, and the terms greater than, less than, within, etc. are understood as including the number. If the first and second are described for the purpose of distinguishing technical features, they are not to be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated or implicitly indicating the precedence of the technical features indicated.

In the description of the present invention, unless there is an explicit limitation, the words such as setting, installation, connection, etc. should be understood in a broad sense, and those skilled in the art can reasonably determine the specific meanings of the above words in combination with the specific contents of the technical solution.

As shown in fig. 1 and fig. 2, the redundant computer according to the embodiment of the present invention includes a core board 100 and an expansion board 200, the core board 100 is provided with an AI core processor 110, a cache unit 120 and a storage unit 130, and the AI core processor 110 is used for calculating and processing an AI algorithm; the cache unit 120 is electrically connected to the AI core processor 110 and configured to cache data; the storage unit 130 is electrically connected to the AI core processor 110, and is configured to store an application program of a user and record application scene data of the user; the expansion board 200 is electrically connected with the core board 100 and is used for coprocessing function and interface expansion; connectors are disposed on both the core board 100 and the expansion board 200, and in the present invention, hpc (high Performance computing) high-speed high-density connectors are used, so as to connect the core board 100 and the expansion board 200; of course, other connectors may be used. The core board 100 is a minimum computer system which can independently work without depending on the expansion board 200, has the characteristics of high computing capability, low power consumption, rich peripheral high-speed interfaces and the like, and can be used for deep learning and neural network algorithm acceleration processing; the expansion board 200 has a rich high-speed interface driving circuit and a memory circuit for a co-processing function and interface expansion.

According to the utility model discloses a redundant computer, the integrated circuit board structural design of considering traditional treater that is used for the AI algorithm is comparatively complicated, has then adopted modular design method, divides redundant computer into nuclear core plate 100 and expansion board 200, realizes different functions with different circuit boards. The core board 100 is used as a minimum computer system and is responsible for most core AI calculation and accelerated processing functions, and because the core board 100 has high design difficulty and complex process, the core board does not need to be modified according to different application scenes after design and sizing; the expansion board 200 is used for completing the co-processing function and the interface expansion, has low design difficulty, and can be designed specifically for different application scenarios and product forms. By the design, the applicability of the product in different application scenes is improved, customized expansion can be performed according to requirements, and the product is flexible; the core board 100 can be used for deep learning and neural network algorithm acceleration processing, the computing capability is strong, the expansion board 200 is provided with various high-speed interfaces, and the related functions required by products can be achieved by interconnection and coordination of the computing platform and other devices.

As shown in fig. 1, the core board 100 is further provided with a first power supply unit 150, and the first power supply unit 150 is electrically connected to the AI core processor 110 and is configured to provide a working power supply for the core board 100.

As shown in fig. 1, the core board 100 further includes a clock unit 140, a reset unit 160, and a frequency multiplication unit 170, where the clock unit 140 is electrically connected to the AI core processor 110 and is configured to provide an input clock source; the reset unit 160 is electrically connected to the AI core processor 110, and is configured to provide a reset signal to the AI core processor 110, so as to reset the whole circuit; the frequency doubling unit 170 is electrically connected to the AI core processor 110. By setting the frequency multiplication unit 170, the operating speed of the AI core processor 110 can be increased, and the calculation efficiency of the AI core processor 110 is further improved.

As shown in fig. 1, in the present invention, the AI core processor 110 adopts Yulong410SE processor of the european bit corporation, and the processor includes a heterogeneous processor and an AI accelerated processing co-processing neural network unit, and has the characteristics of high computing power, low power consumption, rich peripheral high-speed interfaces, and the like, and can realize deep learning and accelerated processing of neural network algorithms, the heterogeneous processor is mainly responsible for computing, and the AI accelerated processing co-processing neural network unit is responsible for accelerated processing of algorithms.

As shown in fig. 1, in the present invention, the cache unit 120 employs DDR3 for cooperating with the AI core processor 110 to complete high-speed data caching, and of course, DDR2 and the like may also be employed; the storage unit 130 uses Nand FLASH memory to cooperate with the AI core processor to complete user application program storage and user application scene data recording, although other types of memory may be used.

As shown in fig. 2, the expansion board 200 includes several of a debug interface 210, an industrial camera interface 220, a USB interface 230, a RapidIO interface 240, an aerospace interface, an interaction interface 260, a field bus interface 270, and an ethernet interface 280. By arranging the high-speed interfaces with rich types, the interconnection and intercommunication with external equipment and other functions required by the product can be conveniently realized, and the application scene is wider.

As shown in fig. 2, in the present invention, the debugging interface 210 includes ARM _ JTAG, SPARC _ JTAG, and strac _ DSU, etc. for testing the inside of the chip and simulating and debugging the whole system; the industrial Camera interface 220 is an interface supporting connection with a Camera-Link Camera, and can be used for realizing functions of robot depth vision or image recognition and the like in cooperation with the AI core processor 110; the USB interface 230 is a USB2.0 interface supporting a Host mode and a Device mode, and may be used for function expansion, data transmission, and the like, and may also adopt a USB3.0 interface, and the like; the RapidIO interface 240 is a RapidIO3.0 interface supporting backplane communication, and is used for supporting communication from a chip to a chip and from a board to a board; the aerospace interface comprises a SpaceWire interface 251 and a 1553B interface 252, wherein the SpaceWire interface 251 is an interface special for space special data transmission, and 1553B is an information transmission bus standard specially set for equipment on an airplane by the American military; the interactive interface 260 comprises I2C, I2S, SPI, GPIO and the like, and can be connected with led lamps, keys and the like for control; the fieldbus interface 270 comprises interfaces supporting CAN, RS422, RS485, etc. protocols. Wherein RapidIO is a high performance, low pin count, packet switch based interconnect architecture; SPI (Serial Peripheral interface) is a serial Peripheral interface; GPIO (general Purpose Input output) is a general Purpose Input/output interface.

As shown in fig. 2, the expansion board 200 further includes a second power supply unit 290, and the second power supply unit 290 is used for supplying operating power to the entire expansion board 200.

In the description herein, references to the description of the term "one embodiment," "a further embodiment," "some specific embodiments," or "some examples," etc., mean that a particular feature, structure, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

While embodiments of the present invention have been shown and described, it will be understood by those of ordinary skill in the art that: various changes, modifications, substitutions and alterations can be made to the embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the claims and their equivalents.

Claims (10)

1. A redundant computer, comprising:

a core board;

the AI core processor is arranged on the core board and used for calculating and processing an AI algorithm;

the cache unit is arranged on the core board, electrically connected with the AI core processor and used for caching data;

the memory unit is arranged on the core board, electrically connected with the AI core processor and used for storing the application program of the user and recording the application scene data of the user;

the expansion board is electrically connected with the core board and is used for coprocessing and interface expansion;

the core board and the expansion board are provided with connectors, and the core board and the expansion board are connected through the connectors.

2. The redundant computer of claim 1, wherein the core board further comprises a first power supply unit electrically connected to the AI core processor, the first power supply unit configured to provide a working power supply.

3. The redundant computer of claim 1, wherein the core board further comprises:

the clock unit is electrically connected with the AI core processor and is used for providing an input clock source;

the reset unit is electrically connected with the AI core processor and is used for providing a reset signal for the AI core processor;

and the frequency doubling unit is electrically connected with the AI core processor.

4. The redundant computer according to any one of claims 1 to 3, wherein the cache unit is DDR 3.

5. A redundant computer according to any of claims 1 to 3 wherein the storage unit is Nand FLASH memory.

6. The redundant computer of any one of claims 1 to 3, wherein the AI core processor is a Yulong410SE processor, the AI core processor comprising a heterogeneous processor and an AI accelerated processing co-processing neural network element.

7. The redundant-type computer according to any one of claims 1 to 3, wherein the expansion board includes several of a debugging interface, an industrial camera interface, a USB interface, a RapidIO interface, an aerospace interface, an interactive interface, a field bus interface, and an Ethernet interface.

8. The redundant computer according to claim 7, wherein the industrial Camera interface is an interface supporting connection of a Camera-Link Camera, the USB interface is a USB2.0 interface supporting a Host mode and a Device mode, the RapidIO interface is a RapidIO3.0 interface supporting backplane communication, the aerospace interface comprises a SpaceWire interface and a 1553B interface, and the interactive interface comprises an I2C interface, an I2S interface, an SPI interface and a GPIO interface.

9. The redundant computer according to claim 1, wherein the expansion board further comprises a second power supply unit for supplying an operating power.

10. The redundant computer of claim 1, wherein the connector is an HPC connector.

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