CN214756279U - High-precision digital passive resistance box - Google Patents

Abstract

The utility model discloses a high accuracy digit passive resistance case, including the singlechip, and receive singlechip controlNEach gear is provided with a shift register, a relay driver and a numerical control resistor array, and 8-bit parallel output ends Q of the shift register₇~Q₀Respectively connected with 8-bit input end I of relay driver₇~I₀Connected 8-bit output end D of relay driver₇~D₀Respectively connected with 8-bit input control terminal C of numerical control resistor array₇~C₀Connecting, wherein SI, SCK, RCK of the 1 st gear are respectively connected with 3 general I/O ports GPIO of the single chip microcomputerMSI, SCK, RCK and 1 st output end R of gear_W1Respectively is in contact withMSQH in the-1 gear,SCK, RCK and 2 nd output end R_W2Are connected with each other, 2 is less than or equal toM≤NFrom the 1 st output R of the 1 st gear_W1And a firstN2 nd output end R of gear_W2Between output passive resistorR _x. The digital resistance box can improve the precision of the output resistance, realize high-power passive output resistance, and solve the application problem of the digital resistance box in the fields of analog sensors, automatic control and the like.

Description

High-precision digital passive resistance box

Technical Field

The utility model relates to a digital resistance box specifically is a high accuracy digital passive resistance box.

Background

The resistance box is a device which can adjust the resistance and can display the resistance value of the resistance. A digital resistance box is a device for controlling the resistance value change thereof by using a digital signal, and can be generally divided into an active type and a passive type. Compared with a mechanical resistance box, the digital resistance box has the advantages of programmable resistance value change, no mechanical abrasion, automatic operation, long service life and the like, so that the digital resistance box is widely applied to the fields of analog resistance type sensors, automatic control and the like.

The existing digital passive resistance box is generally characterized in that an electromagnetic relay switch is connected with a standard resistor in parallel, and different output resistors are realized by closing different program-controlled electromagnetic relay switches. The digital passive resistance box with the parallel structure has the advantages that the quantity change of the closed relays is large during working, and the closed electromagnetic relays have certain on-resistance, so that the error fluctuation of the output resistance is large, and the precision of the output resistance is poor. In addition, the existing digital passive resistance box also has the defects of occupying a large number of I/O ports of a single chip microcomputer, being inconvenient for gear shifting and resolution ratio expansion, and thus the application of the digital passive resistance box in the fields of analog sensors, automatic control and the like is limited to a great extent.

SUMMERY OF THE UTILITY MODEL

The utility model aims at providing a high accuracy number passive resistance case to the not enough that exists among the prior art. The digital passive resistance box can greatly improve the precision of output resistance, realize high-power passive output resistance, reduce the tax amount of I/O ports of a singlechip occupied by a control circuit, facilitate the expansion of gears and resolution of the digital resistance box, and solve the application problem of the digital resistance box in the fields of analog sensors, automatic control and the like.

Realize the utility model discloses the technical scheme of purpose is:

a high-precision digital passive resistance box comprises a single chip microcomputer and N gears controlled by the single chip microcomputer, wherein N is a positive integer, each gear is provided with a shift register, a relay driver and a digital control resistor array, and 8-bit parallel output ends Q of the shift register₇～Q₀Respectively connected with 8-bit input end I of relay driver₇～I₀Connected 8-bit output end D of relay driver₇～D₀Respectively connected with 8-bit input control terminal C of numerical control resistor array₇～C₀The data line SI, the data input clock line SCK and the data output latch clock line RCK of the 1 st gear are respectively connected with 3 general I/O ports GPIO of the single chip microcomputer, and the SI, the SCK and the RCK of the M gear and the 1 st output end R_W1SQH, SCK, RCK and 2 nd output end R respectively corresponding to the M-1 th gear_W2M is an integer and is more than or equal to 2 and less than or equal to N, and the 1 st output end R of the 1 st gear_W1And the 2 nd output end R of the Nth gear_W2Between output passive resistor R_x。

The numerical control resistor array is composed of 5 resistors and 8 electromagnetic relays, and the 5 resistors are R-shaped₁～R₅In series in pairs, electromagnetic relays RL₁～RL₈One coil pin is respectively led out of an 8-bit input control end C₀～C₇，RL₁～RL₈Is connected to a high level V_CC，RL₁～RL₅A normally open contact pin of the contact is respectively connected with R₁～R₅And R₅Are connected by pins at the non-series connection part, RL₁～RL₅Another normally open contact pin is connected with and leads out the 1 st output end R_W1，RL₆～RL₈A normally open contact pin of the contact is respectively connected with R₁Without series connection ofPin and R₁～R₃Are connected at the pin in series, RL₆～RL₈Another normally open contact pin is connected with and leads out the 2 nd output end R_W2。

The 8 electromagnetic relays are RL in working₁～RL₅Having only one closure, RL₆～RL₈Only one is closed, and when the electromagnetic relay does not work, 8 electromagnetic relays are all opened.

The 5 resistors are R at the k gear₁Resistance value of R₁(k)＝R×10^(k-1)K is a positive integer and k is not more than N, R is resolution, and R is₁To R₅The resistance ratio between 1:2:4:1:2, R of k-th gear during operation_w1And R_w2The output resistance between is j multiplied by R multiplied by 10^(k-1)J is a non-negative integer and j is less than or equal to 10, and R of the k-th gear during non-operation_w1And R_w2The output resistance between is ∞.

The output passive resistor R_xIn the range of

R₀Is the on-resistance of the electromagnetic relay.

The models of the 8 electromagnetic relays are G6L.

The model of the shift register is 74LS 595.

The relay driver model is ULN 2803.

The model of the single chip microcomputer is STC89C 52.

The technical scheme provides a latch output Q of a k-th gear shift register₇～Q₀Inputting control signal C by numerical control resistor array₇～C ₀2 corresponding electromagnetic relays are closed or fully opened, and the 1 st output end R_W1And 2 nd output terminal R_W2Resistance value between and the 1 st output terminal R_W1And 2 nd output terminal R_W2Inter-resistance encoded Data [ k-1]]The relationship between them, as shown in table 1:

TABLE 1

The high-precision digital passive resistance box outputs a passive resistance R_xThe control process comprises the following steps:

s1, random output resistor R_xNumber of gear N, resolution R, on-resistance R of electromagnetic relay₀R is to be_xMinus the on-resistance R of 2N electromagnetic relays₀After conversion to an integer Z_Rx＝(R_x-2N×R₀) /R, calculating the maximum range integer of the digital passive resistance box with N gears

Judgment of Z_RxWhether or not it is greater than M_R(N), if yes, perform step S2, otherwise let k equal to N, and perform step S3;

1 st output end R of S2.N gears_W1And 2 nd output terminal R_W2The resistance codes between are all Data [ k-1]]K is a positive integer and k is equal to or less than N, and go to step S6;

s3, judging Z_RxWhether or not less than 10^kIf yes, executing step S4, otherwise executing step S5;

s4, the 1 st output end R of the kth gear_W1And 2 nd output terminal R_W2The resistance between them is coded as Data [ k-1]]＝Z_Rx/10^k-1The 1 st output end R of the k-n +1 th gear_W1And 2 nd output terminal R_W2The resistance between is coded as Data [ k-n ]]＝(Z_Rx/10^(k-n)) % 10, n is an integer and n is more than or equal to 2 and less than or equal to k, and go to step S6;

s5, the 1 st output end R of the kth gear_W1And 2 nd output terminal R_W2The resistance between them is coded as Data [ k-1]]10, let Z_Rx＝Z_Rx-10^kK is k-1, judges whether k is equal to 1, if so, makes Data [ 0%]＝Z_RxAnd go to step S6, otherwise go to step S3;

s6, looking up a table 1 to obtain N gear shift register latch output control codes Q [ Data [ k-1]]]K is a positive integer and k is less than or equal to N, the singlechip synchronously outputs N gear latching output control codes [ Q [ Data [0 ]],Q[Data[1],…，Q[Data[N-1]]To correspond to2N electromagnetic relays are closed or fully opened, and the 1 st output end R of the 1 st gear_W1And the 2 nd output end R of the Nth gear_W2The passive resistance of the output between is R_xAnd the control ends.

Compared with the existing digital resistance box, the digital resistance box of the technical scheme can greatly improve the precision of the output resistance, realize high-power and passive output resistance, only occupy 3 single chip microcomputer I/O ports by the control circuit, and the single chip microcomputer I/O ports are not increased by the expansion of gears and resolution ratio.

The digital passive resistance box can greatly improve the precision of output resistance, realize high-power passive output resistance, reduce the tax amount of I/O ports of a singlechip occupied by a control circuit, facilitate the expansion of gears and resolution of the digital resistance box, and solve the application problem of the digital resistance box in the fields of analog sensors, automatic control and the like.

Drawings

FIG. 1 is a circuit schematic of an embodiment;

FIG. 2 is a circuit diagram of the digitally controlled resistor array of FIG. 1 according to an embodiment;

FIG. 3 shows an example of an output passive resistor R_xAnd the flow chart of the control process is shown.

In the figure, 1 st gear 2, 2 nd gear 3, 3 rd gear 4, Nth gear 5, a shift register 6, a relay driver 7, a numerical control resistor array 8, a singlechip 9, a resistor 10 and an electromagnetic relay are arranged.

Detailed Description

The present invention will be described in further detail with reference to the following drawings and specific embodiments, but the present invention is not limited thereto.

Example (b):

referring to fig. 1, a high-precision digital passive resistance box comprises a single chip microcomputer 8 and N gears controlled by the single chip microcomputer 8, wherein N is a positive integer, each gear is provided with a shift register 5, a relay driver 6 and a numerical control resistance array 7, and 8-bit parallel output ends Q of the shift register 5₇～Q₀Respectively connected with 8-bit input terminal I of relay driver 6₇～I₀Connected 8-bit output end D of relay driver 6₇～D₀Respectively connected with 8-bit input control terminal C of numerical control resistor array 7₇～C₀The data line SI, the data input clock line SCK and the data output latch clock line RCK of the 1 st gear 1 are respectively connected with 3 general I/O ports GPIO of the singlechip 8, the SI, the SCK and the RCK of the M gear and the 1 st output end R_W1SQH, SCK, RCK and 2 nd output end R respectively corresponding to the M-1 th gear_W2M is an integer and is more than or equal to 2 and less than or equal to N, and the 1 st output end R of the 1 st gear 1_W1And the 2 nd output end R of the Nth gear 4_W2Between output passive resistor R_x。

As shown in fig. 2, the digital control resistor array 7 is composed of 5 resistors 9 and 8 electromagnetic relays 10, wherein the 5 resistors 9 are R₁～R₅In series in pairs in sequence, the electromagnetic relay 10RL₁～RL₈One coil pin is respectively led out of an 8-bit input control end C₀～C₇，RL₁～RL₈Is connected to a high level V_CC，RL₁～RL₅A normally open contact pin of the contact is respectively connected with R₁～R₅And R₅Are connected by pins at the non-series connection part, RL₁～RL₅Another normally open contact pin is connected with and leads out the 1 st output end R_W1，RL₆～RL₈A normally open contact pin of the contact is respectively connected with R₁Pin and R of non-series connection part₁～R₃Are connected at the pin in series, RL₆～RL₈Another normally open contact pin is connected with and leads out the 2 nd output end R_W2。

The 8 electromagnetic relays 10 are RL in operation₁～RL₅Having only one closure, RL₆～RL₈Only one is closed, and when the electromagnetic relay is not in work, 8 electromagnetic relays 10 are all opened.

The 5 resistors 9 and R at the k gear₁Resistance value of R₁(k)＝R×10^(k-1)K is a positive integer and k is not more than N, and R_1～R₅The resistance ratio between 1:2:4:1:2, R is resolution, and the 1 st output end R of the kth gear during working_w1And 2 nd output terminal R_w2Between output resistances of j×R×10^(k-1)J is a non-negative integer and j is less than or equal to 10, and the 1 st output end R of the kth gear does not work_w1And 2 nd output terminal R_w2The output resistance between is ∞.

The output passive resistor R_xIn the range of

R₀Is the on-resistance of the electromagnetic relay.

The 8 electromagnetic relays 10 are all G6L in model.

The model of the shift register 5 is 74LS 595.

The relay driver 6 is of the model ULN 2803.

The type of the single chip microcomputer 8 is STC89C 52.

This example gives the latch output Q of the k-th shift register 5₇～Q₀The numerical control resistor array 7 inputs a control signal C₇～C ₀2 corresponding electromagnetic relays 10 are closed or fully opened, and the 1 st output end R_W1And 2 nd output terminal R_W2Resistance value between and the 1 st output terminal R_W1And 2 nd output terminal R_W2Inter-resistance encoded Data [ k-1]]See table 1.

As shown in fig. 3, the high-precision digital passive resistor box outputs a passive resistor R_xThe control process comprises the following steps:

s1, random output resistor R_xNumber of gear N, resolution R, on-resistance R of electromagnetic relay₀R is to be_xMinus the on-resistance R of 2N electromagnetic relays₀After conversion to an integer Z_Rx＝(R_x-2N×R₀) /R, calculating the maximum range integer of the digital passive resistance box with N gears

Judgment of Z_RxWhether or not it is greater than M_R(N), if yes, perform step S2, otherwise let k equal to N, and perform step S3;

1 st output end R of S2.N gears_W1And 2 nd output terminal R_W2The resistance codes between are all Data [ k-1]]＝11，k is a positive integer and k is not more than N, and the step S6 is skipped;

s3, judging Z_RxWhether or not less than 10^kIf yes, executing step S4, otherwise executing step S5;

s4, the 1 st output end R of the kth gear_W1And 2 nd output terminal R_W2The resistance between them is coded as Data [ k-1]]＝Z_Rx/10^k-1The 1 st output end R of the k-n +1 th gear_W1And 2 nd output terminal R_W2The resistance between is coded as Data [ k-n ]]＝(Z_Rx/10^(k-n)) % 10, n is an integer and n is more than or equal to 2 and less than or equal to k, and go to step S6;

s5, the 1 st output end R of the kth gear_W1And 2 nd output terminal R_W2The resistance between them is coded as Data [ k-1]]10, let Z_Rx＝Z_Rx-10^kK is k-1, judges whether k is equal to 1, if so, makes Data [ 0%]＝Z_RxAnd go to step S6, otherwise go to step S3;

s6, looking up a table 1 to obtain N gear shift registers 5 latch output control codes Q [ Data [ k-1]]]K is a positive integer and k is less than or equal to N, the singlechip 8 synchronously outputs N gear latching output control codes [ Q [ Data [0 ]]，Q[Data[1]，…，Q[Data[N-1]]The corresponding 2N electromagnetic relays 10 are closed or fully opened, and the 1 st output end R of the 1 st gear is_W1And the 2 nd output end R of the Nth gear_W2The passive resistance of the output between is R_xAnd the control ends.

The specific cases are as exemplified below:

electromagnetic relay 10 with a resolution R of 0.01 Ω and a model G6L, having an on-resistance R of 5 in this example N, is switched on₀When the value is 0.1 omega, the k-th gear R₁Resistance value of R₁(k)＝R×10^(k-1)And R is_1～R₅The ratio of the resistance values is 1:2:4:1:2, 5 resistors 9 of 5 gears can be respectively calculated, as shown in table 2:

TABLE 2

The k-th gear	R1/Ω	R2/Ω	R3/Ω	R4/Ω	R5/Ω
						1	0.01	0.02	0.04	0.01	0.02
2	0.1	0.2	0.4	0.1	0.2
						3	1	2	4	1	2
4	10	20	40	10	20
						5	100	200	400	100	200

Output passive resistor R of high-precision digital passive resistor box_xThe control process comprises the following steps:

when the 1 st output end R of the 1 st gear_W1With the 2 nd output end R of the 5 th gear_W2A passive resistor R for output between_xWhen 7.78 Ω:

S1.Z_Rx＝(R_x-2N×R₀) (7.78-2 × 5 × 0.1)/0.01 ═ 678, and maximum range integer of the digital passive resistance box

Decision 678<111110, let k be 5, and go to step S3;

s3, judge 678<10^k＝10⁵Then go to step S4;

s4, outputting the R from the 5 th gear to the 1 st gear at the 1 st output end_W1And 2 nd output terminal R_W2The resistance codes between are respectively Data [5-1]＝Data[4]＝678/10^5-1＝0，Data[5-2]＝Data[3]＝(678/10^(5-2))％10＝0，Data[5-3]＝Data[2]＝(678/10^(5-3))％10＝6，Data[5-4]＝Data[1]＝(678/10^(5-4))％10＝7，Data[5-5]＝Data[0]＝(678/10^(5-5)) % 10 ═ 8, and jumps to step S6;

s6, looking up the table 1 to obtain 5 gear shift registers 5 latch output control codes Q [ Data [0 ]]]＝Q[8]＝0x28，Q[Data[1]]＝Q[7]＝0x24，Q[Data[2]]＝Q[6]＝0x44，Q[Data[3]]＝Q[0]＝0x41，Q[Data[4]]＝Q[0]The single chip 8 synchronously outputs 5 gear latch output control codes [0x28,0x24，0x44，0x41，0x41]when the corresponding 2 × 5 ═ 10 electromagnetic relays 10 are automatically closed, the 1 st output R in the 1 st gear is connected to the 1 st output R_W1With the 2 nd output end R of the 5 th gear_W2The passive resistance of the output between is R_x＝8×0.01×10^(1-1)+7×0.01×10^(2-1)+6×0.01×10^(3-1)+0×0.01×10^(4-1)+0×0.01×10^(5-1)The control ends when +2 × 5 × 0.1 is 7.78 Ω.

When the 1 st output end R of the 1 st gear_W1With the 2 nd output end R of the 5 th gear_W2A passive resistor R for output between_x1112.11 Ω:

S1.Z_Rx＝(R_x-2N×R₀) The maximum range integer of the digital passive resistance box is 111111 when the/R is (1112.11-2 multiplied by 5 multiplied by 0.1)/0.01

Decision 111111>111110, go to step S2;

s2.data [ k-1] ═ 11, k is a positive integer and k is not more than 5, and go to step S6; (ii) a

S6, looking up the table 1 to obtain 5 gear shift registers 5 latch output control codes Q [ Data [0 ]]]＝Q[11]＝0x00，Q[Data[1]]＝Q[11]＝0x00，Q[Data[2]]＝Q[11]＝0x00，Q[Data[3]]＝Q[11]＝0x00，Q[Data[4]]＝Q[11]When the shift position is 0x00, the single chip microcomputer 8 synchronously outputs 5 shift position latch output control codes [0x00, 0x00, 0x00, 0x00 and 0x00]All the electromagnetic relays 10 are turned off, and the 1 st output terminal R of the 1 st gear is turned off_W1With the 2 nd output end R of the 5 th gear_W2The passive resistance of the output between is R_xAnd f, displaying the overrange and ending the control.

When the 1 st output end R of the 1 st gear_W1With the 2 nd output end R of the 5 th gear_W2A passive resistor R for output between_x1068.12 Ω:

S1.Z_Rx106712 (1068.12-2 × 5 × 0.1)/0.01, maximum range integer of digital passive resistance box

Decision 106712<111110 and let k equal to 5Step S3 is performed;

s3, judge 106712>10^k＝10⁵Then go to step S5;

S5.Data[5-1]＝Data[4]10, let Z_Rx＝Z_Rx-10^k＝106712-10⁵6712, k-1-5-1-4, and k is judged>1, jumping to step S3;

s3, judging 6712<10^k＝10⁴Then go to step S4;

s4, the 1 st output end R from the 4 th gear to the 1 st gear_W1And 2 nd output terminal R_W2The resistance codes between are respectively Data [4-1 ]]＝Data[3]＝6712/10^4-1＝6，Data[4-2]＝Data[2]＝(6712/10^(4-2))％10＝7，Data[4-3]＝Data[1]＝(6712/10^(4-3))％10＝1，Data[4-4]＝Data[0]＝(6712/10^(4-4)) % 10 ═ 2, and jumps to step S6;

s6, looking up the table 1 to obtain 5 gear shift registers 5 latch output control codes Q [ Data [0 ]]]＝Q[2]＝0x42，Q[Data[1]]＝Q[1]＝0x21，Q[Data[2]]＝Q[7]＝0x24，Q[Data[3]]＝Q[6]＝0x44，Q[Data[4]]＝Q[10]When the shift position is 0x30, the single chip microcomputer 8 synchronously outputs 5 shift position latch output control codes [0x42, 0x21, 0x24, 0x44 and 0x30]When the corresponding 2 × 5 ═ 10 electromagnetic relays 10 are automatically closed, the 1 st output R in the 1 st gear is connected to the 1 st output R_W1With the 2 nd output end R of the 5 th gear_W2The passive resistance of the output between is R_x＝2×0.01×10^(1-1)+1×0.01×10^(2-1)+7×0.01×10^(3-1)+6×0.01×10^(4-1)+10×0.01×10^(5-1)The control ends when +2 × 5 × 0.1 is 1067.12 Ω.

In this example, N is 5, resolution R is 0.01 Ω, and electromagnetic relay on-resistance R of model G6L is obtained₀0.1 Ω, when outputting the passive resistance R_xIn that

In the range of (i.e., 1.00 Ω to 1112.10 Ω), all of the electromagnetic relays are closed in total of 2 × 5 to 10, and the on-resistances R of all the electromagnetic relays are closed₀The error caused by the error is 2 × 5 × 0.1 ═ 1 Ω, and the error can be regarded as a systematic error, and can be regarded as a systematic errorTo be eliminated by program control. However, in the present digital passive resistance box with the parallel structure, when N is 5, the resistance is applied to different output resistors R_xThe number of the closed electromagnetic relays fluctuates from 0 to 4 multiplied by 5 to 20, and all the electromagnetic relays have the on-resistance R₀The error caused can be regarded as random error, and is difficult to be eliminated by a program, and the maximum error can reach 4 × 5 × 0.1 ═ 2 Ω. Therefore, compared with the digital passive resistance box with the existing parallel structure, the digital passive resistance box with the double-sliding structure greatly improves the precision of the output passive resistance.

In this example, 5 resistors 9 in 5 gears are shown in table 2, and one of 1W, 2W, 5W, 8W, 10W, 25W, 50W, 75W, 100W and 250W is selected according to the power of the actually required resistor. The existing digital active resistance box is limited by the maximum power of an active device, and the power of an output active resistor is small. Therefore, compared with the existing digital active resistance box, the digital passive resistance box of the embodiment can realize high-power passive resistance output.

In this example, the control circuit of the digital passive resistance box with 5 gears only occupies 3I/O ports of the single chip microcomputer. In the existing digital passive resistance box, each gear needs 4 single-chip microcomputer I/O ports, and then 5 gears need 20 single-chip microcomputer I/O ports in total, so that compared with the existing digital passive resistance box, the digital passive resistance box control circuit of the embodiment occupies the tax reduction of the number of the single-chip microcomputer I/O ports, and the extension of the gears and the resolution ratio does not need to increase the single-chip microcomputer I/O ports.

Compared with the existing digital resistance box, the digital passive resistance box of the embodiment can greatly improve the precision of the output resistance, realize high-power passive output resistance, and the control circuit only occupies 3 singlechip I/O ports, and the expansion of gears and resolution ratio does not increase the singlechip I/O ports, thereby effectively solving the problem of the application of the digital resistance box in the fields of analog resistance type sensors, automatic control and the like.

Claims (5)

1. The high-precision digital passive resistance box is characterized by comprising a single chip microcomputer and N gears controlled by the single chip microcomputer, wherein N is a positive integer, each gear is provided with a shift register, a relay driver and a numerical control resistor array, and the shift register is8-bit parallel output Q₇～Q₀Respectively connected with 8-bit input end I of relay driver₇～I₀Connected 8-bit output end D of relay driver₇～D₀Respectively connected with 8-bit input control terminal C of numerical control resistor array₇～C₀The data line SI, the data input clock line SCK and the data output latch clock line RCK of the 1 st gear are respectively connected with 3 general I/O ports GPIO of the single chip microcomputer, and the SI, the SCK and the RCK of the M gear and the 1 st output end R_W1SQH, SCK, RCK and 2 nd output end R respectively corresponding to the M-1 th gear_W2M is an integer and is more than or equal to 2 and less than or equal to N, and the 1 st output end R of the 1 st gear_W1And the 2 nd output end R of the Nth gear_W2Between output passive resistor R_x。

2. A high precision digital passive resistor box according to claim 1, characterized in that the digital resistor array consists of 5 resistors and 8 electromagnetic relays, 5 resistors being R₁～R₅In series in pairs, electromagnetic relays RL₁～RL₈One coil pin is respectively led out of an 8-bit input control end C₀～C₇，RL₁～RL₈Is connected to a high level V_CC，RL₁～RL₅A normally open contact pin of the contact is respectively connected with R₁～R₅And R₅Are connected by pins at the non-series connection part, RL₁～RL₅Another normally open contact pin is connected with and leads out the 1 st output end R_W1，RL₆～RL₈A normally open contact pin of the contact is respectively connected with R₁Pin and R of non-series connection part₁～R₃Are connected at the pin in series, RL₆～RL₈Another normally open contact pin is connected with and leads out the 2 nd output end R_W2。

3. A high precision digital passive resistance box according to claim 2, characterized by the 8 electromagnetic relays, RL in operation₁～RL₅Having only one closure, RL₆～RL₈Only one is closed, and when the electromagnetic relay does not work, 8 electromagnetic relays are all opened.

4. A high precision digital passive resistor box according to claim 2, characterized by the 5 resistors, R at k-th gear₁Resistance value of R₁(k)＝R×10^(k-1)K is a positive integer and k is not more than N, R is resolution, and R is₁To R₅The resistance ratio between 1:2:4:1:2, R of k-th gear during operation_w1And R_w2The output resistance between is j multiplied by R multiplied by 10^(k-1)J is a non-negative integer and j is less than or equal to 10, and R of the k-th gear during non-operation_w1And R_w2The output resistance between is ∞.

5. A high precision digital passive resistor bank according to claim 1, characterized in that the output passive resistor R_xIn the range of

R₀Is the on-resistance of the electromagnetic relay.

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