CN214669463U

CN214669463U - Matrix type chip testing and program burning mode device

Info

Publication number: CN214669463U
Application number: CN202120910207.8U
Authority: CN
Inventors: 孙自宇; 周海涛
Original assignee: Shanghai Guanxian Optoelectronic Technology Co ltd
Current assignee: Shanghai Guanxian Optoelectronic Technology Co ltd
Priority date: 2021-04-29
Filing date: 2021-04-29
Publication date: 2021-11-09
Anticipated expiration: 2031-04-29

Abstract

The utility model provides a matrix chip test and procedure burn way device, include: a housing providing a mounting and support platform for the entire device; be the matrix and arrange the multiunit test station on the casing, every group test station includes: the test mainboard is provided with an SD card circuit and a test auxiliary circuit; the IC test seat is connected with the test mainboard and used for accommodating the chip to be tested and connecting the chip to be tested with the test mainboard; the test auxiliary board is connected with the test main board, the test auxiliary board is provided with an SD card interface which is used for being connected with an SD card circuit of the test main board, and the SD card interface circuit of the test main board is connected and switched to the outside through the test auxiliary board; and the display screen is connected with the test mainboard and is used for displaying test and burning states. The utility model discloses improve the problem that the burning chip inefficiency that traditional single structure exists, practiced thrift the time cost and promoted production efficiency, the test station is arranged with the matrix and has been practiced thrift the space to a large extent.

Description

Matrix type chip testing and program burning mode device

Technical Field

The utility model relates to a semiconductor integrated circuit tests the field, specifically, relates to a matrix chip test and procedure burn way device.

Background

For the main control chip or core module scheme products, the products must be tested and programmed during the use process, if the chips cannot be effectively tested and verified before mounting, if bad materials or defective goods are bought, the problems of mass products occur after mounting, and the subsequent repair cost and the whole product delivery efficiency cannot be well controlled and lost.

The main burning test device in the current market mainly comprises a chip placing seat and a test board, when a program is burned, a code is burned to an internal storage unit of a chip through a certain protocol, the program occupies a part of storage space, waiting time can occur in the burning process of burning software, and the burning efficiency is influenced by the man-hour occupied by the burning software to a large extent during the waiting time.

The Chinese patent with the application number of 201810834677.3 is found through retrieval, and discloses a device, a method, a system and a storage medium for simultaneously burning a plurality of chips, and in order to solve the problem of low efficiency of burning chips, the device respectively burns a plurality of chips through a multi-channel burner, simultaneously detects the burning progress of each chip in real time, and judges the burning result of each chip, thereby realizing the simultaneous burning of a plurality of chips, but the device has a complex structure and higher cost.

SUMMERY OF THE UTILITY MODEL

To the defect among the prior art, the utility model aims at providing a matrix chip test and procedure burn record mode device, practiced thrift the time cost and promoted production efficiency.

According to the utility model provides a matrix chip test and procedure burn way device, include:

a housing providing a mounting and support platform for the entire device;

multiunit test station, multiunit test station be the matrix arrange in on the casing, every group test station includes:

the test mainboard is provided with an SD card circuit for program burning and a test auxiliary circuit for testing a chip to be tested;

the IC test seat is connected with the test mainboard and used for accommodating the chip to be tested, connecting the chip to be tested with the test mainboard and testing the chip to be tested through the test auxiliary circuit;

the test auxiliary board is connected with the test main board, is provided with an SD card interface which is used for being in circuit connection with an SD card of the test main board, and is used for enabling the SD card interface of the test main board to be in circuit connection and switching to the outside through the test auxiliary board;

and the display screen is connected with the test mainboard and used for displaying test and burning states.

Preferably, the test sub board is connected to the test main board through a first FPC connector.

Preferably, the test subplate is equipped with the observation lamp, the observation lamp passes through first FPC connector with the power of test mainboard links to each other, uses in order to test the required power of chip that awaits measuring passes through first FPC connector is drawn forth extremely on the test subplate, through observing the state of observation lamp realizes the visual observation test whether the required power of chip that awaits measuring is normal.

Preferably, the display screen is connected with the test main board through a second FPC connector.

Preferably, the IC test socket comprises:

a base;

the probe is vertically clamped on the base, the lower end of the probe is connected with the test main board, and the upper end of the probe is used for connecting the chip to be tested;

the fixed seat is arranged on the base and provided with a central space, the central space is used for accommodating the probe, a limiting device is arranged in the central space of the fixed seat, and the limiting device limits the installation position of the chip to be tested so that the chip to be tested is positioned right above the probe;

the height adjusting plate is arranged above the limiting device and is positioned above the chip to be tested, and the pressing force applied to the chip to be tested can be adjusted by adjusting the height of the height adjusting plate, so that the chip to be tested is connected or disconnected with the probe;

and the fastening device is covered above the chip to be tested to enable the upper part of the fixed seat to be closed, the fastening device is arranged on the height adjusting part, and the height adjusting part applies pressure to the chip to be tested by pressing down the fastening device so that the chip to be tested is connected with the test main board through the probe.

Preferably, the pin positions of the chip are provided with openings for connecting the probes.

Preferably, the base includes:

the probe clamping lower seat is provided with a positioning pin;

the probe clamping upper seat is fixed above the probe clamping lower seat through the positioning pin, so that the probe is clamped between the probe clamping lower seat and the probe clamping upper seat.

Preferably, the limiting device comprises:

the movable plate limiting seat is fixed with the probe clamping lower seat through a connecting piece and is a frame with a central space;

the first top spring is arranged on the probe clamping lower seat, extends upwards into the central space of the frame, and can deform vertically;

the limiting movable plate is arranged in the central space of the frame and used for mounting the chip to be tested, the limiting movable plate plays a limiting role through the positioning pin, and the lower part of the limiting movable plate is in contact with the upper end of the first top spring, so that the limiting movable plate can vertically move in the central space through the jacking force of the first top spring; the limiting movable plate is provided with a limiting space for limiting the chip to be detected, and the shape and the size of the limiting space are matched with the chip to be detected.

Preferably, the fastening device comprises:

one side of the buckling cover is connected with the fixed seat through a first fixing pin, so that the buckling cover can be turned upwards or downwards; a clamping hook is arranged on the buckling cover, the clamping hook is connected with the buckling cover through a second fixing pin, and the buckling cover is buckled with or opened from the fixed base through buckling the clamping hook; a second top spring is arranged on the buckling cover, the upper end of the second top spring props against the clamping hook, and the second top spring can deform vertically;

set up in detain the movable cover in the lid, just the movable cover is located altitude mixture control board's top, the movable cover can detain the internal luffing motion of lid, it is fixed through first jacking screw.

Preferably, the casing is provided with grooves matched with the plurality of groups of test stations.

Compared with the prior art, the utility model discloses at least one kind's beneficial effect as follows has:

the device of the utility model improves the testing station structure by setting a plurality of groups of testing stations, can operate another station in the first station burning process, and saves time cost to a great extent to improve production efficiency and improve the problem of low efficiency of the burning chip in the traditional single structure after the last station operation is completed and the first station burning is completed; and the whole is distributed in a matrix type, so that the space is greatly saved.

The device of the utility model transfers the SD card interface circuit connection position of the test mainboard to the outside again through the test auxiliary board, and can be better operated outside the casing; further through drawing the required power of chip that awaits measuring out to the external test subplate through FPC on, the accessible is observed the state of lamp and is realized observing whether the required power of chip that awaits measuring is normal visually, and is more directly perceived convenient.

The utility model provides an above-mentioned device, the most chip of design and the circuit of test mainboard can be public to design cost has also been practiced thrift.

Drawings

Other features, objects and advantages of the invention will become more apparent upon reading of the detailed description of non-limiting embodiments with reference to the following drawings:

fig. 1 is a schematic structural diagram of a matrix chip testing and program burning apparatus according to a preferred embodiment of the present invention;

fig. 2 is an axial schematic view of a matrix chip testing and program burning apparatus according to a preferred embodiment of the present invention;

FIG. 3 is a schematic diagram of an IC test socket according to a preferred embodiment of the present invention;

the scores in the figure are indicated as: 1 is a casing, 2 is a test main board, 3 is an IC test socket, 4 is a test subplate, 5 is a display screen, 6 is an external power interface, 101 is a hook, 102 is a second top spring, 103 is a buckling cover, 104 is a second fixing pin, 105 is a second jacking screw, 106 is a first jacking screw, 107 is a movable cover, 108 is a first fixing pin, a fourth screw of 109, 110 is a first screw, 111 is a height adjusting plate, 112 is a movable plate spacing socket, 113 is a spacing movable plate, 114 is a second screw, 115 is a third screw, 116 is a fixed socket, 117 is a probe clamping upper socket, 118 is a probe, 119 is a first top spring, 120 is a probe clamping lower socket, 121 is a positioning pin, and 122 is a third top spring.

Detailed Description

The present invention will be described in detail with reference to the following embodiments. The following examples will assist those skilled in the art in further understanding the present invention, but are not intended to limit the invention in any way. It should be noted that various changes and modifications can be made by one skilled in the art without departing from the spirit of the invention. These all belong to the protection scope of the present invention. Portions not described in detail in the following embodiments may be implemented using existing components.

Referring to fig. 1, the schematic structural diagram of a matrix chip testing and program burning device according to a preferred embodiment of the present invention includes: the machine shell 1 and the machine shell 1 are provided with a plurality of groups of testing stations.

The casing 1 may be made of bakelite. The multiple groups of test stations are arranged on the machine shell 1 in a matrix mode, so that the machine shell 1 plays a role in protecting internal components of the machine shell at the periphery of the multiple groups of test stations and also serves as an internal structure connector to provide an installation and supporting platform for the whole device. As a preferred mode, a groove matched with the plurality of groups of test stations is arranged on the housing 1 and used for installing the test assemblies of the plurality of groups of test stations. Referring to fig. 2, an external power interface is provided on the housing.

As a preferred mode, the working effect of arranging four groups of test stations on the shell 1 is optimal. In the implementation process, the other station is operated in the burning process of the first station, and when the operation of the fourth station is completed, the burning of the first station is completed, so that the time cost is saved to the greatest extent, and the production efficiency is improved.

Each group of test station test mainboard comprises a test mainboard 2, an IC test seat 3, a test auxiliary board 4 and a display screen 5.

Referring to fig. 1, a test main board 2 is fixed in a case 1 by screws. The main function of the test motherboard 2 is to serve as a central hub, which includes an SD card circuit for program burning and a test auxiliary circuit for testing a chip to be tested. Further comprises a backlight source circuit, a power supply circuit and a USB interface circuit which are used for connecting the screen of the display screen 5. The test mainboard 2 is connected with a power adapter through a power interface connector.

The IC test seat 3 is connected with the test mainboard 2, the IC test seat 3 is used for accommodating a chip to be tested and connecting the chip to be tested with the test mainboard 2, and the chip to be tested (IC or core module) is tested through the test auxiliary circuit. The IC test socket 3 is integrally used to connect the chip and the module component of the test motherboard 2, and one end of the dual-head probe 118 may be connected to the PIN of the chip or the PIN of the module scheme, and the other end is connected to the test motherboard 2. The IC test socket 3 is fixed to the test main board 2 by a connecting member such as a screw. The IC test socket 3 is arranged at the right side position of the display screen 5 of the machine shell 1. The main function of the IC test socket 3 is to put the chip to be tested in the position slot of the test socket and fasten the chip by pressing down the fastening cover of the chip test socket, so that the chip has a downward pressure on the bottom probe 118, thereby connecting the chip to be tested and the test motherboard 2 through the probe 118.

The test sub board 4 is connected with the test main board 2 through a first FPC connector. The test sub-board 4 is provided with an SD card interface for being in circuit connection with the SD card of the test main board 2. The SD card interface circuit connecting position of the test main board 2 is switched to the outside again through the test auxiliary board 4, so that the operation can be better carried out outside the shell 1. As a preferable mode, the test sub board 4 is provided with an observation lamp, and a power supply required for testing a chip to be tested (an IC or a test core module) may be led out to the external test sub board 4 through the FPC, and the power supply is connected to the observation lamp through the test sub board 4, so that whether the power supply required for testing the IC or the test core module is normal or not is visually observed by observing the state of the lamp. The observation lamp can adopt an LED lamp.

The position of the test sub-board 4 on the cabinet 1 is set above the display screen 5.

The display screen 5 is connected with the test mainboard 2 through a second FPC connector, and the display screen 5 is used for displaying test and burning states. The display screen 5 may be an LCD display screen. The display screen 5 is arranged in the central position of the matrix monolithic device.

In other preferred embodiments, referring to fig. 3, IC test socket 3 includes: base, probe 118, decide seat 116, altitude mixture control board 111 and fastener, wherein, with probe 118 along vertical centre gripping on the base, the lower extreme and the test mainboard 2 of probe 118 are connected, and the upper end of probe 118 is used for connecting the chip that awaits measuring. The fixed base 116 has a quadrangular frame structure having a central space.

The fixed seat 116 is arranged on the base, and the central space of the fixed seat 116 is used for accommodating the probe 118 clamped by the probe clamping seat; a limiting device 112 is arranged in the fixed seat 116, and the limiting device 112 limits the chip to be tested, so that the chip to be tested is located right above the probe 118. Preferably, the fixed base 116 is fixed to the probe-clamping lower base 120 at the bottom by the second screw 114 and the third screw 115.

As a preferable mode, referring to fig. 3, a third top spring 122 is provided on the fixed seat 116, and the third top spring 122 functions to keep the entire locking cover 103 biased backward when the locking cover 103 is locked and the hook 101 is sprung.

The height adjusting plate 111 is arranged above the limiting device, the height adjusting plate 111 is located above the chip to be tested, and the pressing force applied to the chip to be tested can be adjusted by adjusting the height of the height adjusting plate 111, so that the chip to be tested is connected or disconnected with the probes 118. The height adjustment plate 111 is fixed to the movable cover 107 by a fourth screw 109. The height adjustment plate 111 can adjust the pressing force of the height adjustment plate 111 on the chip to be tested on the limiting device (limiting movable plate 113), so that the contact force of the chip to be tested through the limiting device (limiting movable plate 113) is increased or reduced.

The fastening device is connected with the fixed seat 116 and can turn over, the fastening device covers the upper side of the chip to be tested to enable the upper side of the fixed seat 116 to be closed, the fastening device is arranged on the height adjusting plate 111, the fastening device is pressed downwards to enable the height adjusting plate 111 to apply pressure to the chip to be tested, and the chip to be tested is connected with the test mainboard 2 through the probes 118. Preferably, the pin locations of the chip under test are provided with openings for connecting probes 118.

In other preferred embodiments, as shown in FIG. 3, the base is composed of a probe clamping lower base 120 and a probe clamping upper base 117, wherein the probe clamping lower base 120 is provided with a positioning pin 121. The probe clamping upper seat 117 is fixed above the probe clamping lower seat 120 by the positioning pin 121, and the probe clamping upper seat 117 is used for clamping the top of the probe 118, so that the probe 118 is clamped between the probe clamping lower seat 120 and the probe clamping upper seat 117. The positioning pin 121 plays a role in positioning the positioning pin 121, the movable limit plate 113 and the upper probe clamping seat 117, and the three parts are positioned in the same vertical relation at the same time.

In some other preferred embodiments, the limiting means comprises: the movable plate limiting seat 112 and the limiting movable plate 113, the movable plate limiting seat 112 limits the limiting movable plate 113, and the limiting movable plate 113 is used for placing a chip to be tested. The movable plate position-limiting base 112 is fixed on the probe clamping lower base 120 by the first screw 110, and the movable plate position-limiting base 112 is a frame with a central space.

The first top spring 119 is arranged on the probe clamping lower seat 120, the first top spring 119 extends upwards into the central space of the frame to be contacted with the limit movable plate 113, and the first top spring 119 can deform vertically; the first spring 119 passes through the spring positioning hole of the probe-holding lower base 120, the middle position hole of the probe-holding upper base 117, and the like to the movable limit plate 113.

The limit movable plate 113 is disposed in the central space of the frame, the limit movable plate 113 has a limit effect through the positioning pin 121, and the lower side of the limit movable plate 113 contacts with the upper end of the first top spring 119, so that the limit movable plate 113 vertically moves in the central space through the top force of the first top spring 119. The position-limiting movable plate 113 provides a position-limiting function for the chip to be tested. The limiting movable plate 113 is provided with a limiting space for limiting the chip to be tested, and the shape and size of the limiting space are matched with the chip to be tested.

In some other preferred embodiments, the fastening device comprises: a snap cover 103, a second top spring 102 and a movable cover 107.

The locking cover 103 is a hollow quadrangular frame. One side of the quadrangular frame is connected to the fixed base 116 by inserting the first fixing pin 108, so that the locking cover 103 can be turned over upward or downward. The buckling cover 103 is provided with a hook 101 for clamping, the other side opposite to the quadrilateral frame is provided with a positioning hole, the hook 101 is fixed on the quadrilateral frame by a second fixing pin 104 which traverses the positioning hole, and the buckling cover 103 is buckled with or opened from the fixed seat 116 by buckling the hook 101. Preferably, the second set pins 104 are provided with second jacking screws 105 at two ends thereof, and the second jacking screws 105 are used for closing the second set pins 104 to prevent the second set pins 104 from escaping from the positioning holes. The buckling cover 103 is provided with a second top spring 102, the upper end of the second top spring 102 props against the hook 101, and the second top spring 102 can deform vertically. The second spring 102 acts to push the hook 101 all the time, and maintains the same posture before the hook 101 is caught on the stationary seat 116.

The movable cover 107 is disposed in the locking cover 103, and the movable cover 107 is located above the height adjustment plate 111, and the movable cover 107 can swing up and down in the locking cover 103 and is fixed by the first jacking screw 106.

The operation and use method of the matrix chip testing and program burning mode device is as follows:

1. and (3) wiring harness linking: connecting a power line with a power supply (the power supply adopts a 5.5V-24V direct current power supply);

2. program burning: placing the chip to be tested into the IC test seat by using a suction ball, and pressing the IC test seat down to hear a sound;

3. and copying the TGUS _ SET program file to a TF card root directory by using a TF card, and then inserting the TF card into a TF card slot of the burning test auxiliary board 4. And waiting until The file storage has finished The program to restart is displayed on a screen, which indicates that The program is successfully burnt.

4. And (4) pulling out the TF card when the engineering is completely burnt. And repeatedly buckling the IC test seat, and restarting the display screen at the moment. And displaying the function of the step-by-step test IC or the core module on a display screen. And after the test is finished, the display screen can display OK, and when the test of individual function fails, the display screen can display NG which indicates that the function fails the test requirement.

All the parts used in the application documents can adopt standard parts or common technologies if not detailed, and can be purchased from the market, the specific connection mode of all the parts can adopt conventional means such as bolts, rivets, welding and the like mature in the prior art, the machinery, the parts and the electrical equipment adopt conventional models in the prior art, the circuit connection adopts the conventional connection mode in the prior art, and the method is easy to realize for the person skilled in the art, and the detailed description is not provided.

The foregoing description of the specific embodiments of the invention has been presented. It is to be understood that the present invention is not limited to the specific embodiments described above, and that various changes and modifications may be made by those skilled in the art within the scope of the appended claims without departing from the spirit of the invention.

Claims

1. A matrix chip testing and program burning device is characterized by comprising:

a housing providing a mounting and support platform for the entire device;

2. The matrix chip testing and programming device of claim 1, wherein said testing sub-board is connected to said testing main board through a first FPC connector.

3. The matrix chip testing and program burning device according to claim 2, wherein said testing sub-board is provided with an observation lamp, said observation lamp is connected to the power supply of said testing main board through said first FPC connector, the power supply required for testing said chip under test is led out to said testing sub-board through said first FPC connector, and the condition of said observation lamp is observed to visually observe whether the power supply required for testing said chip under test is normal.

4. The matrix chip testing and programming device of claim 1, wherein said display is connected to said test motherboard via a second FPC connector.

5. The matrix chip testing and programming device of claim 1, wherein said IC test socket comprises:

a base;

6. The matrix chip testing and programming device of claim 5, wherein said chip pin locations are provided with openings for connecting said probes.

7. The matrix chip testing and programming device of claim 5, wherein said base comprises:

the probe clamping lower seat is provided with a positioning pin;

8. The matrix chip testing and programming device of claim 7, wherein said limiting means comprises:

9. The matrix chip testing and programming device of claim 5, wherein said fastening device comprises:

10. The matrix chip testing and programming device of any of claims 1-9, wherein said chassis has grooves matching said plurality of testing stations.