CN214412707U - Analog signal acquisition circuit and electronic equipment - Google Patents
Analog signal acquisition circuit and electronic equipment Download PDFInfo
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- CN214412707U CN214412707U CN202120515852.XU CN202120515852U CN214412707U CN 214412707 U CN214412707 U CN 214412707U CN 202120515852 U CN202120515852 U CN 202120515852U CN 214412707 U CN214412707 U CN 214412707U
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Abstract
The utility model discloses an analog signal acquisition circuit, include: each analog signal input circuit is provided with a switch element, one end of a switch path of each switch element is connected with an independent analog signal input source, and the other end of the switch path of each switch element is connected with an analog-to-digital conversion interface of the processor chip; the gating chip is provided with a common end and a plurality of channel selection output ends, and the channel selection output ends are connected with the control ends of the switching elements in a one-to-one correspondence manner; the gating chip switches and conducts the common terminal and one of the channel selection output terminals to gate the switching path of the connected switching element. An electronic device is also disclosed. Through the utility model discloses an analog signal acquisition circuit, multichannel analog quantity can be handled to an analog-to-digital conversion interface AD of treater chip, consequently can save the analog-to-digital conversion interface resource of treater chip effectively.
Description
Technical Field
The utility model belongs to the technical field of the interface circuit, especially, relate to an analog signal acquisition circuit to and an electronic equipment who has this kind of analog signal acquisition circuit.
Background
The acquisition demand of analog quantity in electronic products used by consumers in daily life is continuously increased along with the function expansion of the products. Analog acquisition refers to the input of analog signals, i.e., as continuously varying physical quantities, including voltage, current, temperature, pressure, flow, speed, light intensity, etc. In an electronic product, the physical quantities are detected by a sensor, electric signals detected by the sensor are sequentially output to an operational amplifier and an analog-digital processing module, and the detected continuously-changed analog quantity is converted into discrete digital quantity by the analog-digital processing module and further processed by a processor.
In a conventional circuit design, one analog signal is usually provided with one matched operational amplifier and analog-to-digital processing module, and one end of the processor is also provided with a matched analog-to-digital conversion interface. With the increasing demand for analog acquisition, the more analog-to-digital conversion interfaces are required in electronic products, and a processor is required to provide more analog-to-digital conversion interface resources, which is not favorable for the miniaturization and low-power design requirements of electronic products.
Disclosure of Invention
The utility model discloses increase along with the demand to the analog-to-digital conversion interface among the electronic product among the prior art, need the treater to provide more analog-to-digital conversion interface resources, be unfavorable for the problem of the miniaturized low-power design requirement of electronic product, design and provide an analog signal acquisition circuit.
In order to realize the purpose of the utility model, the utility model adopts the following technical scheme to realize:
an analog signal acquisition circuit comprising: the analog signal input circuit comprises a plurality of analog signal input circuits, wherein each analog signal input circuit is respectively provided with a switch element, one end of a switch path of each switch element is connected with an independent analog signal input source, and the other end of the switch path is connected with an analog-to-digital conversion interface of a processor chip; the gating chip is provided with a common end and a plurality of channel selection output ends, and the channel selection output ends are connected with the control ends of the switching elements in a one-to-one correspondence manner; the gating chip switches and conducts the common terminal and one of the channel selection output terminals to gate the switching path of the connected switching element.
Further, the gating chip is also provided with an input port which is connected with an output port of the processor chip; the output port of the processor chip outputs a gating signal to the input port of the gating chip, and the gating chip receives the gating signal and switches and conducts the common terminal and one channel selection output terminal.
Preferably, the gating chip has a plurality of input ports, the processor chip has a plurality of output ports, and the input ports of the gating chip are connected with the output ports of the processor chip in a one-to-one correspondence manner; the number of the input ports of the gating chip is x, and the number of the analog signal input circuits is N, wherein
。
Further, the method also comprises the following steps: the timer chip generates and outputs a clock signal to the processor chip, and the processor chip receives the clock signal and generates and outputs the gating signal.
Preferably, the timer chip is integrated in the processor chip or provided separately from the processor chip.
Further, the switch element is a P-channel field effect transistor, a gate of the switch element is electrically connected to the channel selection output terminal, a drain of the switch element is electrically connected to an analog signal input source, and a source of the switch element is electrically connected to an analog-to-digital conversion interface of the processor chip.
Preferably, the gating chip switches on the common terminal and one of the channel selection output terminals, and the gated channel selection output terminal outputs a low level signal to the gate of the connected switching element.
Further, the method also comprises the following steps: a plurality of first resistors, wherein a first end of each first resistor is connected with the grid of one switching element, and a second end of each first resistor is connected with the channel selection output end; and a plurality of second resistors, wherein the first ends of the second resistors are connected with the second end of one first resistor, and the second ends of the second resistors are connected with a power supply end.
Preferably, the gating chip is a multi-way selection switch.
Another aspect of the present invention provides an electronic device, comprising an analog signal acquisition circuit, wherein the analog signal acquisition circuit comprises: the analog signal input circuit comprises a plurality of analog signal input circuits, wherein each analog signal input circuit is respectively provided with a switch element, one end of a switch path of each switch element is connected with an independent analog signal input source, and the other end of the switch path is connected with an analog-to-digital conversion interface of a processor chip; the gating chip is provided with a common end and a plurality of channel selection output ends, and the channel selection output ends are connected with the control ends of the switching elements in a one-to-one correspondence manner; the gating chip switches and conducts the common terminal and one of the channel selection output terminals to gate the switching path of the connected switching element.
Compared with the prior art, the utility model discloses an advantage is with positive effect:
through the utility model discloses an analog signal acquisition circuit, multichannel analog quantity can be handled to an analog-to-digital conversion interface AD of treater chip, consequently can save the analog-to-digital conversion interface resource of treater chip effectively.
Other features and advantages of the present invention will become more apparent from the following detailed description of the invention when read in conjunction with the accompanying drawings.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.
Fig. 1 is a circuit diagram of an embodiment of the analog signal acquisition circuit provided by the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be described in further detail with reference to the accompanying drawings and embodiments.
It should be noted that in the description of the present invention, the terms of direction or positional relationship indicated by the terms "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. are based on the directions or positional relationships shown in the drawings, which are merely for convenience of description, and do not indicate or imply that the device or element must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
Aiming at the problems that in the prior art, as the demand of analog-to-digital conversion interfaces in electronic products increases, more analog-to-digital conversion interface resources need to be provided by a processor, and the requirements of miniaturization and low-power design of the electronic products are not facilitated, a newly designed analog signal acquisition circuit is shown in fig. 1. The analog signal acquisition circuit is mainly used for receiving and processing a plurality of input analog signals by an analog-to-digital conversion interface of the processor chip. Specifically, as shown in fig. 1, the analog signal acquisition circuit includes a plurality of analog signal input circuits, and each of the analog signal input circuits is provided with a switch element. As shown in fig. 1, the analog signal acquisition circuit includes an analog signal input circuit 11, analog signal input circuits 12 and …, and an analog signal input circuit 1N, and the analog signal input circuit 11 includes a switching element P1The analog signal input circuit 12 is provided with a switching element P2…, the analog signal input circuit 1N is provided with a switching element PN. One end of the switch path of the switch element is connected to an independent analog signal input source, and the other end is connected to the analog-to-digital conversion interface AD of the processor chip 20. As shown in fig. 1, the switching element P1One end of the switch path is connected with an analog signal input source AS1And the other end is connected to an analog-to-digital conversion interface AD of the processor chip 20, and similarly, the switching element P2One end of the switch path is connected with the analog signalInput source AS2The other end is also connected with an analog-to-digital conversion interface AD of the processor chip 20; ...; in the same way, the switching element PNOne end of the switch path is connected with the analog signal input end ASNThe other end is also connected to the analog-to-digital conversion interface AD of the processor chip 20. Analog signal input source AS1、AS2,…,ASNThe output data of the sensor can be, or the output data of the sensor can be a signal after filtering and amplifying. The analog signal input source may be, but is not limited to, voltage, current, temperature, pressure, flow, velocity, light intensity, etc. The analog signal input sources may be sampled by the same physical quantity or different physical quantities.
The analog signal acquisition circuit shown in fig. 1 is further provided with a gating chip 30, and the gating chip 30 has a common terminal and a plurality of channel selection output terminals, namely a channel selection output terminal DB1Channel selection output terminal DB2,., channel selection output DBN. The channel selection output terminals being connected in one-to-one correspondence with the control terminals of the switching elements, i.e. the channel selection output terminals DB1Connecting switch element P1Control terminal of, channel selection output terminal DB2Connecting switch element P2…, channel selection output DBNConnecting switch element PNThe control terminal of (1). According to actual needs, the gating chip 30 switches on the common terminal COM and one of the channel selection output terminals, and each channel selection output terminal is connected with the control terminal of one switching element, so that the switching path of the connected switching element can be gated, the gated analog signal input source is further communicated with the analog-to-digital conversion interface AD of the processor chip 20, and the switching paths of the other switching elements are kept in a cut-off state, thereby realizing time-sharing processing. When the analog signal input source needs to be switched, the gating chip 30 only needs to switch on the common terminal COM and the other channel selection output terminal, and the other channel gated analog signal input source can be communicated with the analog-to-digital conversion interface AD of the processor chip 20. With this design, one A/D conversion interface AD of the processor chip 20 can process multiple analog quantities, thereby effectively saving energySaving the resources of the analog-to-digital conversion interface of the processor chip.
The action of the gating chip 30 may be implemented in a variety of ways. For example by actuation of physical elements such as keys, touch screens, etc. In a preferred embodiment, the switching operation of the gating chip 30 is driven by a gating level signal output by the processor chip 20, and specifically, the gating chip 30 is further provided with an input port connected to an output port of the processor chip, the output port of the processor chip outputs a gating signal to the input port of the gating chip 30, and the gating chip 30 switches on the common terminal COM and one of the channel selection output terminals by receiving the gating signal.
Since the number of analog signal input sources can be very large, as shown in FIG. 1, in a preferred approach, the gating chip 30 is designed with multiple input ports (A)1、A2、... 、Ax) The processor chip has multiple output ports (IO)1、IO2、... 、IOx). The plurality of input ports of the gating chip 30 are connected to the plurality of output ports of the processor chip in a one-to-one correspondence. It is preferable that the number of input ports of the design gating chip 30 is x and the number of analog signal input circuits is N, where
One end of the processor chip can select one path of analog signal input circuit through different signal combinations. The signal combination of the processor chip is set as the address of the analog signal input circuit, and is preferably stored in the address register in the gating chip 30, and can be corresponding to any one of the analog signal input circuits through addressing. For example, x =3, i.e. three input ports (a) are designed1、A2、A3) And three output ports (IO)1、IO2、IO3) In one example, when all of the three output ports are low, that is, when the address code is 000, it is set to select the analog signal input circuit 11. Similarly, since the three output ports have eight level combinations in total, any one of the 8 analog signal input circuits can be selected by address codingAnd (4) a way. The gating chip 30 may be a multiplexer chip.
In conjunction with the timer chip 40, the analog signal input selection may follow a certain timing sequence. Specifically, as shown in fig. 1, a timer chip 40 is further provided in the analog signal acquisition circuit. The timer chip 40 generates and outputs a clock signal to the processor chip, which receives the clock signal to generate and output a strobe signal. The timer chip 40 may be integrated into the processor chip, for example, by using a crystal oscillator in the processor chip, or the timer chip 40 may be provided separately from the processor chip, for example, by using a 555 timer chip.
In the preferred embodiment shown in fig. 1, the switching element is preferably a P-channel field effect transistor, the gate of the switching element is electrically connected to the channel selection output terminal, the drain of the switching element is electrically connected to the analog signal input source, and the source of the switching element is electrically connected to the analog-to-digital conversion interface of the processor chip 20. As shown in fig. 1, i.e. a switching element P1Gate G of the transistor is electrically connected to the channel selection output terminal DB1Switching element P1Is electrically connected to the analog signal input source AS1Switching element P1Is electrically connected to the analog-to-digital conversion interface AD of the processor chip 20, and likewise the switching element P2Gate G of the transistor is electrically connected to the channel selection output terminal DB2Switching element P2Is electrically connected to the analog signal input source AS2Switching element P2Is electrically connected to the analog-to-digital conversion interface AD of the processor chip 20, until the switching element PNGate G of the transistor is electrically connected to the channel selection output terminal DBNSwitching element PNIs electrically connected to the analog signal input source ASNSwitching element PNIs electrically connected to the analog-to-digital conversion interface AD of the processor chip 20.
The output of the channel selection output terminal of the gating chip 30 is preferably set to be active low, the gating chip 30 switches on the common terminal COM and one of the channel selection output terminals, and the gated channel selection output terminal outputs a low-level signal to the gate of the connected switching element. The remaining selected channel select outputs remain high. Keep high level excellentThe gating is realized through a group of resistors, and specifically, the circuit design also comprises a plurality of first resistors and a plurality of second resistors, and each group of the first resistors and the second resistors is in one-to-one correspondence with the switching elements. A first end of the first resistor is connected to a gate of one of the switching elements, and a second end of the first resistor is connected to the channel selection output terminal. The first end of the second resistor is connected to the second end of one of the first resistors, and the second end of the second resistor is connected to the power supply terminal. Referring to the circuit design of FIG. 1, a first resistor R1Is connected to the switching element P1Gate G, first resistor R1Second terminal of (2) is connected to the channel selection output terminal DB1. Second resistor RaIs connected to a first resistor R1A second terminal of (1), a second resistor RaIs connected with the power supply end VCCFirst resistor R2Is connected to the switching element P2Gate G, first resistor R2Second terminal of (2) is connected to the channel selection output terminal DB2. Second resistor RbIs connected to a first resistor R2A second terminal of (1), a second resistor RbIs connected with the power supply end VCCBy analogy, the first resistor RNIs connected to the switching element PNGate G, first resistor RNSecond terminal of (2) is connected to the channel selection output terminal DBN. Second resistor RnIs connected to a first resistor RNA second terminal of (1), a second resistor RnIs connected with the power supply end VCC. As shown in FIG. 1, assuming that all three output ports of the processor chip output low levels to the input port of the gating chip 30, the gating chip 30 switches on the common terminal and the channel selection output terminal DB1Channel selection output terminal DB1Outputting an active low signal to the switching element P1Gate of (2), switching element P1Is turned on, and the analog signal input source AS1The analog quantity 1 is output to an analog-to-digital conversion interface AD of the processor chip. While the remaining channel select outputs, i.e. from the channel select output DB2Up to the channel selection output DBNAre all connected with a common terminal COMIs turned off, the switching element P is turned on due to the pull-up of the first resistor and the second resistor2…PNAll the gates of (1) are high level, and the switching element P2…PNThe analog signal input circuit 12 is kept in the off state until the analog signal input source AS corresponding to the analog signal input circuit 1N2,…,ASNThe acquisition can not be carried out through an analog-to-digital conversion interface AD of the processor chip, so that the effective time-sharing selection is realized.
Another aspect of the utility model provides an electronic equipment, including analog signal acquisition circuit. The specific circuit structure and operation process of the analog signal acquisition circuit are detailed in the above embodiments and the drawings of the specification, and are not described herein again. The electronic equipment with the analog signal acquisition circuit can achieve the same technical effect.
The above embodiments are only used to illustrate the technical solution of the present invention, and not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be apparent to those skilled in the art that modifications may be made to the embodiments described in the foregoing embodiments, or that equivalents may be substituted for elements thereof; such modifications and substitutions do not depart from the spirit and scope of the present invention, which is claimed.
Claims (10)
1. An analog signal acquisition circuit, comprising:
the analog signal input circuit comprises a plurality of analog signal input circuits, wherein each analog signal input circuit is respectively provided with a switch element, one end of a switch path of each switch element is connected with an independent analog signal input source, and the other end of the switch path is connected with an analog-to-digital conversion interface of a processor chip; and
the gating chip is provided with a common end and a plurality of channel selection output ends, and the channel selection output ends are connected with the control ends of the switching elements in a one-to-one correspondence manner; the gating chip switches and conducts the common terminal and one of the channel selection output terminals to gate the switching path of the connected switching element.
2. The analog signal acquisition circuit of claim 1,
the gating chip is also provided with an input port which is connected with the output port of the processor chip; the output port of the processor chip outputs a gating signal to the input port of the gating chip, and the gating chip receives the gating signal and switches and conducts the common terminal and one channel selection output terminal.
3. The analog signal acquisition circuit of claim 2,
the gating chip is provided with a plurality of input ports, the processor chip is provided with a plurality of output ports, and the input ports of the gating chip are connected with the output ports of the processor chip in a one-to-one correspondence manner; the number of the input ports of the gating chip is x, and the number of the analog signal input circuits is N, wherein
。
4. The analog signal acquisition circuit of claim 2 or 3, further comprising:
the timer chip generates and outputs a clock signal to the processor chip, and the processor chip receives the clock signal and generates and outputs the gating signal.
5. The analog signal acquisition circuit of claim 4,
the timer chip is integrated in the processor chip or provided independently of the processor chip.
6. The analog signal acquisition circuit of any one of claims 1 to 3,
the switch element is a P-channel field effect transistor, the grid electrode of the switch element is electrically connected with the channel selection output end, the drain electrode of the switch element is electrically connected with an analog signal input source, and the source electrode of the switch element is electrically connected with an analog-to-digital conversion interface of the processor chip.
7. The analog signal acquisition circuit of claim 6,
the gating chip switches on the common end and one of the channel selection output ends, and the gated channel selection output end outputs a low-level signal to the grid of the connected switching element.
8. The analog signal acquisition circuit of claim 6, further comprising:
a plurality of first resistors, wherein a first end of each first resistor is connected with the grid of one switching element, and a second end of each first resistor is connected with the channel selection output end; and
and the first ends of the second resistors are connected with the second end of one first resistor, and the second ends of the second resistors are connected with a power supply end.
9. The analog signal acquisition circuit of claim 1 wherein the gating chip is a multi-way selector switch.
10. An electronic device comprising an analog signal acquisition circuit as claimed in any one of claims 1 to 9.
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| CN202120515852.XU CN214412707U (en) | 2021-03-11 | 2021-03-11 | Analog signal acquisition circuit and electronic equipment |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114501177A (en) * | 2021-12-30 | 2022-05-13 | 江西飞尚科技有限公司 | Distributed data acquisition method, system, storage medium and equipment |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114501177A (en) * | 2021-12-30 | 2022-05-13 | 江西飞尚科技有限公司 | Distributed data acquisition method, system, storage medium and equipment |
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