CN214375111U - Board test circuit and board test system - Google Patents
Board test circuit and board test system Download PDFInfo
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- CN214375111U CN214375111U CN202023341966.1U CN202023341966U CN214375111U CN 214375111 U CN214375111 U CN 214375111U CN 202023341966 U CN202023341966 U CN 202023341966U CN 214375111 U CN214375111 U CN 214375111U
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Abstract
The application relates to a board card test circuit and a board card test system. The board card control circuit is connected with the board card power supply control circuit. The plurality of channel power supply control circuits are respectively connected with the board card power supply control circuit and the board card control circuit. The board card control circuit is used for controlling the on-off of the channel power supply control circuit. The plurality of board card channel circuits are connected with the plurality of channel power supply control circuits in a one-to-one correspondence mode. The plurality of board card channel circuits are further respectively connected with the board card control circuit, and the board card control circuit is used for controlling the on-off of the board card channel circuits through the channel power supply control circuit. The board power supply control circuit can power on the board test circuit according to the requirement. When the board card test circuit is not used, the system control circuit can control the board card power supply control circuit not to be powered on. The board card test circuit is in a power-off state, so that energy consumption can be saved.
Description
Technical Field
The application relates to the field of testing, in particular to a board test circuit and a board test system.
Background
In a semiconductor device package test, there is usually the same machine, and for the board resource configuration of a certain device parameter, there may be a case where some board or channel resources are not used. In practical use, because the batch size of some tested devices is small, different types of devices need to be tested by the same machine. Due to the fact that the board card resources used by different devices are different, when the same machine simultaneously considers the test of multiple types of devices, the condition that the board card or channel resources are idle can occur more easily. However, the board or the channel is always in a power supply state, which causes extra energy loss of the test system and causes the influence of overall heating and temperature rise of the test system.
SUMMERY OF THE UTILITY MODEL
In view of the above, it is desirable to provide a board test circuit and a board test system.
A board test circuit comprising:
the board card power supply control circuit is used for being connected with a power supply;
the board card control circuit is connected with the board card power supply control circuit;
the plurality of channel power supply control circuits are respectively connected with the board power supply control circuit and the board control circuit, and the board control circuit is used for controlling the on-off of the channel power supply control circuits; and
The integrated circuit board control circuit comprises a plurality of integrated circuit board channel circuits, a plurality of channel power supply control circuits and a plurality of integrated circuit board control circuits, wherein the integrated circuit board channel circuits are connected with the channel power supply control circuits in a one-to-one correspondence mode, the integrated circuit board channel circuits are further connected with the integrated circuit board control circuits respectively, and the integrated circuit board control circuits are used for controlling the on-off of the integrated circuit board channel circuits through the channel power supply control circuits.
In one embodiment, the board power supply control circuit includes:
an isolation drive circuit for receiving a control signal;
the switch switching circuit is connected with the isolation driving circuit and the power supply; and
and the filter circuit is connected with the switch switching circuit and the channel power supply control circuit.
In one embodiment, the isolation drive circuit includes:
the photodiode outputs a photoelectric coupling circuit which is used for receiving the control signal;
a soft switching circuit connected to the photodiode output thermocouple circuit, the soft switching circuit also connected to the switching circuit.
In one embodiment, the soft switching circuit comprises a first capacitor C1, a second resistor R2 and a third resistor R3, the first capacitor C1 and the second resistor R2 are connected in series across the photodiode output thermocouple circuit, and the third resistor R3 is connected in series across the first capacitor C1. Both ends of the second resistor R2 are connected to the switch switching circuit.
In one embodiment, the switch switching circuit comprises a first field effect transistor Q1 and a second field effect transistor Q2 which are connected in series, a first end of the first capacitor C1 is connected with a source of the first field effect transistor Q1 and a source of the second field effect transistor Q2, and a second end of the first capacitor C1 is connected with a gate of the first field effect transistor Q1 and a gate of the second field effect transistor Q2;
the drain electrode of the first field effect transistor Q1 is used for connecting the power supply, and the drain electrode of the second field effect transistor Q2 is connected with the filter circuit.
In one embodiment, the power supply further comprises a first branch and a second branch, wherein the first branch is connected with a P1+ power line of the power supply and the channel power supply control circuit, the second branch is connected with a P1-power line of the power supply and the channel power supply control circuit, and the first field effect transistor Q1 and the second field effect transistor Q2 are connected in series with the first branch.
In one embodiment, the filter circuit includes:
a first inductor L1 connected in series with the first branch and located between the drain of the second FET Q2 and the channel power supply control circuit;
a second inductor L2 connected in series with the second branch and located between the first branch and the power supply and the channel power supply control circuit; and
A second capacitor C2, a first end of the second capacitor C2 is connected between the first inductor L1 and the channel power supply control circuit, and a second end of the second capacitor C2 is connected between the second inductor L2 and the channel power supply control circuit.
In one embodiment, the photoelectric conversion device further comprises a current limiting resistor R1, and the photodiode output photoelectric coupling circuit is connected with a power supply through the current limiting resistor R1.
In one embodiment, the board test circuit further comprises a fuse connected between the power supply and the switching circuit.
A board testing system, comprising:
a plurality of the board card test circuits;
the power supply is connected with the board power supply control circuit of each board test circuit;
the system control circuit is connected with the board power supply control circuit of each board test circuit and is used for controlling the connection and disconnection of each board power supply control circuit;
the system control circuit is also connected with the board card control circuit of each board card test circuit and is used for controlling the on-off of the plurality of board card channel circuits through the board card control circuit, and
and the upper computer is connected with the system control circuit.
The embodiment of the application provides integrated circuit board test circuit includes integrated circuit board power supply control circuit, integrated circuit board control circuit, a plurality of passageway power supply control circuit and a plurality of integrated circuit board passageway circuit. The board power supply control circuit is used for being connected with a power supply. The board card control circuit is connected with the board card power supply control circuit. The plurality of channel power supply control circuits are respectively connected with the board card power supply control circuit and the board card control circuit. The board card control circuit is used for controlling the on-off of the channel power supply control circuit. The plurality of board card channel circuits are connected with the plurality of channel power supply control circuits in a one-to-one correspondence mode. The plurality of board card channel circuits are further respectively connected with the board card control circuit, and the board card control circuit is used for controlling the on-off of the board card channel circuits through the channel power supply control circuit. The board power supply control circuit can power on the board test circuit according to the requirement. When the board test circuit is not used, the system control circuit can control the board power supply control circuit not to be powered on. The board card test circuit is in a power-off state, so that energy consumption can be saved.
Further, when some of the board channel circuits in the board test circuit are in a used state, the board control circuit may control the channel power supply control circuit to supply power to the used board channel circuits. The board power supply control circuit supplies power to the used board channel circuit through the channel power supply control circuit, and the board test circuit can adjust the power supply condition according to the used condition of the board test circuit and the used condition of each board channel circuit, so that the aims of saving energy consumption and reducing heating to cause system temperature rise are fulfilled.
Drawings
Fig. 1 is a schematic diagram of a board test circuit provided in an embodiment of the present application;
fig. 2 is a schematic diagram of a board power supply control circuit provided in the embodiment of the present application;
fig. 3 is a schematic diagram of a board power supply control circuit according to another embodiment of the present application;
fig. 4 is a schematic diagram of a board test system provided in an embodiment of the present application;
fig. 5 is a schematic diagram illustrating a board test system according to an embodiment of the present application;
fig. 6 is a flowchart of a board test system testing method according to another embodiment of the present application.
Description of the reference numerals
The circuit board testing circuit 10, the circuit board power supply control circuit 100, the isolation driving circuit 110, the photodiode output photocoupling circuit 112, the soft switch circuit 114, the first capacitor C1, the second resistor R2, the third resistor R3, the switch switching circuit 120, the first field-effect transistor Q1, the second field-effect transistor Q2, the filter circuit 130, the first inductor L1, the second inductor L2, the second capacitor C2, the circuit board control circuit 200, the channel power supply control circuit 300, the circuit board channel circuit 400, the first branch circuit 510, the second branch circuit 520, the safety device 530, the circuit board testing system 20, the power supply 21, the system control circuit 22 and the upper computer 33.
Detailed Description
In order to make the aforementioned objects, features and advantages of the present application more comprehensible, embodiments accompanying the present application are described in detail below with reference to the accompanying drawings. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present application. This application is capable of embodiments in many different forms than those described herein and those skilled in the art will be able to make similar modifications without departing from the spirit of the application and it is therefore not intended to be limited to the embodiments disclosed below.
The numbering of the components as such, e.g., "first", "second", etc., is used herein only to distinguish the objects as described, and does not have any sequential or technical meaning. The term "connected" and "coupled" when used in this application, unless otherwise indicated, includes both direct and indirect connections (couplings). In the description of the present application, it is to be understood that the terms "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", and the like, indicate orientations or positional relationships based on those shown in the drawings, and are used only for convenience in describing the present application and for simplicity in description, and do not indicate or imply that the devices or elements referred to must have a particular orientation, be constructed in a particular orientation, and be operated, and thus, are not to be considered as limiting the present application.
In this application, unless expressly stated or limited otherwise, the first feature "on" or "under" the second feature may be directly contacting the first and second features or indirectly contacting the first and second features through intervening media. Also, a first feature "on," "over," and "above" a second feature may be directly or diagonally above the second feature, or may simply indicate that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature may be directly under or obliquely under the first feature, or may simply mean that the first feature is at a lesser elevation than the second feature.
The more the number of laser radar lines is, the higher the angular resolution is, the more complete and accurate the obtained target information is, but the production cost is high and the price is expensive. The 4-line laser radar has relatively low production cost and performance meeting the application requirements of most occasions. At present, stray light redundancy between the laser emitting end and the laser receiving end of the existing 4-line laser radar influences each other, and the use of the laser radar is influenced.
Referring to fig. 1, an embodiment of the present application provides a board test circuit 10. The board test circuit 10 includes a board power supply control circuit 100, a board control circuit 200, a plurality of channel power supply control circuits 300, and a plurality of board channel circuits 400. The board power supply control circuit 100 is used for being connected with a power supply 21. The board control circuit 200 is connected to the board power supply control circuit 100. The multiple channel power supply control circuits 300 are respectively connected to the board power supply control circuit 100 and the board control circuit 200. The board control circuit 200 is used for controlling the on/off of the channel power supply control circuit 300. The plurality of board card channel circuits 400 are connected to the plurality of channel power supply control circuits 200 in a one-to-one correspondence. The plurality of board card channel circuits 400 are further connected with the board card control circuit 200 respectively, and the board card control circuit 200 is used for controlling the on-off of the board card channel circuits 400 through the channel power supply control circuit 300.
The board power supply control circuit 100 may control the power supply 21 to supply power to the board test circuit 10. When the resources of the board test circuit 10 are used, the upper computer may control the board power supply control circuit 100 to be turned on, and the power supply 21 may energize the board test circuit 10. When the board test circuit 10 is not in use, the board power supply control circuit 100 may remain in an off state. Energy consumption can thus be saved.
The power supply 21 may be a power supply 21 integrated in the board test circuit 10. The board power supply control circuit 100 may be controlled by the upper computer 33. After the board power supply control circuit 100 is powered on, the board power supply control circuit 200 and the channel power supply control circuit 300 can be powered on. After the board control circuit 200 is powered on, the upper computer 33 communicates with the board control circuit 200 through the system control circuit 22 to control the on/off of the channel power supply control circuit 300.
The plurality of channel power supply control circuits 300 are electrically connected to the plurality of board channel circuits 400 in a one-to-one correspondence. When the board control circuit 200 controls the channel power supply control circuit 300 to be turned on, the board power supply control circuit 100 supplies power to the board channel circuit 400 corresponding to the channel power supply control circuit 300 through the channel power supply control circuit 300. Each board card channel circuit 400 is connected with the board card control circuit 200, so that the board card channel circuits 400 can exchange information with the upper computer 33 through the board card control circuit 200. Therefore, after the channel power supply control circuit 300 is powered on, the board control circuit 200 may control whether the channel power supply control circuit 300 is turned on, that is, may control whether the channel power supply control circuit 300 supplies power to a certain board channel circuit 400. When the resources of some board card channel circuits 400 are used, the board card control circuit 200 controls the channel power supply control circuit 300 corresponding to the used board card channel circuit 400 to be turned on, so as to supply power to the board card channel circuit 400. Meanwhile, the circuit 400 is routed to a card that is not being used. The board control circuit 200 is controlled to be in a power-off state by the corresponding channel power supply control circuit 300, that is, the channel power supply control circuit 300 cannot supply power to the board channel circuit 400, so that the purposes of saving energy consumption and reducing heat are achieved.
The board test circuit 10 provided by the embodiment of the application includes a board power supply control circuit 100, a board control circuit 200, a plurality of channel power supply control circuits 300, and a plurality of board channel circuits 400. The board power supply control circuit 100 is used for being connected with a power supply 21. The board control circuit 200 is connected to the board power supply control circuit 100. The multiple channel power supply control circuits 300 are respectively connected to the board power supply control circuit 100 and the board control circuit 200. The board control circuit 200 is used for controlling the on/off of the channel power supply control circuit 300. The plurality of board card channel circuits 400 are connected to the plurality of channel power supply control circuits 200 in a one-to-one correspondence. The plurality of board card channel circuits 400 are further connected with the board card control circuit 200 respectively, and the board card control circuit 200 is used for controlling the on-off of the board card channel circuits through the channel power supply control circuit 400. The board power supply control circuit 100 may power up the board test circuit 10 as needed. When the board test circuit 10 is not used, the system control circuit 21 may control the board power supply control circuit not to be powered on. The board test circuit 10 is in a power-off state, so that energy consumption can be saved.
Further, when some of the board channel circuits 400 in the board test circuit 10 are in a used state, the board control circuit 200 may control the channel power supply control circuit 300 to supply power to the used board channel circuits 400. The board power supply control circuit 100 supplies power to the used board channel circuit 400 through the channel power supply control circuit 300, and the board test circuit 10 can adjust the power supply situation according to the situation that the board test circuit is used and the situation that each board channel circuit 400 is used, so that the purposes of saving energy consumption and reducing heat generation are achieved.
Referring to fig. 2, in an embodiment, the board power supply control circuit 100 includes an isolation driving circuit 110, a switch switching circuit 120, and a filter circuit 130. The isolation driving circuit 110 is configured to receive a control signal. The control signal may be a high-low level signal. The switch switching circuit 120 is connected to the isolation driving circuit 110 and the power supply 21. The filter circuit 130 is connected to the switch switching circuit 120 and the channel power supply control circuit 300.
The isolation driving circuit 110 can be used for receiving control signals of equipment such as the upper computer 33, and the isolation driving circuit 110 can realize electric-photoelectric conversion, so that electric isolation of input and output circuits is realized. The input and output circuits of the isolation driving circuit 110 are isolated from each other, and the electrical signal has the advantages of unidirectionality during transmission, so that the isolation driving circuit has good electromagnetic interference resistance and electrical insulation capability. It is understood that the isolation driving circuit 110 may adopt a photoelectric isolation driving control mode, an electromagnetic isolation driving control mode, or the like.
The switch switching circuit 120 can be turned on or off under the control of the isolation driving circuit 110, and further, whether the switch switching circuit 120 is turned on or not can be controlled. When the switch switching circuit 120 is turned on, the power supply 21 may supply power to the board control circuit 200 and the channel power supply control circuit 300 through the board power supply control circuit 100. The filter circuit 130 may filter the output of the switching circuit 120.
Referring to fig. 3, in one embodiment, the isolation driving circuit 110 includes a photodiode output photo coupling circuit 112 and a soft switching circuit 114. The photodiode output photocoupling circuit 112 is used for receiving control signals. The photodiode output photocoupling circuit 112 may receive the control signal from the system control circuit 22. The soft switching circuit 114 is connected to the photodiode output thermocouple circuit 112. The soft switching circuit 114 is also connected to the switching circuit 120. The photodiode output photoelectric coupling circuit 112 can realize the electro-optic conversion, thereby realizing the electrical isolation of the input and output circuits, and having good electromagnetic wave interference resistance and electrical insulation capability. The soft switching circuit 114 can be turned on or off under the control of the high and low level signals output by the photodiode output thermocouple circuit 112. The soft switching circuit 114 reduces the rate of current rise and prevents large inrush currents from occurring in the following loads.
In one embodiment, the photodiode output thermocouple circuitry 112 may be connected to a power source through a current limiting resistor R1.
In one embodiment, the switching circuit 120 includes a first fet Q1 and a second fet Q2 connected in series. The first end of the first capacitor C1 is connected to the source of the first fet Q1 and the source of the second fet Q2. The second end of the first capacitor C1 is connected to the gates of the first fet Q1 and the second fet Q2. The drain of the first field effect transistor Q1 is used for connecting the power supply 21, and the drain of the second field effect transistor Q2 is connected with the filter circuit 130.
In one embodiment, the soft switching circuit 114 includes a first capacitor C1, a second resistor R2, and a third resistor R3. The third resistor R3 is connected in parallel to two ends of the first capacitor C1. The first capacitor C1 and the second resistor R2 are connected in series at two ends of the photodiode output photoelectric coupling circuit. Both ends of the second resistor R2 are connected to the switch switching circuit 120. The first capacitor C1 and the second resistor R2 cooperate to reduce the rising speed of the current of the first field effect transistor Q1, and prevent the following load from generating large rush current. The third resistor R3 is used for realizing automatic discharge of C1 when the circuit is turned off.
In one embodiment, when the photodiode output thermocouple circuit 112 inputs a high level signal, the photodiode output thermocouple circuit 112 outputs a control signal to the first fet Q1 and the second fet Q2, so that the first fet Q1 and the second fet Q2 are turned on. The power supply 21 can be powered by the first field effect transistor Q1, the second field effect transistor Q2 and the filter circuit 130.
In one embodiment, the first fet Q1 and the second fet Q2 are both N-channel fets. In one embodiment, the board test circuit 10 further includes a fuse 530. The safety device 530 is connected between the power supply 21 and the switching circuit. The fuse 530 may be a fuse. The safety device 530 can be opened in time when the current is too large.
In one embodiment, the board test circuit 10 further includes a first branch 510 and a second branch 520. The first branch 510 is connected to the P1+ power line of the power supply 21 and the channel power supply control circuit 300. The second branch 520 is connected to the P1-power line of the power supply 21 and the channel power supply control circuit 300. The first fet Q1 and the second fet Q2 are connected in series with the first branch 510. The first fet Q1 and the second fet Q2 can control the on/off of the first branch 510, and further can control the power supply 21 to supply power to the channel power supply control circuit 300 and the board control circuit 200.
It can be understood that the first field effect transistor Q1 and the second field effect transistor Q2 are used for controlling the on/off of the alternating current power supply. For controlling the on-off of the direct current power supply, if the potential of the P1+ power supply line is higher than that of the P1-power supply line, only the first field effect transistor Q1 can be adopted.
In one embodiment, the filter circuit 130 includes a first inductor L1, a second inductor L2, and a second capacitor C2. The first inductor L1 is connected in series with the first branch and is located between the drain of the second fet Q2 and the channel power supply control circuit 300. The second inductor L2 is connected in series with the second branch 520 and is located between the first branch 510 and the power supply 21 and the channel power supply control circuit 300. The first end of the second capacitor C2 is connected between the first inductor L1 and the channel power supply control circuit 300. The second end of the second capacitor C2 is connected between the second inductor L2 and the channel power supply control circuit 300.
In an embodiment, the specific structure of the channel power supply control circuit 300 may be the same as or similar to the board power supply control circuit 100, and is not described herein again.
Referring to fig. 4, the embodiment of the present application further provides a board testing system 20. The board test system 20 further includes a plurality of the board test circuits 10, the power supply 21, and a system control circuit 22. The power supply 21 is connected to the board power supply control circuit 100 of each board test circuit 10. The power supply 21 may supply power to the board test circuit 10 through each board power supply control circuit 100 of the board test circuit 10. The system control circuit 22 is connected to the board power supply control circuit 100 of each board test circuit 10. The system control circuit 22 is configured to control connection and disconnection of each board power supply control circuit 100. Therefore, the system control circuit 22 can send control information to the board test circuit 10 to be used, so that the power supply 21 supplies power to the board test circuit 10. The system control circuit 22 is further connected to the board control circuits 200 of each board test circuit 10, and is configured to control the on/off of the board channel circuits 400 through the board control circuits 200. That is, after each board channel circuit 400 sends the used condition to the upper computer 33, the upper computer 33 may control the corresponding board test circuit 10 to be powered on through the system control circuit 22, and further control the used board channel circuit 400 to be powered on through the board control circuit 200.
In one embodiment, the board test system 20 further includes an upper computer 33. The upper computer 33 is connected with the system control circuit 22. The upper computer 33 can exchange information with the system control circuit 22. The system control circuit 22 may exchange information with each of the board test circuits 10. That is, the upper computer 33 may interact information with each board test circuit 10, so as to control the working state of each board test circuit 10 and know the used condition of each board test circuit 10.
Referring to fig. 5, an embodiment of the present application further provides a testing method of the board testing system 20. The test method comprises the following steps:
s10, the upper computer 33 controls a power supply 21 to supply power to the board card test circuits 10;
s20, the upper computer 33 records the board test circuits 10 and the resource usage of the board channel circuits 400 in each board test circuit 10;
and S30, the upper computer 33 controls the on-off of the board test circuits 10 and the board channel circuits 400 in each board test circuit 10 based on the resource use condition.
Referring to fig. 6, in S10, after the board test circuit 10 is powered on, the host computer 33 may first invoke a test program, and power on and self-test the board test circuit 10 respectively; then recording the resource condition of the board card test circuit with normal performance; and further judging the query of the resource using condition of the test program. When the board card test circuit resources are complete, executing S30; and when the board card test circuit 10 is judged to have insufficient resources, the board card test circuit can jump out abnormally and prompt the board card test circuit.
In S20, after the board test circuits 10 perform self-inspection, whether each board test circuit 10 is used or not and the use condition of the board channel circuit 400 in the used board test circuit 10 are fed back to the upper computer 33 through the board control circuit 200 and the system control circuit 22. The upper computer 33 may record resource usage of each board test circuit 10 and the plurality of board channel circuits 400 in each board test circuit 10. The upper computer 33 may also record whether the performance of the board test circuit 10 is normal, whether corresponding program resources are complete, and the like.
In S30, the upper computer 33 may supply power to the board test circuit 10 that has been detected to be used, and confirm which of the board channel circuits 400 in the board test circuit 10 are used. The upper computer 33 can control the corresponding board power supply control circuit 100 in the board test circuit 10 to be switched on through the system control circuit 22, so that the power supply 21 supplies power to the board control circuit 200 and the channel power supply control circuit 300 through the board power supply control circuit 100. The board control circuit 200 may control the channel power supply control circuit 300 to be turned on, so that the board power supply control circuit 100 supplies power to the channel power supply control circuit 300. The upper computer 33 further controls the conduction of the used board card channel circuit 400 through the system control circuit 22 and the board card control circuit 200, so that the channel power supply control circuit 300 supplies power to the used board card channel circuit 400.
In one embodiment, the S30 includes:
s31, for the used board test circuit 10, the upper computer 33 controls the board power supply control circuit 100 to be turned on, so that the power supply 21 supplies power to the board control circuit 200 and the channel power supply control circuit 300;
and S32, for the used board card channel circuit, the upper computer controls the corresponding channel power supply control circuit to be conducted through the board card control circuit, so that the board card power supply control circuit supplies power to the used board card channel circuit through the channel power supply control circuit.
The board test system 20 can specifically supply the board test circuit 10 used. And may selectively provide power to the card channel circuit 400 being used. The card test circuit 10 and the card channel circuit 400 that are not used may not supply power, so that power consumption and heat generation may be reduced.
In one embodiment, the S20 includes:
and when the upper computer 33 monitors that the board card testing system 20 has insufficient resources, an alarm is given. Even if the resources in the board test circuit 10 in the board test system 20 are used, the upper computer 33 sends an alarm to facilitate the adjustment of the equipment by the staff.
S30 may further include a process of testing the device by the board test system 20, and during the test process, the parameter of the device may be tested and displayed by controlling the board resources through the program. And when the test is finished, the test can be reported to the upper computer 33.
The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the scope of the present application. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (10)
1. A board test circuit, comprising:
the board card power supply control circuit is used for being connected with a power supply;
The board card control circuit is connected with the board card power supply control circuit;
the plurality of channel power supply control circuits are respectively connected with the board power supply control circuit and the board control circuit, and the board control circuit is used for controlling the on-off of the channel power supply control circuits; and
the integrated circuit board control circuit comprises a plurality of integrated circuit board channel circuits, a plurality of channel power supply control circuits and a plurality of integrated circuit board control circuits, wherein the integrated circuit board channel circuits are connected with the channel power supply control circuits in a one-to-one correspondence mode, the integrated circuit board channel circuits are further connected with the integrated circuit board control circuits respectively, and the integrated circuit board control circuits are used for controlling the on-off of the integrated circuit board channel circuits through the channel power supply control circuits.
2. A board test circuit according to claim 1, wherein the board power supply control circuit comprises:
an isolation drive circuit for receiving a control signal;
the switch switching circuit is connected with the isolation driving circuit and the power supply; and
and the filter circuit is connected with the switch switching circuit and the channel power supply control circuit.
3. A board test circuit as claimed in claim 2, wherein the isolation drive circuit comprises:
the photodiode outputs a photoelectric coupling circuit which is used for receiving the control signal;
A soft switching circuit connected to the photodiode output thermocouple circuit, the soft switching circuit also connected to the switching circuit.
4. The board test circuit of claim 3, wherein the soft switch circuit comprises a first capacitor C1, a second resistor R2 and a third resistor R3, the first capacitor C1 and the second resistor R2 are connected in series across the photodiode output thermocouple circuit, the third resistor R3 is connected in series across the first capacitor C1, and the second resistor R2 is connected across the switch switching circuit.
5. The board test circuit of claim 4, wherein the switch switching circuit comprises a first fet Q1 and a second fet Q2 connected in series, a first terminal of the first capacitor C1 is connected to the source of the first fet Q1 and the source of the second fet Q2, and a second terminal of the first capacitor C1 is connected to the gate of the first fet Q1 and the gate of the second fet Q2;
the drain electrode of the first field effect transistor Q1 is used for connecting the power supply, and the drain electrode of the second field effect transistor Q2 is connected with the filter circuit.
6. A board test circuit as in claim 5, further comprising a first branch connected to the P1+ power line of the power supply and the channel supply control circuit, and a second branch connected to the P1-power line of the power supply and the channel supply control circuit, the first FET Q1 and the second FET Q2 being connected in series with the first branch.
7. A card test circuit of claim 6, wherein the filter circuit comprises:
a first inductor L1 connected in series with the first branch and located between the drain of the second FET Q2 and the channel power supply control circuit;
a second inductor L2 connected in series with the second branch and located between the first branch and the power supply and the channel power supply control circuit; and
a second capacitor C2, a first end of the second capacitor C2 is connected between the first inductor L1 and the channel power supply control circuit, and a second end of the second capacitor C2 is connected between the second inductor L2 and the channel power supply control circuit.
8. A board test circuit of claim 3, further comprising a current limiting resistor R1, wherein the photodiode output optocoupler is connected to a power supply via the current limiting resistor R1.
9. A board test circuit as claimed in claim 2, characterized in that the board test circuit further comprises a fuse device connected between the power supply and the switch switching circuit.
10. A board testing system, comprising:
a plurality of board test circuits according to any one of claims 1 to 9;
the power supply is connected with the board power supply control circuit of each board test circuit;
the system control circuit is connected with the board power supply control circuit of each board test circuit and is used for controlling the connection and disconnection of each board power supply control circuit;
the system control circuit is also connected with the board card control circuit of each board card test circuit and is used for controlling the on-off of the plurality of board card channel circuits through the board card control circuit, and
and the upper computer is connected with the system control circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202023341966.1U CN214375111U (en) | 2020-12-31 | 2020-12-31 | Board test circuit and board test system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202023341966.1U CN214375111U (en) | 2020-12-31 | 2020-12-31 | Board test circuit and board test system |
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| CN214375111U true CN214375111U (en) | 2021-10-08 |
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| CN202023341966.1U Active CN214375111U (en) | 2020-12-31 | 2020-12-31 | Board test circuit and board test system |
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