CN116430972A - Intel CPU power supply compatible control system and electronic computer thereof - Google Patents

Intel CPU power supply compatible control system and electronic computer thereof Download PDF

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Publication number
CN116430972A
CN116430972A CN202310323277.7A CN202310323277A CN116430972A CN 116430972 A CN116430972 A CN 116430972A CN 202310323277 A CN202310323277 A CN 202310323277A CN 116430972 A CN116430972 A CN 116430972A
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power supply
switching tube
bridge switching
lower bridge
control circuit
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宋长春
丁永波
李优斌
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Shenzhen Weibu Information Co Ltd
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Shenzhen Weibu Information Co Ltd
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/266—Arrangements to supply power to external peripherals either directly from the computer or under computer control, e.g. supply of power through the communication port, computer controlled power-strips
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/28—Supervision thereof, e.g. detecting power-supply failure by out of limits supervision
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/3055—Monitoring arrangements for monitoring the status of the computing system or of the computing system component, e.g. monitoring if the computing system is on, off, available, not available
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
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  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
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Abstract

The invention provides an Intel CPU power supply compatible control system and an electronic computer thereof, comprising: the device comprises a controller, a PWM power supply chip control circuit, a CPU core power supply control circuit and a CPU integrated display card power supply control circuit; the controller is connected with the PWM power supply chip control circuit, the PWM power supply chip control circuit is respectively connected with the CPU core power supply control circuit and the CPU integrated display card power supply control circuit, and the CPU core power supply control circuit and the CPU integrated display card power supply control circuit are respectively connected with the controller core power supply end and the integrated display card power supply end; the controller is configured to execute a program stored therein to implement the steps of: acquiring the current working state of the controller, and determining the current required working voltage value according to the current working state; and sending SVID request information corresponding to the working voltage value to the PWM power supply chip control circuit so as to adjust the size of a pulse signal of the PWM power supply chip control circuit. The problem that the existing power chip circuit supporting the Intel CPU with different IMVP versions is not universal and affects the use is solved.

Description

Intel CPU power supply compatible control system and electronic computer thereof
Technical Field
The invention relates to the technical field of Intel CPU power supply, in particular to an Intel CPU power supply compatible control system and an electronic computer thereof.
Background
With the rapid development of computer technology, manufacturers of CPU processors need to continuously update to improve their working performance so as to meet the application requirements of the market on the computer performance. When the CPU processor is updated, the corresponding IMVP communication protocol version may also need to be adjusted correspondingly, and at this time, the motherboard needs to replace the PWM power chip control circuit supporting the same version of protocol to meet the power supply requirement of the CPU.
The IMVP communication protocol version of the 12 th generation CPU and the IMVP communication protocol version of the 13 th generation CPU of the Intel are IMVP9.1 currently on the market, the IMVP communication protocol version of the 12 th generation CPU of the Intel is IMVP8, the two versions have differences, and the circuits of PWM power supply chips supporting different IMVP versions cannot be commonly used. In actual use, the PWM power chip used on the CPU may not correspond to the IMVP communication protocol version of the CPU, and the motherboard CPU may not be normally used at this time, thereby affecting the use of the user.
In view of this, the present application is presented.
Disclosure of Invention
The invention aims to provide an Intel CPU power supply compatible control system and an electronic computer thereof, and aims to solve the problems that circuits of PWM power supply chips supporting different IMVP versions of the Intel CPU cannot be commonly used in the prior art, and when the power supply chips are not matched with the IMVP versions, a board CPU cannot normally operate, so that the use of a user is affected.
The invention discloses an Intel CPU power supply compatible control system, which comprises: the device comprises a controller, a PWM power supply chip control circuit, a CPU core power supply control circuit and a CPU integrated display card power supply control circuit;
the output end of the controller is electrically connected with the input end of the PWM power supply chip control circuit, the first output end of the PWM power supply chip control circuit is electrically connected with the input end of the CPU core power supply control circuit, the second output end of the PWM power supply chip control circuit is electrically connected with the input end of the CPU integrated display card power supply control circuit, the output end of the CPU core power supply control circuit is electrically connected with the core power supply end of the controller, and the output end of the CPU integrated display card power supply control circuit is electrically connected with the integrated display card power supply end of the controller;
wherein the controller is configured to implement the following steps by executing a computer program stored therein:
acquiring the current working state of the controller, and determining the current required working voltage value of the system according to the current working state;
and sending SVID request information corresponding to the working voltage value to the PWM power supply chip control circuit so as to adjust the size of a pulse signal output by the PWM power supply chip control circuit.
Preferably, the chip model of the PWM power supply chip control circuit is RT3628AE.
Preferably, the CPU core power supply control circuit includes a plurality of first driving modules, and a plurality of first upper and lower bridge circuits matched with the plurality of first driving modules;
the first output end of the PWM power supply chip control circuit is electrically connected with the input end of the first driving module, the first output end of the first driving module is electrically connected with the control end of the first upper bridge switching tube of the first upper and lower bridge circuits, the first end of the first upper bridge switching tube is grounded, the second output end of the first driving module is electrically connected with the control end of the first lower bridge switching tube of the first upper and lower bridge circuits, the second end of the first upper and lower bridge switching tube is grounded, the second end of the second lower bridge switching tube is grounded, the third output end of the first driving module is electrically connected with the second end of the first upper bridge switching tube, the first end of the first lower bridge switching tube is electrically connected with the first end of the second lower bridge switching tube, and the output end of the first upper and lower bridge circuits is electrically connected with the core power supply end of the controller.
Preferably, the first upper bridge switching tube, the first lower bridge switching tube and the second lower bridge switching tube are NMOS tubes, the control end of the first upper bridge switching tube, the control end of the first lower bridge switching tube and the control end of the second lower bridge switching tube are gates of the NMOS tubes, the first end of the first upper bridge switching tube, the first end of the first lower bridge switching tube and the first end of the second lower bridge switching tube are drains of the NMOS tubes, and the second end of the first upper bridge switching tube, the second end of the first lower bridge switching tube and the second end of the second lower bridge switching tube are sources of the NMOS tubes.
Preferably, the CPU integrated display card power supply control circuit comprises a second driving module and a second upper and lower bridge circuit;
the second output end of the PWM power chip control circuit is electrically connected with the input end of the second driving module, the first output end of the second driving module is electrically connected with the control end of the second upper bridge switching tube of the second upper and lower bridge circuits, the first end of the second upper bridge switching tube is grounded, the second output end of the second driving module is electrically connected with the control end of the third lower bridge switching tube of the second upper and lower bridge circuits and the control end of the fourth lower bridge switching tube of the second upper and lower bridge circuits, the second end of the third lower bridge switching tube is grounded, the third output end of the fourth lower bridge switching tube is grounded, the second end of the second driving module is electrically connected with the second end of the second upper bridge switching tube, the first end of the third lower bridge switching tube and the first end of the fourth lower bridge switching tube, and the output end of the second upper and lower bridge circuits is electrically connected with the display card power end of the controller.
Preferably, the second upper bridge switching tube, the third lower bridge switching tube and the fourth lower bridge switching tube are NMOS tubes, the control end of the second upper bridge switching tube, the control end of the third lower bridge switching tube and the control end of the fourth lower bridge switching tube are gates of the NMOS tubes, the first end of the second upper bridge switching tube, the first end of the third lower bridge switching tube and the first end of the fourth lower bridge switching tube are drains of the NMOS tubes, and the second end of the second upper bridge switching tube, the second end of the third lower bridge switching tube and the second end of the fourth lower bridge switching tube are sources of the NMOS tubes.
Preferably, the chip types of the first driving module and the second driving module are RT9624F.
Preferably, the intelligent control system further comprises an early warning component, wherein the input end of the early warning component is electrically connected with the output end of the controller.
The invention also discloses an electronic computer, which comprises a computer body and the Intel CPU power supply compatible control system, wherein the Intel CPU power supply compatible control system is configured inside the computer body.
In summary, in the Intel CPU power supply compatible control system and the electronic computer thereof provided in the embodiment, during the use process, the controller may obtain and determine the current working state of the Intel CPU power supply compatible control system in real time, and determine the power supply voltage required by the system according to the working state; after the voltage is determined, the controller sends SVID request information corresponding to the required voltage to a power chip of the PWM power chip control circuit, the PWM power chip control circuit outputs corresponding PWM pulse width modulation signals to the CPU core power supply control circuit and the CPU integrated display card power supply control circuit according to the SVID request information so as to control the closing state and the conducting state of a switching tube in the CPU core power supply control circuit and the CPU integrated display card power supply control circuit, and then the magnitude of core power supply voltage provided by the CPU core power supply control circuit to the controller is controlled, and the magnitude of integrated display card power supply voltage provided by the CPU integrated display card power supply control circuit to the controller is controlled. Therefore, the problem that the circuits of the PWM power supply chips supporting the Intel CPUs of different IMVP versions in the prior art cannot be commonly used, and when the power supply chips are not matched with the IMVP versions, the board CPU cannot normally operate, so that the use of a user is affected is solved.
Drawings
Fig. 1 is a schematic structural diagram of an Intel CPU power supply compatible control system according to an embodiment of the present invention.
Fig. 2 is a schematic flow chart of an Intel CPU power supply compatible control system according to an embodiment of the present invention.
Fig. 3 is a circuit schematic diagram of a PWM power supply chip control circuit of an Intel CPU power supply compatible control system according to an embodiment of the present invention, which is shown as a three-layer rectangular frame, and the inside of the frame is written from top to bottom. Fig. 3a-3c are schematic diagrams of sub-circuits corresponding to the rectangular boxes of fig. 3.
Fig. 4-6 are schematic circuit diagrams of a CPU core power supply control circuit of an Intel CPU power supply compatible control system according to the first aspect of the present invention.
Fig. 7-9 are schematic circuit diagrams of a CPU core power supply control circuit of an Intel CPU power supply compatible control system according to a second embodiment of the present invention.
Fig. 10 is a schematic circuit diagram of a CPU integrated graphics card power supply control circuit of an Intel CPU power supply compatible control system according to an embodiment of the present invention.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments. All other embodiments, based on the embodiments of the invention, which are apparent to those of ordinary skill in the art without inventive faculty, are intended to be within the scope of the invention. Thus, the following detailed description of the embodiments of the invention, as presented in the figures, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. All other embodiments, based on the embodiments of the invention, which are apparent to those of ordinary skill in the art without inventive faculty, are intended to be within the scope of the invention.
Specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
Referring to fig. 1 to 3, a first embodiment of the present invention provides an Intel CPU power supply compatible control system, including: a controller 1, a PWM power supply chip control circuit 2, a CPU core power supply control circuit 3 and a CPU integrated display card power supply control circuit 4;
the output end of the controller 1 is electrically connected with the input end of the PWM power supply chip control circuit 2, the first output end of the PWM power supply chip control circuit 2 is electrically connected with the input end of the CPU core power supply control circuit 3, the second output end of the PWM power supply chip control circuit 2 is electrically connected with the input end of the CPU integrated display card power supply control circuit 4, the output end of the CPU core power supply control circuit 3 is electrically connected with the core power supply end of the controller 1, and the output end of the CPU integrated display card power supply control circuit 4 is electrically connected with the integrated display card power supply end of the controller 1;
wherein the controller is configured to implement the following steps by executing a computer program stored therein:
s101, acquiring the current working state of the controller, and determining the current required working voltage value of the system according to the current working state;
s102, SVID request information corresponding to the working voltage value is sent to the PWM power supply chip control circuit so as to adjust the size of a pulse signal output by the PWM power supply chip control circuit.
The IMVP communication protocol version of the 12 th generation CPU and the IMVP communication protocol version of the 13 th generation CPU of the Intel are IMVP9.1 currently on the market, the IMVP communication protocol version of the 12 th generation CPU of the Intel is IMVP8, the two versions have differences, and the circuits of PWM power supply chips supporting different IMVP versions cannot be commonly used. In actual use, the PWM power chip used on the CPU may not correspond to the IMVP communication protocol version of the CPU, and the motherboard CPU may not be normally used at this time, thereby affecting normal use of the user.
Specifically, in this embodiment, when the power switch of the motherboard is turned on, all other input signals such as the 15 th pin VIN/VSYS, the 36 th pin VCC and the 50 th pin EN of the PWM power chip UP101 of the PWM power chip control circuit 2 are normal, all the input signals are ready, the power chip is turned on, the 21 st, 22 nd, 23 nd, 20 nd, 19 th, 18 th, 17 th and 16 th pins (i.e. PWM 1-PWM 8 pulse width modulation signals) of the power chip are respectively connected with the UP 2-UP 9 bit number 8 driving chip PWM signals of the CPU core power supply control circuit 3, and the 24 th pin PWMA of the power chip is connected with the UP10 driving chip PWM signal of the CPU integrated graphics card power supply control circuit 4. The PWM power chip control circuit 2 supports the SVID protocol of the Intel CPU, and the magnitude of the output voltage VCORE of the CPU core power supply control circuit 3 and the output voltage VCCGT of the CPU integrated graphics card power supply control circuit 4 are controlled by the SVID signal dynamic voltage mode. The controller 1 sends corresponding SVID request information to a power chip of the PWM power chip control circuit 2 according to its own operating voltage requirement under different operating states, and the power chip converts after reading the SVID information data sent by the controller 1, so as to obtain the operating voltage value currently required by the Intel CPU power supply compatible control system, and finally, the PWM control mode adjusts and outputs the corresponding voltage to supply power to the controller 1.
In short, in the use process of the Intel CPU power supply compatible control system, the controller 1 can acquire and judge the current working state of the Intel CPU power supply compatible control system in real time, and determine the power supply voltage required by the system according to the working state; after determining the voltage, the controller 1 sends SVID request information corresponding to the required voltage to the power chip of the PWM power chip control circuit 2, the PWM power chip control circuit 2 outputs corresponding PWM pulse width modulation signals to the CPU core power supply control circuit 3 and the CPU integrated display card power supply control circuit 4 according to the SVID request information, so as to control the closing state and the conducting state of the switching tubes in the CPU core power supply control circuit 3 and the CPU integrated display card power supply control circuit 4, and further control the magnitude of the core power supply voltage provided by the CPU core power supply control circuit 3 to the controller 1, and the magnitude of the integrated display card power supply voltage provided by the CPU integrated display card power supply control circuit 4 to the controller 1. The Intel CPU power supply compatible control system has strong circuit compatibility, supports the power supply of the 12 th and 13 th generation of Intel CPUs, and meets the design requirements of the Intel; the intelligent power supply system not only solves the problem that the mainboard is compatible with the power supply application of the Intel 12 th-generation and 13 th-generation CPUs, but also has the characteristics of safe and stable circuit performance and high working efficiency, and improves the product competitive advantage.
In one possible embodiment of the present invention, the chip type of the PWM power chip control circuit 2 may be RT3628AE.
Specifically, in this embodiment, the RT3628AE chip is an IMVP9.1 CPU core power dual-output PWM controller using an I2C control interface, which is a synchronous Buck controller conforming to Intel IMVP9.1 specification and supporting 2 outputs, and adopts a G-NAVP ™ (Green Native AVP) control architecture of a limited dc gain error amplifier-based current control mode specific to stand , which has the characteristic of easily setting a voltage on-load drop parameter conforming to Intel CPU AVP (Adaptive Voltage Positioning ) requirements, and can bring optimized AVP performance with a brand-new fast response mechanism under the conditions of little load transient and output capacitance. The integrated high-precision ADC can be used for setting platforms and functions such as ICCMax, working frequency, overcurrent limiting threshold, self-adaptive quick response triggering threshold and the like, provides VR Ready and overheat indication, has perfect fault protection functions such as overvoltage protection, undervoltage protection, overcurrent protection, undervoltage locking protection and the like, supports access and setting of heat balance, dynamic load line, voltage offset, fixed VID, protection information and state, current/PSYS/temperature and the like through an I2C interface, and has wide application fields. It should be noted that in other embodiments, other types of power chips may be used, and the present invention is not limited thereto, but these embodiments are all within the scope of the present invention.
Referring to fig. 4-6 to fig. 7-9, in one possible embodiment of the present invention, the CPU core power supply control circuit 3 includes a plurality of first driving modules, and a plurality of first upper and lower bridge circuits matched with the plurality of first driving modules;
the first output end of the PWM power chip control circuit 2 is electrically connected with the input end of the first driving module, the first output end of the first driving module is electrically connected with the control end of the first upper bridge switching tube of the first upper and lower bridge circuits, the first end of the first upper bridge switching tube is grounded, the second output end of the first driving module is electrically connected with the control end of the first lower bridge switching tube of the first upper and lower bridge circuits, the second end of the first upper and lower bridge switching tube is grounded, the third output end of the second lower bridge switching tube is grounded, the second end of the first driving module is electrically connected with the first end of the first upper bridge switching tube, the first end of the second lower bridge switching tube, and the output end of the first upper and lower bridge circuits is electrically connected with the core power end of the controller 1.
Specifically, in this embodiment, after the power chip is turned on, pins 21, 22, 23, 20, 19, 18, 17 and 16 (i.e. PWM1 to PWM8 pulse width modulation signals) of the power chip are respectively connected with UP2 to UP9 bit number 8 driving chips PWM of the CPU core power supply control circuit 3, i.e. the first driving module signal; the UP 2-UP 9 bit number 8 driving chips, namely a 7 pin Ugate signal and a 5 pin Lgate signal of each first driving module respectively control VCORE, namely 8 paths of upper and lower bridge MOS tubes powered by a CPU core do switching work, and finally the VCORE voltage is output through inductance energy storage and capacitance filtering to power the core of the controller 1; and the number of the first driving modules can be adjusted according to actual conditions. It should be noted that, in other embodiments, other types of CPU core power supply control circuits may be used, which are not limited herein, but all the schemes are within the scope of the present invention.
Referring to fig. 10, in one possible embodiment of the present invention, the CPU-integrated graphics card power supply control circuit 4 includes a second driving module and a second upper and lower bridge circuit;
the second output end of the PWM power chip control circuit 2 is electrically connected to the input end of the second driving module, the first output end of the second driving module is electrically connected to the control end of the second upper bridge switching tube of the second upper and lower bridge circuit, the first end of the second upper bridge switching tube is grounded, the second output end of the second driving module is electrically connected to the control end of the third lower bridge switching tube of the second upper and lower bridge circuit, the control end of the fourth lower bridge switching tube of the second upper and lower bridge circuit, the second end of the third lower bridge switching tube is grounded, the third output end of the fourth lower bridge switching tube is grounded, the second end of the second upper bridge switching tube, the first end of the third lower bridge switching tube, the first end of the fourth lower bridge switching tube, and the output end of the second upper and lower bridge circuit is electrically connected to the integrated card power supply end of the controller 1.
Specifically, in this embodiment, after the power chip is turned on, the 24 th pin PWMA of the power chip is connected to the UP10 driving chip PWM signal of the CPU integrated graphics card power supply control circuit 4; and the UP10 driving chip, namely a 7 th pin Ugate signal and a 5 th pin Lgate signal of the second driving module respectively control the VCCGT, namely an upper bridge MOS tube and a lower bridge MOS tube powered by the CPU integrated display card do switching work, and finally output VCCGT voltage to power the integrated display card of the controller 1 through inductance energy storage and capacitance filtering. It should be noted that in other embodiments, other types of CPU integrated graphics card power supply control circuits may be used, which are not limited herein, but all the schemes are within the scope of the present invention.
In one possible embodiment of the present invention, the first upper bridge switching tube, the first lower bridge switching tube and the second lower bridge switching tube may be NMOS tubes, the control end of the first upper bridge switching tube, the control end of the first lower bridge switching tube and the control end of the second lower bridge switching tube are gates of the NMOS tubes, the first end of the first upper bridge switching tube, the first end of the first lower bridge switching tube and the first end of the second lower bridge switching tube are drains of the NMOS tubes, and the second end of the first upper bridge switching tube, the second end of the first lower bridge switching tube and the second end of the second lower bridge switching tube are sources of the NMOS tubes.
In one possible embodiment of the present invention, the second upper bridge switching tube, the third lower bridge switching tube and the fourth lower bridge switching tube may be NMOS tubes, the control end of the second upper bridge switching tube, the control end of the third lower bridge switching tube and the control end of the fourth lower bridge switching tube are gates of the NMOS tubes, the first end of the second upper bridge switching tube, the first end of the third lower bridge switching tube and the first end of the fourth lower bridge switching tube are drains of the NMOS tubes, and the second end of the second upper bridge switching tube, the second end of the third lower bridge switching tube and the second end of the fourth lower bridge switching tube are sources of the NMOS tubes.
Specifically, in this embodiment, the NMOS is formed of two N-type semiconductors and one P-type semiconductor, where the P-type semiconductor is in the middle and the two N-type semiconductors are on both sides; the main function of the NMOS tube is current amplification and switching, which amplifies weak signals into electric signals with larger amplitude values and also serves as a contactless switch. For the NMOS tube, the base voltage is higher than the emitter voltage by more than 0.7V, the emitter and the collector can be conducted, the base is used as a control end, the high level is conducted, and the low level is turned off; therefore, the on and off of the switching tube can be realized by only controlling the voltage of the base electrode. It should be noted that in other embodiments, other types of switching tubes may be used, and the embodiments are not limited in detail herein, but all the embodiments are within the scope of the present invention.
In one possible embodiment of the present invention, the chip types of the first driving module and the second driving module may be RT9624F.
Specifically, in this embodiment, the driving chip has a driving function, and can amplify an input weak current signal into a strong electric signal which is strong enough for an external device; the RT9624F chip has stable driving performance and low price, and is widely applicable to different electronic product fields. It should be noted that in other embodiments, other types of driving chips may be used, and the present invention is not limited thereto, but these solutions are all within the scope of the present invention.
In a possible embodiment of the present invention, the system further includes an early warning component 5, and an input end of the early warning component 5 is electrically connected to an output end of the controller 1.
Specifically, in this embodiment, the early warning component 5 may include an LED indicator light set and a buzzer, which are mainly configured to generate a relevant light prompt and sound prompt when the Intel CPU power supply compatible control system is abnormal, that is, generate an acousto-optic early warning signal, so as to remind a user to perform an inspection. It should be noted that in other embodiments, other types of early warning components may be used, and the embodiments are not limited in detail herein, but all the embodiments are within the scope of the present invention.
In sum, the Intel CPU power supply compatible control system is compatible with the 12 th generation and 13 th generation of Intel CPU power supply application at the same time, and the number of output channels can be adjusted by adding, subtracting and phase adjusting according to the product requirement, so that the Intel design requirement is met; meanwhile, the circuit is simple, and the Debug maintenance of engineers is convenient; the number of circuit parts is small, and the parts materials and the research and development cost are saved.
A second embodiment of the present invention provides an electronic computer, including a computer body and an Intel CPU power supply compatible control system as set forth in any one of the above, where the Intel CPU power supply compatible control system is configured inside the computer body.
The above is only a preferred embodiment of the present invention, and the protection scope of the present invention is not limited to the above examples, and all technical solutions belonging to the concept of the present invention belong to the protection scope of the present invention.

Claims (9)

1. An Intel CPU power compatible control system, comprising: the device comprises a controller, a PWM power supply chip control circuit, a CPU core power supply control circuit and a CPU integrated display card power supply control circuit;
the output end of the controller is electrically connected with the input end of the PWM power supply chip control circuit, the first output end of the PWM power supply chip control circuit is electrically connected with the input end of the CPU core power supply control circuit, the second output end of the PWM power supply chip control circuit is electrically connected with the input end of the CPU integrated display card power supply control circuit, the output end of the CPU core power supply control circuit is electrically connected with the core power supply end of the controller, and the output end of the CPU integrated display card power supply control circuit is electrically connected with the integrated display card power supply end of the controller;
wherein the controller is configured to implement the following steps by executing a computer program stored therein:
acquiring the current working state of the controller, and determining the current required working voltage value of the system according to the current working state;
and sending SVID request information corresponding to the working voltage value to the PWM power supply chip control circuit so as to adjust the size of a pulse signal output by the PWM power supply chip control circuit.
2. The Intel CPU power compatible control system of claim 1 wherein the PWM power chip control circuit has a chip model number RT3628AE.
3. The Intel CPU power supply compatible control system of claim 1 wherein the CPU core power supply control circuit includes a plurality of first driver modules and a plurality of first upper and lower bridge circuits coupled to the plurality of first driver modules;
the first output end of the PWM power supply chip control circuit is electrically connected with the input end of the first driving module, the first output end of the first driving module is electrically connected with the control end of the first upper bridge switching tube of the first upper and lower bridge circuits, the first end of the first upper bridge switching tube is grounded, the second output end of the first driving module is electrically connected with the control end of the first lower bridge switching tube of the first upper and lower bridge circuits, the second end of the first upper and lower bridge switching tube is grounded, the second end of the second lower bridge switching tube is grounded, the third output end of the first driving module is electrically connected with the second end of the first upper bridge switching tube, the first end of the first lower bridge switching tube is electrically connected with the first end of the second lower bridge switching tube, and the output end of the first upper and lower bridge circuits is electrically connected with the core power supply end of the controller.
4. The Intel CPU power supply compatible control system according to claim 3, wherein the first upper bridge switching tube, the first lower bridge switching tube and the second lower bridge switching tube are NMOS tubes, the control end of the first upper bridge switching tube, the control end of the first lower bridge switching tube and the control end of the second lower bridge switching tube are gates of the NMOS tubes, the first end of the first upper bridge switching tube, the first end of the first lower bridge switching tube and the first end of the second lower bridge switching tube are drains of the NMOS tubes, and the second end of the first upper bridge switching tube, the second end of the first lower bridge switching tube and the second end of the second lower bridge switching tube are sources of the NMOS tubes.
5. The Intel CPU power supply compatible control system of claim 3 wherein the CPU integrated graphics card power supply control circuit includes a second driver module and a second upper and lower bridge circuit;
the second output end of the PWM power chip control circuit is electrically connected with the input end of the second driving module, the first output end of the second driving module is electrically connected with the control end of the second upper bridge switching tube of the second upper and lower bridge circuits, the first end of the second upper bridge switching tube is grounded, the second output end of the second driving module is electrically connected with the control end of the third lower bridge switching tube of the second upper and lower bridge circuits and the control end of the fourth lower bridge switching tube of the second upper and lower bridge circuits, the second end of the third lower bridge switching tube is grounded, the third output end of the fourth lower bridge switching tube is grounded, the second end of the second driving module is electrically connected with the second end of the second upper bridge switching tube, the first end of the third lower bridge switching tube and the first end of the fourth lower bridge switching tube, and the output end of the second upper and lower bridge circuits is electrically connected with the display card power end of the controller.
6. The Intel CPU power supply compatible control system according to claim 5, wherein the second upper bridge switching tube, the third lower bridge switching tube and the fourth lower bridge switching tube are NMOS tubes, the control end of the second upper bridge switching tube, the control end of the third lower bridge switching tube and the control end of the fourth lower bridge switching tube are gates of the NMOS tubes, the first end of the second upper bridge switching tube, the first end of the third lower bridge switching tube and the first end of the fourth lower bridge switching tube are drains of the NMOS tubes, and the second end of the second upper bridge switching tube, the second end of the third lower bridge switching tube and the second end of the fourth lower bridge switching tube are sources of the NMOS tubes.
7. The Intel CPU power compatible control system of claim 5 wherein the first and second driver modules are chip model number RT9624F.
8. The Intel CPU powered compatible control system of claim 1 further comprising an early warning assembly having an input electrically coupled to an output of the controller.
9. An electronic computer comprising a computer body and an Intel CPU power supply compatible control system according to any one of claims 1 to 8, the Intel CPU power supply compatible control system being disposed inside the computer body.
CN202310323277.7A 2023-03-28 2023-03-28 Intel CPU power supply compatible control system and electronic computer thereof Pending CN116430972A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN119376514A (en) * 2024-12-27 2025-01-28 苏州元脑智能科技有限公司 A CPU power supply circuit, power supply method and main control chip

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN119376514A (en) * 2024-12-27 2025-01-28 苏州元脑智能科技有限公司 A CPU power supply circuit, power supply method and main control chip
CN119376514B (en) * 2024-12-27 2025-07-04 苏州元脑智能科技有限公司 A CPU power supply circuit, power supply method and main control chip

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