CN214151529U - Low-delay chip circuit and chip - Google Patents

Abstract

The utility model discloses a low time delay chip circuit, including compound way selector and connect respectively at the quick start-up route and the work route of two incoming ends of compound way selector, connect low pressure voltage stabilizing module on the output that connects of compound way selector, the work route includes band gap reference source module, low pass filter module and quick clamp module, and low pass filter module makes an uproar and exports to low pressure voltage stabilizing module to the reference voltage of band gap reference source module, and quick clamp module controls the time parameter of charging, discharging of low pass filter module, is connected with the counter on the band gap reference source module, and the signal incoming end of compound way selector is connected with the counter, and the quick start-up route or the work route of the selection of the compound way selector of counter control are connected; the utility model discloses a low time delay chip circuit, it is slow to solve the band gap reference source establishment among the prior art, leads to the chip to start slow and the poor life-span low problem of performance.

Description

Low-delay chip circuit and chip

Technical Field

The utility model belongs to the chip field, more specifically the utility model relates to a low time delay chip circuit and have chip of this low time delay chip circuit that says so

Background

Most electronic products need to support hot plug, and when the chip is powered on, the rising speed of the power supply outside the chip is very high due to the hot plug requirement. In the conventional power management design, such a high external power supply rising speed may cause that the internal power supply output stage power device has too high voltage resistance during the power-on process, thereby severely reducing the service life of the device and the chip.

In the prior art, a common means for solving the above technical problems is to use a bandgap reference source, when a chip is powered on, the rising speed of an external power supply can be as high as 5 μ s, and the bandgap reference source cannot be built within such a short time, so that the voltage difference across the bandgap reference source is large, and the service life of components of the bandgap reference source, that is, the performance and the service life of the chip are seriously affected.

SUMMERY OF THE UTILITY MODEL

An object of the utility model is to provide a low time delay chip circuit, it is slow to solve the band gap reference source establishment among the prior art, leads to the chip to start slow and the poor life-span low problem of performance.

The utility model provides a low time delay chip circuit, including compound route selector with connect respectively at the quick start route and the work route of two incoming ends of compound route selector, connect low pressure voltage stabilizing module on the output of connecing of compound route selector, the work route includes band gap reference source module, low pass filter module and quick clamp module, and low pass filter module falls and export to low pressure voltage stabilizing module to the reference voltage of band gap reference source module, quick clamp module control low pass filter module fill, discharge time parameter, be connected with the counter on the band gap reference source module, the signal incoming end and the counter of compound route selector are connected, and the quick start route or the work route of the compound route selector of counter control are selected and are connected into.

Preferably, the low-pass filtering module comprises a first PMOS transistor and a filtering capacitor, a source electrode of the first PMOS transistor is connected with the band-gap reference source module, a drain electrode of the first PMOS transistor is connected with the multiplexer, and one end of the filtering capacitor is connected with a drain electrode of the first PMOS transistor while the other end is grounded.

Preferably, the fast clamping module comprises a second PMOS transistor, a source electrode of the second PMOS transistor is connected with a source electrode of the first PMOS transistor, a grid electrode of the second PMOS transistor is connected with a grid electrode of the first PMOS transistor, and the grid electrode and a drain electrode of the second PMOS transistor are in short circuit and then used for being connected to the band-gap reference source module to enable the source electrode and the drain electrode of the second PMOS transistor to be in a conducting state.

Preferably, the fast start-up path includes a voltage dividing circuit, the voltage dividing circuit includes a first resistor and a second resistor connected in series, the first resistor is connected to the external power supply, the second resistor is grounded, and the first resistor is connected to the multiplexer.

Preferably, the multiplexer is a 2-to-1 multi-way selector.

A chip comprises a chip unit, and the low-delay chip circuit is integrated in the chip unit.

The utility model discloses technical scheme's a low time delay chip circuit's beneficial effect is: in the application of a chip power supply supporting hot plugging, a quick start path and a path resetting selector are added to generate temporary reference voltage and provide the temporary reference voltage for a low-voltage stabilizing module, so that the problem that a band-gap reference source module cannot provide reference voltage in a short time is solved. Meanwhile, the arrangement of the low-pass filtering module and the quick clamping module in the working channel can remove noise output by the band-gap reference source, reduce the power-on time of the low-voltage stabilizing module, enable the band-gap reference source module to be built and completed in a shorter time, realize normal work, prolong the service life of components in the band-gap reference source and ensure the performance and the service life of a chip.

Drawings

Fig. 1 is a schematic diagram of a low latency chip circuit according to the technical solution of the present invention.

Detailed Description

In order to facilitate the understanding of the technical solutions of the present invention by those skilled in the art, the technical solutions of the present invention will now be further described with reference to the drawings attached to the specification.

As shown in fig. 1, the utility model provides a low time delay chip circuit, including the multiple route selector 3 of 2 selection 1 multiple routes and connect respectively at the quick start route 1 and the working channel 2 of the two incoming ends of the multiple route selector 3. The output end of the multiplexer 3 is connected with a low-voltage stabilizing module 4, and the working channel 2 comprises a band-gap reference source module 6, a low-pass filtering module 7 and a quick clamping module 8. The low-pass filter module 7 performs noise reduction on the reference voltage of the band gap reference source module 6 and outputs the reference voltage to the low-voltage stabilizing module 4, and the rapid clamping module 8 controls the charging and discharging time parameters of the low-pass filter module 7. The band gap reference source module 6 is connected with a counter 9, a signal access end of the multiplexer 3 is connected with the counter 9, and the counter 9 controls the multiplexer 3 to select the quick starting channel 1 or the working channel 2 to be accessed.

Based on the above technical solution, the low pass filter module 7 mainly provides a channel for the band gap reference source module 6 to transmit the starting voltage to the low voltage regulator module 4, and the resistance of the low pass filter module 7 can be adjusted to switch between the low impedance state and the high impedance state, so that the low pass filter module 7 has an input end connected to the band gap reference source module 6, an output end connected to the low voltage regulator module 4, and a control end for receiving the output signal of the fast clamp module 8. The bandgap reference source module 6 further has another output terminal for providing a start-up control signal. When the low-pass filtering module 7 is in a low-resistance state, the low-pass filtering module 7 is equivalent to a state that a switch is switched on, so that the filtering capacitor C is rapidly charged, and the purpose of rapidly starting the low-voltage stabilizing module 4 is achieved; when the low-pass filter module 7 is in a high impedance state, the low-pass filter module 7 is equivalent to a large resistor and can form a first-order low-pass filter together with the filter capacitor C. The circuit structure can realize the quick start of the low-voltage stabilizing module 4 and can also serve as a low-pass filter, and the defect that the starting circuit of the existing low-voltage stabilizing module 4 adopts a large resistor is well overcome.

In the technical scheme, the low-pass filtering module 7 comprises a first PMOS transistor Q1 and a filtering capacitor C, the source of the first PMOS transistor Q1 is connected with the band-gap reference source module 6, the drain of the first PMOS transistor Q1 is connected with the multiplexer 3, one end of the filtering capacitor C is connected with the drain of the first PMOS transistor Q1, and the other end of the filtering capacitor C is grounded.

In the technical scheme, the fast clamping module 8 comprises a second PMOS transistor Q2, a source of the second PMOS transistor Q2 is connected with a source of the first PMOS transistor Q1, a gate of the second PMOS transistor Q2 is connected with a gate of the first PMOS transistor Q1, and a gate of the second PMOS transistor Q2 is in a short circuit with a drain and is used for being connected to the bandgap reference source module 6 to enable the source and the drain of the second PMOS transistor Q2 to be in a conducting state.

Based on the above technical solution, when the bandgap reference source module 6 provides a start control signal (nano-ampere level reference current) to the drain and gate of the second PMOS transistor Q2, and drives the first PMOS transistor Q1 to work in the linear region, but the transistor channel resistance of the first PMOS transistor Q1 working in the linear region is small and can only be used as a small resistor, the cut-off frequency of the first-order RC low-pass filter is very high and cannot filter low-frequency noise, at this time, the low-voltage regulator module 4 can be started, the start-up time is very short, but the function of filtering noise output by the bandgap reference source module 6 is not performed, when the gate of the second PMOS transistor Q2 is under the effect of the small current Iref, the source and drain of the second PMOS transistor Q2 are in a conducting state, the voltage between the source and drain of the second PMOS transistor Q2 is relatively close, so that the source and gate of the first PMOS transistor Q1 are relatively close, therefore, the first PMOS tube Q1 is enabled to work in a cut-off region and becomes a large resistor for use, so that the charging and discharging time parameters of the low-pass filter module 7 are increased, and the effect of filtering the noise output by the band-gap reference source module 6 can be achieved.

In this technical solution, the fast start circuit 1 includes a voltage dividing circuit 5, the voltage dividing circuit 5 includes a first resistor R1 and a second resistor R2 connected in series, the first resistor R1 is connected to an external power source, the second resistor R2 is grounded, and the first resistor R1 is connected to the multiplexer 3. The multiplexer 3 is a 2-to-1 multi-channel selector.

Based on the technical scheme, the first resistor R1 and the second resistor R2 are connected in series to divide voltage, after the first resistor R1 is connected with an external power supply, the voltage is divided by the second resistor R2, the specified stable voltage is rapidly output to the low-voltage stabilizing module 4, the low-voltage stabilizing module 4 is started, the chip is powered on to work, after a certain time, the band gap reference source module 6 is established, and after the counter 9 reaches the set time, the multi-path selector 3 is controlled to select the working path 2 to be connected with the low-voltage stabilizing module 4, the stable reference voltage generated by the band gap reference source module 6 is output to the low-voltage stabilizing module 4, and the chip is used for stabilizing voltage. The problem that the chip can not work normally before the band-gap reference source module 6 is not built is effectively avoided.

A chip comprises a chip unit, and the low-delay chip circuit is integrated in the chip unit. The chip has stable working performance and long service life.

The technical solution of the present invention is to provide an improved method for manufacturing a semiconductor device, which is characterized in that the method is not limited by the above-mentioned method, and the method is not substantially improved by the method and the device, or the method and the device are directly applied to other occasions without improvement, all within the protection scope of the present invention.

Claims (6)

1. A low-delay chip circuit is characterized by comprising a multiplexer, a quick start channel and a working channel, wherein the quick start channel and the working channel are respectively connected to two access ends of the multiplexer, a low-voltage stabilizing module is connected to an output end of the multiplexer, the working channel comprises a band gap reference source module, a low-pass filtering module and a quick clamping module, the low-pass filtering module is used for reducing noise of reference voltage of the band gap reference source module and outputting the reference voltage to the low-voltage stabilizing module, the quick clamping module is used for controlling charging and discharging time parameters of the low-pass filtering module, a counter is connected to the band gap reference source module, a signal access end of the multiplexer is connected with the counter, and the counter is used for controlling the multiplexer to select the quick start channel or the working channel to be accessed.

2. The low-delay chip circuit of claim 1, wherein the low-pass filter module comprises a first PMOS transistor and a filter capacitor, a source of the first PMOS transistor is connected to the bandgap reference source module, a drain of the first PMOS transistor is connected to the multiplexer, and one end of the filter capacitor is connected to the drain of the first PMOS transistor, and the other end of the filter capacitor is grounded.

3. The low-delay chip circuit of claim 1 or 2, wherein the fast clamping module comprises a second PMOS transistor, a source electrode of the second PMOS transistor is connected with a source electrode of the first PMOS transistor, a grid electrode of the second PMOS transistor is connected with a grid electrode of the first PMOS transistor, and the grid electrode and a drain electrode of the second PMOS transistor are in short circuit and then are used for being connected to the band-gap reference source module to enable the source electrode and the drain electrode of the second PMOS transistor to be in a conducting state.

4. The chip circuit of claim 1, wherein the fast start-up path comprises a voltage divider circuit, the voltage divider circuit comprises a first resistor and a second resistor connected in series, the first resistor is connected to an external power source, the second resistor is grounded, and the first resistor is connected to the multiplexer.

5. The low latency chip circuit of claim 1, wherein the multiplexer is a 2-to-1 multi-way multiplexer.

6. A chip comprising a chip unit, wherein the low latency chip circuit of any one of claims 1 to 5 is integrated in the chip unit.

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