CN214043686U - Back contact battery - Google Patents
Back contact battery Download PDFInfo
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- CN214043686U CN214043686U CN202023283894.XU CN202023283894U CN214043686U CN 214043686 U CN214043686 U CN 214043686U CN 202023283894 U CN202023283894 U CN 202023283894U CN 214043686 U CN214043686 U CN 214043686U
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- doping layer
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- silicon substrate
- back contact
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 41
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 41
- 239000010703 silicon Substances 0.000 claims abstract description 41
- 239000000758 substrate Substances 0.000 claims abstract description 37
- 229910052751 metal Inorganic materials 0.000 claims abstract description 7
- 239000002184 metal Substances 0.000 claims abstract description 7
- 238000002161 passivation Methods 0.000 claims description 18
- 229910052698 phosphorus Inorganic materials 0.000 claims description 8
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical group [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 7
- 239000011574 phosphorus Substances 0.000 claims description 7
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical group [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 5
- 229910052796 boron Inorganic materials 0.000 claims description 5
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 4
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims description 3
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 3
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 3
- 238000002955 isolation Methods 0.000 abstract description 7
- 230000002159 abnormal effect Effects 0.000 abstract description 2
- 239000010410 layer Substances 0.000 description 99
- 238000013461 design Methods 0.000 description 5
- 230000000694 effects Effects 0.000 description 5
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000009792 diffusion process Methods 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 239000000243 solution Substances 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 239000002131 composite material Substances 0.000 description 2
- 238000001465 metallisation Methods 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- 239000011241 protective layer Substances 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 238000011049 filling Methods 0.000 description 1
- 238000009501 film coating Methods 0.000 description 1
- 239000007888 film coating Substances 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000003754 machining Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 238000010248 power generation Methods 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 230000035484 reaction time Effects 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 238000005245 sintering Methods 0.000 description 1
- 238000004381 surface treatment Methods 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
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Abstract
The application provides a back contact battery, which comprises a silicon substrate and a metal electrode arranged on the back surface of the silicon substrate, wherein a first doping layer and a second doping layer which are arranged at intervals are formed on the back surface of the silicon substrate, the doping types of the first doping layer and the second doping layer are opposite, and the thickness of the first doping layer is smaller than that of the second doping layer; and a groove positioned between the adjacent first doping layer and the second doping layer is formed on the back surface of the silicon substrate in a recessed mode. The back contact battery is designed by distinguishing the first doping layer and the second doping layer with different doping types, and the groove is arranged between the adjacent first doping layer and the second doping layer for electrical isolation, so that the structure is simple, the abnormal leakage is effectively avoided, and the battery performance is improved.
Description
Technical Field
The application relates to the technical field of solar power generation, in particular to a back contact battery.
Background
With the rapid development of the photovoltaic industry, the domestic and foreign markets also put forward higher and higher demands on the conversion efficiency of the solar cell, which also promotes a plurality of manufacturers to actively research novel cell structures and production processes so as to obtain industrial advantages.
The back contact (IBC) cell is a solar cell in which P and N regions are arranged in a cross manner on the back surface of the cell, and has the greatest advantage of completely avoiding shielding of the front electrode of the cell from incident light, maximally utilizing the incident light, and increasing short-circuit current. When the P area is conducted with the N area, PN junction electric leakage and composite increase occur at corresponding positions; at present, a scheme of separating an emitter (P region) and a back field (N region) on the back surface of a battery is disclosed, but a corresponding doped layer can be permeated and expanded along the transverse direction in the preparation process, so that the isolation effect is difficult to control effectively, the P region and the N region are conducted abnormally, the filling factor is reduced, and the efficiency and the performance of the battery are reduced. Therefore, it is necessary to optimally design the structure of the back contact cell.
SUMMERY OF THE UTILITY MODEL
The back contact battery is simple in structure, can effectively overcome the electric leakage abnormity between doped layers of different types, and improves the battery performance.
In order to achieve the above object, the present application provides a back contact cell, including a silicon substrate and a metal electrode disposed on a back surface of the silicon substrate, wherein a first doped layer and a second doped layer are formed on the back surface of the silicon substrate at intervals, doping types of the first doped layer and the second doped layer are opposite, and a thickness of the first doped layer is smaller than a thickness of the second doped layer; and a groove positioned between the adjacent first doping layer and the second doping layer is formed on the back surface of the silicon substrate in a recessed mode.
As a further improvement of the embodiment of the application, the width of the groove is set to be 30-200 μm.
As a further improvement of the embodiment of the application, the depth of the groove is set to be 1-10 μm; and the depth of the groove is greater than the thickness of the second doped layer.
As a further improvement of the embodiment of the application, the thickness of the first doping layer is set to be 0.1-1 μm; the thickness of the second doping layer is set to be 0.5-2 mu m.
As a further improvement of the embodiment of the application, the silicon substrate is an N-type silicon wafer, and the resistivity of the silicon substrate is set to be 0.3-7 omega-cm; the second doped layer is a P-type doped layer.
As a further improvement of the embodiment of the present application, the first doped layer is a phosphorus doped layer; the second doped layer is a boron doped layer.
As a further improvement of the embodiment of the present application, the first doping layer has a plurality of first stripe regions, the second doping layer has a plurality of second stripe regions, the first stripe regions and the second stripe regions are alternately arranged in sequence, and the width of the first stripe regions is smaller than that of the second stripe regions.
As a further improvement of the embodiment of the present application, the back contact cell further includes a back passivation layer disposed on the back surface of the silicon substrate, the metal electrode passes through the back passivation layer and contacts with the silicon substrate, and a portion of the back passivation layer is filled in the trench; the back passivation layer comprises at least one of an aluminum oxide film, a silicon nitride film and a silicon carbide film.
The beneficial effect of this application is: by adopting the back contact battery, the design is distinguished through the thicknesses of the first doping layer and the second doping layer with different doping types, and the groove is arranged between the adjacent first doping layer and the second doping layer for electrical isolation, so that the abnormal leakage generated between the second doping layer and the first doping layer is effectively avoided, and the battery performance is improved.
Drawings
FIG. 1 is a schematic structural diagram of a preferred embodiment of a back contact cell of the present application;
fig. 2 is a schematic diagram of the back side structure of the back contact cell of the present application;
fig. 3 is a schematic structural diagram of another preferred embodiment of the back contact cell of the present application.
100-back contact cell; 1-a silicon substrate; 11-a first doped layer; 110-a first stripe region; 12-a second doped layer; 120-a second bar; 13-a trench; 14-front surface field layer; 2-back passivation layer; 3-an anti-reflection layer; 41-a first electrode; 42-second electrode.
Detailed Description
The present application will be described in detail below with reference to embodiments shown in the drawings. The present invention is not limited to the above embodiments, and structural, methodological, or functional changes made by one of ordinary skill in the art according to the present embodiments are included in the scope of the present invention.
Referring to fig. 1 and 2, a back contact cell 100 provided by the present application includes a silicon substrate 1, wherein a first doped layer 11 and a second doped layer 12 are formed on a back surface of the silicon substrate 1 at intervals, and doping types of the first doped layer 11 and the second doped layer 12 are opposite.
The thickness of the first doping layer 11 is smaller than that of the second doping layer 12; a trench 13 located between the adjacent first doping layer 11 and the second doping layer 12 is further formed on the back surface of the silicon substrate 1 in a recessed manner, and the depth of the trench 13 is greater than the thickness of the second doping layer 12, so that effective electrical isolation between the two layers is realized.
In the embodiment, the silicon substrate 1 is an N-type silicon wafer, the resistivity of the silicon substrate 1 is set to be 0.3-7 omega-cm, and the thickness of the silicon wafer is 50-300 mu m; the first doped layer 11 is an N-type doped layer, the second doped layer 12 is a P-type doped layer, and the first doped layer 11 and the second doped layer 12 are respectively used as a field passivation region and an emitter region. And, a front surface field layer 14 is further formed on the front surface of the silicon substrate 1, and the front surface field layer 14 is used for improving front surface passivation performance. Here, the first doping layer 11 and the front surface field layer 14 are both phosphorus doping layers, and the doping concentration of the front surface field layer 14 is less than that of the first doping layer 11 and the front surface field layer 14The doping concentration of the first doping layer 11 is preferably 1E 21-3E 21cm-3(ii) a The second doped layer 12 is a boron doped layer, and the doping concentration of the second doped layer 12 is preferably 1E 19-3E 19cm-3。
The depth of the groove 13 is set to be 1-10 mu m; the thickness of the first doped layer 11 is set to be 0.1-1 μm, and the thickness of the second doped layer 12 is set to be 0.5-2 μm. The thicknesses, i.e., junction depths, of the first doped layer 11 and the second doped layer 12 can be adjusted by the process parameters of the doping source concentration, the reaction temperature and the time, and can also be etched and thinned after doping. Illustratively, the thickness of the first doped layer 11 is set to 0.1 μm, 0.3 μm, 0.5 μm, 0.8 μm, or 1 μm; the thickness of the second doped layer 12 is set to 0.5 μm, 1 μm, 1.5 μm, or 2 μm.
Too small width of the trench 13 may affect the electrical isolation effect between the adjacent first doped layer 11 and the second doped layer 12, increase the processing difficulty of the trench 13, and also make the subsequent film deposition at the trench 13 difficult and the passivation effect poor; on the other hand, too large a width of the trench 13 affects an area ratio of an emission region, reducing carrier collection efficiency. Here, the width d of the groove 13 is preferably set to 30 to 200 μm, for example, the width of the groove 13 is set to 30 μm, 50 μm, 80 μm or 150 μm.
The first doped layer 11 includes a plurality of first stripe regions 110, the second doped layer 12 includes a plurality of second stripe regions 120, and the first stripe regions 110 and the second stripe regions 120 are alternately arranged in sequence. Generally, the width of the first stripe region 110 is set smaller than the width of the second stripe region 120. It should be noted that the first stripe region 110, the second stripe region 120 and the trench 13 shown in fig. 2 do not directly indicate the proportional relationship among the three, but only describe the related structure more clearly.
The back contact cell 100 further includes a back passivation layer 2 disposed on the back surface of the silicon substrate 1, an anti-reflection layer 3 disposed on the front surface field layer 14, and a metal electrode penetrating the back passivation layer 3 and contacting the silicon substrate 1.
The back passivation layer 2 comprises at least one of an aluminum oxide film, a silicon nitride film and a silicon carbide film. Antireflection layer 3 can adopt silicon nitride film usually, and thickness sets up to 70 ~ 100nm, and accessible gas flow, reaction time, temperature and other technological parameters's regulation improves antireflection layer 3's rete performance and antireflection effect. The back passivation layer 2 and the antireflection layer 3 can be set into a composite film or a gradient film according to actual product requirements. The metal electrodes include a first electrode 41 in contact with the first doped layer 11 and a second electrode 42 in contact with the second doped layer 12, and the first electrode 41 and the second electrode 42 are obtained by screen printing and sintering a predetermined conductive paste, and the conductive pastes used in the first electrode 41 and the second electrode 42 may be the same or different.
Fig. 3 shows another embodiment of the present application, which is different from the previous embodiment in that: the grooves 13 are arranged in a trapezoidal shape. Through the design, the groove 13 can be cleaned more effectively in the machining process, the dielectric material can be ensured to be deposited in the groove 13 smoothly in the subsequent back passivation layer 2 deposition process, and the passivation performance and the electrical isolation effect of the groove 13 are ensured.
The preparation process of the back contact battery 100 mainly comprises the following steps: firstly, carrying out surface treatment on a silicon substrate 1, and then carrying out front surface diffusion on the silicon substrate 1 to form a front surface field layer 14; locally printing phosphorus paste on the back surface of the silicon substrate 1, then performing boron diffusion, forming a phosphorus doped layer in a region printed with the phosphorus paste, and forming a boron diffusion layer in a region not printed with the phosphorus paste; and performing laser grooving on the back surface of the silicon substrate 1, and etching to form the trench 13, wherein the first doping layer 11 and the second doping layer 12 are formed on two sides of the trench 13. And finally, sequentially carrying out surface cleaning, film coating and metallization on the silicon substrate 1 to obtain the corresponding back contact cell 100. Of course, according to the product requirements, the back contact battery 100 which completes the metallization process can be tested and classified; the back contact cell 100 may also be subjected to photo-electric injection treatment, so as to reduce internal defects and reduce subsequent attenuation, which is not described in detail herein.
Before the silicon substrate 1 is subjected to laser grooving, a protective layer needs to be prepared on the back surface of the silicon substrate 1, so that the first doping layer 11 and the second doping layer 12 are prevented from being damaged in the subsequent etching process. As an example, the protective layer can adopt a silicon oxide film, and the thickness of the silicon oxide film is set to be 10-200 μm; the wavelength of the laser can be set to be 280-1000 nm, for example, laser beams with the wavelengths of 355nm, 515nm, 532nm and the like are adopted for carrying out the grooving; the etching is wet etching of the laser grooving position by using a KOH or NaOH solution, and a corresponding groove 13 is formed.
To sum up, the back contact battery 100 of the present application distinguishes the design through the first doping layer 11 and the second doping layer 12 to the silicon substrate 1 back, and sets up the slot 13 between the adjacent first doping layer 11 and the second doping layer 12 to carry out the electrical isolation, and structural design is more succinct reasonable to can effectively avoid producing the electric leakage between second doping layer 12 and the first doping layer 11 unusual, improve the battery performance.
It should be understood that although the present description refers to embodiments, not every embodiment contains only a single technical solution, and such description is for clarity only, and those skilled in the art should make the description as a whole, and the technical solutions in the embodiments can also be combined appropriately to form other embodiments understood by those skilled in the art.
The above list of details is only for the concrete description of the feasible embodiments of the present application, they are not intended to limit the scope of the present application, and all equivalent embodiments or modifications that do not depart from the technical spirit of the present application are intended to be included within the scope of the present application.
Claims (8)
1. A back contact battery comprises a silicon substrate and a metal electrode arranged on the back surface of the silicon substrate, and is characterized in that: a first doping layer and a second doping layer which are arranged at intervals are formed on the back surface of the silicon substrate, the doping types of the first doping layer and the second doping layer are opposite, and the thickness of the first doping layer is smaller than that of the second doping layer; and a groove positioned between the adjacent first doping layer and the second doping layer is formed on the back surface of the silicon substrate in a recessed mode.
2. The back contact battery of claim 1, wherein: the width of the groove is set to be 30-200 mu m.
3. The back contact battery of claim 1, wherein: the depth of the groove is set to be 1-10 mu m; and the depth of the groove is greater than the thickness of the second doped layer.
4. The back contact battery of claim 1 or 3, wherein: the thickness of the first doping layer is set to be 0.1-1 mu m; the thickness of the second doping layer is set to be 0.5-2 mu m.
5. The back contact battery of claim 1, wherein: the silicon substrate is an N-type silicon wafer, and the resistivity of the silicon substrate is set to be 0.3-7 omega cm; the second doped layer is a P-type doped layer.
6. The back contact battery of claim 1 or 5, wherein: the first doping layer is a phosphorus doping layer; the second doped layer is a boron doped layer.
7. The back contact battery of claim 1, wherein: the first doping layer is provided with a plurality of first strip-shaped regions, the second doping layer is provided with a plurality of second strip-shaped regions, the first strip-shaped regions and the second strip-shaped regions are sequentially and alternately arranged, and the width of the first strip-shaped regions is smaller than that of the second strip-shaped regions.
8. The back contact battery of claim 1, wherein: the back contact cell also comprises a back passivation layer arranged on the back surface of the silicon substrate, the metal electrode penetrates through the back passivation layer and is in contact with the silicon substrate, and part of the back passivation layer is filled in the groove; the back passivation layer comprises at least one of an aluminum oxide film, a silicon nitride film and a silicon carbide film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202023283894.XU CN214043686U (en) | 2020-12-30 | 2020-12-30 | Back contact battery |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202023283894.XU CN214043686U (en) | 2020-12-30 | 2020-12-30 | Back contact battery |
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| Publication Number | Publication Date |
|---|---|
| CN214043686U true CN214043686U (en) | 2021-08-24 |
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|---|---|---|---|
| CN202023283894.XU Active CN214043686U (en) | 2020-12-30 | 2020-12-30 | Back contact battery |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116864551A (en) * | 2023-09-05 | 2023-10-10 | 天合光能股份有限公司 | Solar cell and preparation method thereof |
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2020
- 2020-12-30 CN CN202023283894.XU patent/CN214043686U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116864551A (en) * | 2023-09-05 | 2023-10-10 | 天合光能股份有限公司 | Solar cell and preparation method thereof |
| CN116864551B (en) * | 2023-09-05 | 2024-02-09 | 天合光能股份有限公司 | Solar cell and preparation method thereof |
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