CN213990485U - Isolation driving circuit and power tube driving system - Google Patents
Isolation driving circuit and power tube driving system Download PDFInfo
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- CN213990485U CN213990485U CN202023055517.0U CN202023055517U CN213990485U CN 213990485 U CN213990485 U CN 213990485U CN 202023055517 U CN202023055517 U CN 202023055517U CN 213990485 U CN213990485 U CN 213990485U
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Abstract
The utility model provides an isolation driving circuit and a power tube driving system, wherein the isolation driving circuit comprises a modulation circuit, an isolation circuit and a demodulation circuit which are connected in sequence; receiving an input signal by the modulation circuit, modulating the input signal when the rising edge and the falling edge of the input signal are triggered, and outputting a modulation signal with a preset period; transmitting, by the isolation circuit, the modulated signal to the demodulation circuit in isolation; and demodulating the modulation signal by the demodulation circuit to obtain a restored input signal. The utility model discloses a when the modulation circuit at the sending end modulates, only export and predetermine periodic modulation signal, keep apart the transmission back by demodulation circuit reduction through buffer circuit, avoided long-time output modulation signal, reduced the circuit consumption.
Description
Technical Field
The utility model relates to an keep apart the drive field, in particular to keep apart drive circuit and power tube actuating system.
Background
The driving technology of power devices such as IGBT, SiC, GaN and the like is the key of the application of the power semiconductor device, and plays a decisive role in the reliability, efficiency and cost of the power semiconductor device. In many applications, considering the electrical safety problem, an isolation driving circuit is needed, and the isolation driving circuit is divided into three parts, namely a transmitting end, a receiving end and an isolation device. The input signal (driving or control signal, etc.) is modulated at the transmitting end. After passing through the isolation device, the isolation signal needs to be received and recovered at the receiving end.
In the prior art, in an input signal modulation circuit, an input signal is modulated by a high-frequency signal and then transmitted from a transmitting end to a receiving end through an isolation device.
Thus, the prior art has yet to be improved and enhanced.
SUMMERY OF THE UTILITY MODEL
In view of the foregoing prior art's weak point, the utility model aims to provide an keep apart drive circuit and power tube actuating system, when modulating through the modulation circuit at the sending end, only export and predetermine periodic modulation signal, keep apart the transmission back by demodulation circuit reduction through isolation circuit, avoided long-time output modulation signal, reduced the circuit consumption.
In order to achieve the purpose, the utility model adopts the following technical proposal:
the utility model provides an isolation driving circuit, which comprises a modulation circuit, an isolation circuit and a demodulation circuit which are connected in sequence; receiving an input signal by the modulation circuit, modulating the input signal when the rising edge and the falling edge of the input signal are triggered, and outputting a modulation signal with a preset period; transmitting, by the isolation circuit, the modulated signal to the demodulation circuit in isolation; and demodulating the modulation signal by the demodulation circuit to obtain a restored input signal.
The modulation circuit includes:
the input processing circuit is used for receiving an input signal and converting the input signal into a driving signal;
the high-frequency oscillation circuit is used for outputting a corresponding oscillation signal according to the driving signal;
the switching circuit is used for carrying out switching modulation on the oscillation signal to obtain a modulation signal with a preset period;
the input processing circuit, the high-frequency oscillator, the switch circuit and the isolation circuit are connected in sequence.
The input processing circuit comprises a first buffer and a first inverter, and the first buffer outputs a first driving signal to the high-frequency oscillation circuit when an input signal is at a high level; and outputting a second driving signal to the high-frequency oscillation circuit by the first inverter when the input signal is at a low level.
The high-frequency oscillation circuit includes a first high-frequency oscillator and a second high-frequency oscillator, receives the first drive signal by the first high-frequency oscillator, and outputs a first oscillation signal to the switch circuit; and receiving the second driving signal by the second high-frequency oscillator and outputting a second oscillating signal to the switch circuit.
The switching circuit comprises a first switch, a first counter, a second switch and a second counter; and respectively outputting a first pulse signal and a second pulse signal with preset periods to a control end of the first switch and a control end of the second switch by the first counter and the second counter, respectively performing switch modulation on the first driving signal and the second driving signal, and respectively outputting a first modulation signal and a second modulation signal to the isolation circuit by the first switch and the second switch.
The isolation circuit includes:
the first isolation unit is connected with the first switch and used for transmitting the first modulation signal to the demodulation circuit in an isolation manner;
and the second isolation unit is connected with the second switch and used for transmitting the second modulation signal to the demodulation circuit in an isolation manner.
The first isolation unit comprises a first capacitor, one end of the first capacitor is connected with the output end of the first switch and the input end of the demodulation circuit; or, the first isolation unit comprises a second buffer, a second phase inverter, a third phase inverter, a fourth phase inverter, a second capacitor and a third capacitor, the input end of the second buffer is connected with the output end of the first switch, the output end of the second buffer is respectively connected with the input end of the second phase inverter and the input end of the third phase inverter, the output end of the third phase inverter is connected with the input end of the fourth phase inverter, the output end of the fourth phase inverter is connected with one end of the second capacitor, the other end of the second capacitor is connected with the input end of the demodulation circuit, the output end of the second phase inverter is connected with one end of the third capacitor, and the other end of the third capacitor is connected with the input end of the demodulation circuit.
The second isolation unit comprises a fourth capacitor, and one end of the fourth capacitor is connected with the output end of the second switch and the input end of the demodulation circuit; or, the second isolation unit includes a third buffer, a fifth inverter, a sixth inverter, a seventh inverter, a fifth capacitor, and a sixth capacitor, where an input end of the third buffer is connected to an output end of the second switch, an output end of the third buffer is connected to the input ends of the fifth and sixth inverters, an output end of the sixth inverter is connected to an input end of the seventh inverter, an output end of the seventh inverter is connected to one end of the fifth capacitor, the other end of the fifth capacitor is connected to an input end of the demodulation circuit, an output end of the fifth inverter is connected to one end of the sixth capacitor, and the other end of the third capacitor is connected to an input end of the demodulation circuit.
The demodulation circuit comprises a first comparator, a second comparator and a trigger, wherein the positive phase input end of the first comparator is connected with the first isolation unit, the positive phase input end of the second comparator is connected with the second isolation unit, the negative phase input end of the first comparator is connected with a reference signal or is connected with the first isolation unit, the negative phase input end of the second comparator is connected with the reference signal or is connected with the second isolation unit, the output end of the first comparator and the output end of the second comparator are respectively connected with the reset end and the reset end of the trigger or respectively connected with the reset end and the set end of the trigger, and the first output end or the second output end of the trigger outputs a restored input signal.
A power tube driving system is characterized by comprising a power tube and the isolation driving circuit, wherein the isolation driving circuit is connected with a control end of the power tube.
Compared with the prior art, the utility model provides an isolation drive circuit and power tube driving system, isolation drive circuit includes modulation circuit, isolation circuit and the demodulation circuit who connects gradually; receiving an input signal by the modulation circuit, modulating the input signal when the rising edge and the falling edge of the input signal are triggered, and outputting a modulation signal with a preset period; transmitting, by the isolation circuit, the modulated signal to the demodulation circuit in isolation; and demodulating the modulation signal by the demodulation circuit to obtain a restored input signal. The utility model discloses a when the modulation circuit at the sending end modulates, only export and predetermine periodic modulation signal, keep apart the transmission back by demodulation circuit reduction through buffer circuit, avoided long-time output modulation signal, reduced the circuit consumption.
Drawings
Fig. 1 is a block diagram of an isolation driving circuit provided by the present invention;
fig. 2 is a block diagram of a modulation circuit provided by the present invention;
fig. 3 is a schematic circuit diagram of a first embodiment of the isolation driving circuit according to the present invention;
fig. 4 is a schematic circuit diagram of a second embodiment of the isolation driving circuit provided by the present invention.
Detailed Description
The utility model provides an keep apart drive circuit and power tube actuating system, when modulating through the modulation circuit at the sending terminal, only export and predetermine periodic modulation signal, keep apart the transmission back by demodulation circuit through buffer circuit, avoided long-time output modulation signal, reduced the circuit consumption.
The present invention is described in more detail in order to facilitate the explanation of the technical idea, the technical problem solved, the technical features of the technical solution, and the technical effects brought by the present invention. The embodiments are explained below, but the scope of the present invention is not limited thereto. Further, the technical features of the embodiments described below may be combined with each other as long as they do not conflict with each other.
For the convenience of understanding the embodiments of the present application, relevant elements related to the embodiments of the present application will be described first.
Insulated Gate Bipolar Transistors (IGBTs) are currently the mainstream power semiconductor transistors, and meanwhile, silicon carbide (SiC) and gallium nitride (GaN) transistors are gradually applied in large scale, and these kinds of power devices have a series of excellent characteristics such as high voltage, high input impedance, high switching speed, and small switching power, and are widely applied in the fields of switching power supplies, frequency converters, inverters, induction heating, active filters, air conditioners, electric vehicles, and the like.
In the existing scheme for carrying out isolation control on a power tube, when a signal modulation circuit is input, an input signal is modulated by a high-frequency signal and then transmitted to a receiving end from a transmitting end through an isolation device.
In view of the above problems in the prior art, referring to fig. 1, the present invention provides an isolation driving circuit, which includes a modulation circuit 100, an isolation circuit 200, and a demodulation circuit 300 connected in sequence; receiving an input signal IN by the modulation circuit 100, modulating the input signal IN when a high level and a low level of the input signal IN are triggered, and outputting a modulation signal with a preset period; transmitting the modulated signal to the demodulation circuit by the isolation circuit 200 in isolation; the modulated signal is demodulated by the demodulation circuit 300 to obtain a restored input signal (OUT).
IN specific implementation, IN this embodiment, the modulation circuit 100 performs corresponding modulation according to the level of the received input signal IN, outputs modulation signals with a preset period to modulate the input signal IN when a high-level rising edge of the input signal IN is triggered and a low-level falling edge of the input signal IN is triggered, respectively, obtains a modulation signal, outputs the modulation signal through the isolation circuit 200, demodulates the modulation signal through the demodulation circuit 300, restores the modulation signal to the input signal IN, outputs the input signal IN to the power tube, and performs drive control on the power tube. IN the embodiment, the input signal IN is modulated only at the triggering time of the rising edge and the falling edge for a preset period, the signal output of the modulation circuit 100 is stopped after the modulation is completed, and finally the modulation is restored by the demodulation circuit 300 without modulating the whole high level period of the input signal IN, so that the modulation signal is prevented from being output for a long time, and the power consumption of the circuit is reduced.
Further, referring to fig. 2, the modulation circuit 100 includes: an input processing circuit 110 for receiving an input signal IN and converting it into a driving signal; a high frequency oscillation circuit 120 for outputting a corresponding oscillation signal according to the driving signal; a switching circuit 130 for performing switching modulation on the oscillation signal to obtain a modulation signal with a preset period; the input processing circuit 110, the high frequency oscillator, the switching circuit 130 and the isolation circuit 200 are connected in sequence.
IN specific implementation, IN this embodiment, the high-frequency oscillation circuit 120 is set to be enabled at a high level, performs different conversions according to a high level and a low level of the input signal IN, and outputs the high level to the high-frequency oscillation circuit 120 for driving when a rising edge of the high level of the input signal IN comes; when the low-level falling edge of the input signal IN comes, the low level is converted into the high level and then output to the high-frequency oscillation circuit 120 for driving, so that no matter the input signal IN is the high level or the low level, the enable can be provided for the high-frequency oscillation circuit 120. The switching circuit 130 is configured to control a working state of the high-frequency oscillation circuit 120, and when a rising edge and a falling edge of the input signal IN are triggered, the switching circuit 130 outputs a pulse signal with a preset period to perform switching modulation on the oscillation signal, so as to obtain a modulation signal with the preset period, and output the modulation signal to the isolation circuit 200.
Specifically, referring to fig. 2 and fig. 3, the input processing circuit 110 includes a first buffer 111 and a first inverter 112, and the first buffer 111 outputs a first driving signal to the high-frequency oscillating circuit 120 when the input signal IN is at a high level; the first inverter 112 outputs a second driving signal to the high frequency oscillating circuit 120 when the input signal IN is at a low level.
IN this embodiment, when the input signal IN is at a high level, the first buffer 111 directly outputs the high level to the high frequency oscillating circuit 120, and the first inverter 112 converts the high level into a low level and outputs the low level to the high frequency oscillating circuit 120. Since the high-frequency oscillation circuit 120 is enabled at a high level, the high-frequency oscillation circuit 120 cannot be driven at a low level, and when the input signal IN is at a low level, the first inverter 112 converts the low level to a high level to enable the high-frequency oscillation circuit 120. Therefore, the high frequency oscillation circuit 120 is enabled by the first buffer 111 when the input signal IN is high level, and the high frequency oscillation circuit 120 is enabled by the first inverter 112 when the input signal IN is low level.
Specifically, referring to fig. 3, the high-frequency oscillating circuit 120 includes a first high-frequency oscillator 121 and a second high-frequency oscillator 122, and the first high-frequency oscillator 121 receives the first driving signal and outputs a first oscillating signal to the switching circuit 130; the second high frequency oscillator 122 receives the second driving signal and outputs a second oscillating signal to the switching circuit 130.
IN this embodiment, the first high-frequency oscillator 121 receives the first driving signal output from the first buffer 111, and the level state of the first driving signal coincides with the input signal IN. The second high frequency oscillator 122 receives a second driving signal output from the first inverter 112, the level state of which is opposite to the input signal IN. The first and second driving signals enable the first and second high- frequency oscillators 121 and 122 to output the first and second oscillation signals, respectively, at a high level, thereby enabling the oscillation signals to be generated regardless of whether the input signal IN is at a high level or a low level.
Specifically, with continued reference to fig. 3, the switch circuit 130 includes a first switch K1, a first counter 131, a second switch K2, and a second counter 132; an input end (a 1 st end of K1 in fig. 3) of the first switch is connected to an output end of the first high-frequency oscillator 121, the first counter 131 and the second counter 132 output a first pulse signal and a second pulse signal with a preset period to a control end (a 3 rd end of K1 in fig. 3) of the first switch K1 and a control end (a 3 rd end of K2 in fig. 3) of the second switch K2, respectively, the first drive signal and the second drive signal are subjected to switching modulation, and the first switch K1 and the second switch K2 output a first modulation signal and a second modulation signal to the isolation circuit 200.
IN this embodiment, the first switch K1 and the first counter 131 are configured to modulate a first oscillation signal, and when the input signal IN is triggered by a high-level rising edge, the first high-frequency oscillator 121 outputs the first oscillation signal; at this time, the first counter 131 also receives the trigger signal of the rising edge, and further outputs a first pulse signal of a preset period to the first switch K1, and the first switch K1 performs switching modulation according to the first pulse signal, modulates the first oscillation signal into a first modulation signal with the same period number as the first pulse signal, and outputs the first modulation signal to the isolation circuit 200. Similarly, when the input signal IN is at a low level, the second counter 132 receives the trigger signal of the falling edge, and outputs a second pulse signal to perform on-off modulation on the second oscillation signal, so as to obtain a second modulation signal, and output the second modulation signal to the isolation circuit 200.
Further, with continued reference to fig. 1 and 3, the isolation circuit 200 includes: a first isolation unit 201 connected to the first switch K1 for isolating and transmitting the first modulated signal to the demodulation circuit 300; and is connected to the second switch K2 for transmitting the second modulated signal to the second isolation unit 202 of the demodulation circuit 300 in an isolated manner. In this embodiment, the first isolation unit 201 isolates the first modulated signal from being transmitted to the demodulation circuit 300 for demodulation, and the second isolation unit 202 isolates the second modulated signal from being transmitted to the demodulation circuit 300 for demodulation; the low-voltage circuit of the rear stage is prevented from being damaged by the high-voltage circuit of the front stage.
Example one
Specifically, referring to fig. 3, the first isolation unit 201 includes a first capacitor C1, and one end of the first capacitor C1 is connected to the output terminal of the first switch K1 and the input terminal of the demodulation circuit 300. The first capacitor C1 receives the front-stage voltage, and outputs the front-stage voltage to a rear-stage circuit after charging is completed, so that isolated transmission is completed. By discharging, the first capacitor C1 converts the first modulation signal into a first spike signal and outputs the first spike signal to the demodulation circuit 300.
Further, with reference to fig. 3, the second isolation unit 202 includes a fourth capacitor C4, and one end of the fourth capacitor C4 is connected to the output terminal of the second switch K2 and the input terminal of the demodulation circuit 300. Similarly, the fourth capacitor C4 converts the second modulation signal into a second spike signal, and outputs the second spike signal to the demodulation circuit 300.
It should be noted that the first isolation unit 201 and the second isolation unit 202 may also be implemented by other circuits, such as an optical coupler, an optical relay, and a transformer.
Specifically, please refer to fig. 3 continuously, the demodulation circuit 300 includes a first comparator 301, a second comparator 302 and a flip-flop 303, a positive input terminal of the first comparator 301 is connected to the first isolation unit 201, a positive input terminal of the second comparator 302 is connected to the second isolation unit 202, an inverting input terminal of the first comparator 301 and an inverting input terminal of the second comparator 302 are both connected to a reference signal, an output terminal of the first comparator 301 and an output terminal of the second comparator 302 are respectively connected to a set terminal and a reset terminal of the flip-flop 303 or respectively connected to a reset terminal and a set terminal of the flip-flop 303, and a first output terminal or a second output terminal of the flip-flop 303 outputs a restored input signal (OUT).
Specifically, in this embodiment, the non-inverting input terminal of the first comparator 301 is connected to the first spike signal and compares the first spike signal with a reference signal, when the voltage of the first spike signal is higher than the reference voltage, the first comparator 301 outputs a high level to the set terminal of the flip-flop 303, the reset terminal of the flip-flop 303 is enabled, and the output terminal of the flip-flop 303 outputs a high level signal. The non-inverting input terminal of the second comparator 302 is connected to the second spike signal and compares the second spike signal with the reference signal, when the voltage of the second spike signal is higher than the reference voltage, the set terminal of the flip-flop 303 is enabled, and the first output terminal (flip-flop) of the flip-flop 303 is enabled
Terminal) outputs a low level. Since the modulation circuit 100 divides the high level and the low level of the input signal IN into two paths for modulation, respectively, only one of the set terminal and the reset terminal of the flip-flop 303 receives the signal at the same time; when the trigger 303 receives the first spike signal, the first output end of the trigger 303 restores a high level signal of the input signal IN, and when the trigger 303 receives the second spike signal, the first output end of the trigger 303 restores a low level signal of the input signal IN to finally obtain a restored input signal OUT, so as to drive the power tube. In this embodiment, through the memory function of the flip-flop 303, the current state can be stored, and as long as the trigger state of the set terminal or the reset terminal is not changed, the current output state is always maintained for outputting, so that the flip-flop 303 can output the first spike signal based on the preset periodAnd the second spike restores the complete input signal.
It should be noted that, the first comparator 301 may be connected to the reset terminal of the flip-flop 303, and the second comparator 302 is connected to the set terminal of the flip-flop 303, and then outputs the restored input signal (OUT) through a second output terminal (the Q terminal of the flip-flop). In addition, the demodulation circuit can also be realized by other circuits, such as an alternative scheme of replacing a trigger by a two-way signal recovery circuit, and the like.
Example two
Optionally, referring to fig. 4, the first isolation unit 210 includes a second buffer 211, a second inverter 212, a third inverter 213, a fourth inverter 214, a second capacitor C2, and a third capacitor C3, the input end of the second buffer 211 is connected to the output end of the first switch, the output end of the second buffer 211 is respectively connected to the input end of the second inverter 212 and the input end of the third inverter 213, the output of the third inverter 213 is connected to the input of the fourth inverter 214, an output terminal of the fourth inverter 214 is connected to one terminal of the second capacitor C2, the other terminal of the second capacitor C2 is connected to an input terminal of the demodulation circuit, the output end of the second inverter 212 is connected to one end of the third capacitor C3, and the other end of the third capacitor C3 is connected to the input end of the demodulation circuit.
In specific implementation, in this embodiment, the second buffer 211 receives modulation signals triggered by a rising edge and respectively outputs the modulation signals to the second inverter 212 and the third inverter 213, the modulation signals are firstly inverted by the second inverter 212 and then output to the second capacitor C2, and the modulation signals are isolated by the second capacitor C2 and transmitted to the input terminal of the demodulation circuit; next, after the third inverter 213 inverts the modulation signal, the modulation signal is output to the fourth inverter 214, inverted by the fourth inverter 214, and output to the third capacitor C3, and output to the input terminal of the demodulation circuit by the third capacitor C3. In the embodiment, the modulation signal triggered by the rising edge is divided into two paths to be processed and respectively transmitted to the demodulation circuit, so that differential transmission of the modulation signal triggered by the rising edge is realized.
Optionally, the second isolation unit 220 includes a third buffer 221, a fifth inverter 222, a sixth inverter 223, a seventh inverter 224, a fifth capacitor C5, and a sixth capacitor C6, an input end of the third buffer 221 is connected to the output end of the second switch, an output end of the third buffer 221 is connected to an input end of the fifth inverter 222 and an input end of the sixth inverter 223, an output end of the sixth inverter 223 is connected to an input end of the seventh inverter 224, an output end of the seventh inverter 224 is connected to one end of the fifth capacitor C5, the other end of the fifth capacitor C5 is connected to the input end of the demodulation circuit, an output end of the fifth inverter 222 is connected to one end of the sixth capacitor C6, and the other end of the third capacitor C3 is connected to the input end of the demodulation circuit.
In specific implementation, in this embodiment, the third buffer 221 receives the modulation signal and outputs the modulation signal to the fifth inverter 222 and the sixth inverter 223, the modulation signal is firstly inverted by the fifth inverter 222 and then output to the fifth capacitor C5, and the modulation signal is isolated by the fifth capacitor C5 and transmitted to the input terminal of the demodulation circuit; next, after the sixth inverter 223 inverts the modulation signal, the seventh inverter 224 is outputted, the seventh inverter 224 inverts the modulation signal and outputs the inverted modulation signal to the sixth capacitor C6, and the sixth capacitor C6 outputs the inverted modulation signal to the input terminal of the demodulation circuit. In the embodiment, the modulation signal triggered by the falling edge is divided into two paths to be processed and respectively transmitted to the demodulation circuit, so that differential transmission of the modulation signal triggered by the falling edge is realized.
The demodulation circuit comprises a first comparator 301, a second comparator 302 and a trigger 303, wherein a positive phase input end of the first comparator 301 is connected with the first isolation unit 210, a positive phase input end of the second comparator 302 is connected with the second isolation unit 220, an inverse phase input end of the first comparator 301 is connected with the first isolation unit 210, an inverse phase input end of the second comparator 302 is connected with the second isolation unit 220, an output end of the first comparator 301 and an output end of the second comparator 302 are respectively connected with a setting end and a resetting end of the trigger 303 or respectively connected with a resetting end and a setting end of the trigger 303, and a first output end or a second output end of the trigger 303 outputs a restored input signal.
Specifically, in this embodiment, the non-inverting input terminal of the first comparator 301 is connected to the other terminal of the second capacitor C2, the inverting input terminal of the first comparator 301 is connected to the other terminal of the third capacitor C3, the non-inverting input terminal of the second comparator 302 is connected to the other terminal of the fifth capacitor C5, and the inverting input terminal of the second comparator 302 is connected to the other terminal of the sixth capacitor C6. The first comparator 301 compares the modulation signal at the non-inverting input terminal with the modulation signal at the inverting input terminal, and resynthesizes the modulation signal triggered by the rising edge to output to the S terminal of the flip-flop 303; the modulation signals triggered by the falling edge are synthesized again by the second comparator 302 and output to the R terminal of the flip-flop 303, and finally, the restored input signal is obtained by the flip-flop 303.
Based on foretell keep apart drive circuit, the utility model discloses still provide a power tube actuating system, a serial communication port, including power tube and the above keep apart drive circuit, keep apart drive circuit with the control end of power tube is connected.
In summary, the utility model provides an isolation driving circuit and power tube driving system, the isolation driving circuit includes a modulation circuit, an isolation circuit and a demodulation circuit which are connected in sequence; receiving an input signal by the modulation circuit, modulating the input signal when the high level and the low level of the input signal are triggered, and outputting a modulation signal with a preset period; transmitting, by the isolation circuit, the modulated signal to the demodulation circuit in isolation; and demodulating the modulation signal by the demodulation circuit to obtain a restored input signal. The utility model discloses a when the modulation circuit at the sending end modulates, only export and predetermine periodic modulation signal, keep apart the transmission back by demodulation circuit reduction through buffer circuit, avoided long-time output modulation signal, reduced the circuit consumption.
It should be understood that equivalent alterations and modifications can be made by those skilled in the art according to the technical solution of the present invention and the inventive concept thereof, and all such alterations and modifications should fall within the scope of the appended claims.
Claims (10)
1. An isolation driving circuit is characterized by comprising a modulation circuit, an isolation circuit and a demodulation circuit which are connected in sequence; receiving an input signal by the modulation circuit, modulating the input signal when the rising edge and the falling edge of the input signal are triggered, and outputting a modulation signal with a preset period; transmitting, by the isolation circuit, the modulated signal to the demodulation circuit in isolation; and demodulating the modulation signal by the demodulation circuit to obtain a restored input signal.
2. The isolated driver circuit of claim 1, wherein the modulation circuit comprises:
the input processing circuit is used for receiving an input signal and converting the input signal into a driving signal;
the high-frequency oscillation circuit is used for outputting a corresponding oscillation signal according to the driving signal;
the switching circuit is used for carrying out switching modulation on the oscillation signal to obtain a modulation signal with a preset period;
the input processing circuit, the high-frequency oscillator, the switch circuit and the isolation circuit are connected in sequence.
3. The isolation driving circuit according to claim 2, wherein the input processing circuit comprises a first buffer and a first inverter, and the first buffer outputs a first driving signal to the high frequency oscillating circuit when the input signal is at a high level; and outputting a second driving signal to the high-frequency oscillation circuit by the first inverter when the input signal is at a low level.
4. The isolation drive circuit according to claim 3, wherein the high-frequency oscillation circuit includes a first high-frequency oscillator and a second high-frequency oscillator, the first high-frequency oscillator receiving the first drive signal and outputting a first oscillation signal to the switch circuit; and receiving the second driving signal by the second high-frequency oscillator and outputting a second oscillating signal to the switch circuit.
5. The isolated drive circuit of claim 4, wherein the switching circuit comprises a first switch, a first counter, a second switch, and a second counter; and respectively outputting a first pulse signal and a second pulse signal with preset periods to a control end of the first switch and a control end of the second switch by the first counter and the second counter, respectively performing switch modulation on the first driving signal and the second driving signal, and respectively outputting a first modulation signal and a second modulation signal to the isolation circuit by the first switch and the second switch.
6. The isolated drive circuit of claim 5, wherein the isolation circuit comprises:
the first isolation unit is connected with the first switch and used for transmitting the first modulation signal to the demodulation circuit in an isolation manner;
and the second isolation unit is connected with the second switch and used for transmitting the second modulation signal to the demodulation circuit in an isolation manner.
7. The isolation driving circuit according to claim 6, wherein the first isolation unit comprises a first capacitor, and one end of the first capacitor is connected to the output end of the first switch and the input end of the demodulation circuit;
or, the first isolation unit comprises a second buffer, a second phase inverter, a third phase inverter, a fourth phase inverter, a second capacitor and a third capacitor, the input end of the second buffer is connected with the output end of the first switch, the output end of the second buffer is respectively connected with the input end of the second phase inverter and the input end of the third phase inverter, the output end of the third phase inverter is connected with the input end of the fourth phase inverter, the output end of the fourth phase inverter is connected with one end of the second capacitor, the other end of the second capacitor is connected with the input end of the demodulation circuit, the output end of the second phase inverter is connected with one end of the third capacitor, and the other end of the third capacitor is connected with the input end of the demodulation circuit.
8. The isolation driving circuit according to claim 7, wherein the second isolation unit comprises a fourth capacitor, and one end of the fourth capacitor is connected to the output end of the second switch and the input end of the demodulation circuit;
or, the second isolation unit includes a third buffer, a fifth inverter, a sixth inverter, a seventh inverter, a fifth capacitor, and a sixth capacitor, where an input end of the third buffer is connected to an output end of the second switch, an output end of the third buffer is connected to the input ends of the fifth and sixth inverters, an output end of the sixth inverter is connected to an input end of the seventh inverter, an output end of the seventh inverter is connected to one end of the fifth capacitor, the other end of the fifth capacitor is connected to an input end of the demodulation circuit, an output end of the fifth inverter is connected to one end of the sixth capacitor, and the other end of the third capacitor is connected to an input end of the demodulation circuit.
9. The isolation driving circuit according to claim 6 or 8, wherein the demodulation circuit includes a first comparator, a second comparator and a flip-flop, a positive input terminal of the first comparator is connected to the first isolation unit, a positive input terminal of the second comparator is connected to the second isolation unit, an inverted input terminal of the first comparator is connected to a reference signal or to the first isolation unit, an inverted input terminal of the second comparator is connected to the reference signal or to the second isolation unit, an output terminal of the first comparator and an output terminal of the second comparator are respectively connected to a set terminal and a reset terminal of the flip-flop or to the reset terminal and the set terminal of the flip-flop, and the first output terminal or the second output terminal of the flip-flop outputs a restored input signal.
10. A power transistor driving system, comprising a power transistor and the isolated driving circuit of any one of claims 1 to 9, wherein the isolated driving circuit is connected to a control terminal of the power transistor.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202023055517.0U CN213990485U (en) | 2020-12-17 | 2020-12-17 | Isolation driving circuit and power tube driving system |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202023055517.0U CN213990485U (en) | 2020-12-17 | 2020-12-17 | Isolation driving circuit and power tube driving system |
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| CN213990485U true CN213990485U (en) | 2021-08-17 |
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| CN202023055517.0U Active CN213990485U (en) | 2020-12-17 | 2020-12-17 | Isolation driving circuit and power tube driving system |
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