CN213547471U - Pulse generation circuit, device and laser - Google Patents

Pulse generation circuit, device and laser Download PDF

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Publication number
CN213547471U
CN213547471U CN202022414600.6U CN202022414600U CN213547471U CN 213547471 U CN213547471 U CN 213547471U CN 202022414600 U CN202022414600 U CN 202022414600U CN 213547471 U CN213547471 U CN 213547471U
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pulse
signal
circuit
digital
pulse signal
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杨德明
黄晨曦
宋朋飞
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Shenzhen Ling Deng Technology Co ltd
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Shenzhen Ling Deng Technology Co ltd
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Abstract

The utility model relates to a pulse technical field discloses a pulse generation circuit, device and laser instrument. The pulse generating circuit comprises a signal receiving circuit, a signal processing circuit and a digital-to-analog conversion circuit which are sequentially connected, wherein the signal receiving circuit receives a first digital pulse signal input by the upper computer and transmits the first digital pulse signal to the signal processing circuit; the signal processing circuit converts the time length and the pulse width of the first digital pulse signal to obtain a second digital pulse signal; the digital-to-analog conversion circuit performs digital-to-analog conversion on the second digital pulse signal and outputs an analog pulse signal. The utility model discloses in, signal receiving circuit realizes receiving first digital pulse signal with the communication of host computer, and signal processing circuit realizes changing time length and the pulse width of first digital pulse signal, and the second digital pulse signal that the output meets the requirements is finally changed into analog pulse signal output through digital analog conversion circuit to satisfy high performance laser's pulse demand.

Description

Pulse generation circuit, device and laser
Technical Field
The utility model relates to a pulse technical field especially relates to a pulse generation circuit, device and laser instrument.
Background
At present, a high-speed pulse generator is a key element of a high-performance picosecond and nanosecond laser, and parameters such as pulse response speed cannot meet the requirements due to limited options of the shape of pulses in the conventional product, so that the improvement of the performance of the laser is limited.
SUMMERY OF THE UTILITY MODEL
The utility model discloses a main aim at provides a pulse generation circuit, device and laser instrument, and it is limited to aim at solving pulse shape in the current pulse generator, goes up the technical problem that pulse response speed isoparametric can not satisfy the high performance laser instrument requirement.
In order to achieve the above object, the present invention provides a pulse generating circuit, which comprises a signal receiving circuit, a signal processing circuit and a digital-to-analog conversion circuit connected in sequence, wherein the signal receiving circuit is connected to an upper computer; wherein,
the signal receiving circuit is used for receiving a first digital pulse signal input by the upper computer and storing the first digital pulse signal;
the signal receiving circuit is further used for transmitting the first digital pulse signal to the signal processing circuit;
the signal processing circuit is used for receiving the first digital pulse signal and converting the time length and the pulse width of the first digital pulse signal to obtain a second digital pulse signal;
the digital-to-analog conversion circuit is used for performing digital-to-analog conversion on the second digital pulse signal to obtain an analog pulse signal and outputting the analog pulse signal.
Optionally, the signal processing circuitry comprises a field programmable gate array; wherein,
the signal input end of the field programmable gate array is connected with the signal output end of the signal receiving circuit, the signal output end of the field programmable gate array is connected with the signal input end of the digital-to-analog conversion circuit, and the clock signal end of the field programmable gate array is connected with the clock signal end of the digital-to-analog conversion circuit.
Optionally, the pulse generation circuit further comprises a driving circuit; the drive circuit is connected with the digital-to-analog conversion circuit; wherein,
the driving circuit is used for receiving the analog pulse signal and generating a pulse current according to the analog pulse signal;
the driving circuit is further used for generating a pulse current signal according to the pulse current and outputting pulse laser according to the pulse current signal.
Optionally, the driving circuit includes a pulse driving unit, a pump laser, a pulse laser output unit, and a photodiode; wherein,
the pulse driving unit is connected with the pump laser, the pump laser is connected with the pulse laser output unit, and the pulse laser output unit is connected with the photodiode.
Optionally, the signal receiving circuit includes an input interface, and the signal receiving circuit is connected to the upper computer through the input interface; wherein,
and the input interface is used for receiving the digital pulse signal input by the upper computer.
Optionally, the input interface comprises a universal serial bus interface or an asynchronous serial interface.
Optionally, the signal receiving circuit further includes a pulse signal buffer circuit, and the pulse signal buffer circuit is connected to the input interface; wherein,
the pulse signal buffer circuit is used for storing the digital pulse signal.
Optionally, the pulse signal buffer circuit comprises a random access memory or a nonvolatile memory; wherein,
the random access memory or the nonvolatile memory is connected with the input interface.
In order to achieve the above object, the present invention further provides a pulse generator, which includes the pulse generating circuit as described above.
To achieve the above object, the present invention also provides a laser including the pulse generating device as described above.
The utility model provides a pulse generating circuit, which comprises a signal receiving circuit, a signal processing circuit and a digital-to-analog conversion circuit which are connected in sequence, wherein the signal receiving circuit is connected with an upper computer; the signal receiving circuit receives a first digital pulse signal input by the upper computer, stores the first digital pulse signal and transmits the first digital pulse signal to the signal processing circuit; the signal processing circuit receives the first digital pulse signal and converts the time length and the pulse width of the first digital pulse signal to obtain a second digital pulse signal; the digital-to-analog conversion circuit is used for performing digital-to-analog conversion on the second digital pulse signal to obtain an analog pulse signal and outputting the analog pulse signal. The utility model discloses in, signal receiving circuit is used for realizing receiving first digital pulse signal with the communication of host computer, signal processing circuit realizes converting time length and the pulse width of first digital pulse signal, the second digital pulse signal that the output meets the requirements, finally change digital pulse signal into analog pulse signal output through digital analog conversion circuit, thereby satisfy the pulse demand of laser instrument, it is limited to have solved pulse shape among the current pulse generator, go up the technical problem that pulse response speed isoparametric can not satisfy the high performance laser instrument requirement.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the structures shown in the drawings without creative efforts.
Fig. 1 is a functional circuit diagram of an embodiment of the pulse generating circuit of the present invention;
fig. 2 is a schematic circuit diagram of an embodiment of the pulse generating circuit of the present invention.
The reference numbers illustrate:
reference numerals Name (R) Reference numerals Name (R)
100 Signal receiving circuit 402 Pump laser
200 Signal processing circuit 403 Pulse laser output unit
300 Digital-to-analog conversion circuit 404 Photodiode
FPGA Field programmable logic gate array 101 Input interface
400 Driving circuit 102 Pulse signal buffer circuit
401 Pulse drive unit
The objects, features and advantages of the present invention will be further described with reference to the accompanying drawings.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.
It should be noted that all the directional indicators (such as upper, lower, left, right, front and rear … …) in the embodiment of the present invention are only used to explain the relative position relationship between the components, the motion situation, etc. in a specific posture (as shown in the drawings), and if the specific posture is changed, the directional indicator is changed accordingly.
In addition, the descriptions related to "first", "second", etc. in the present invention are for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicit ly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, the technical solutions in the embodiments may be combined with each other, but it must be based on the realization of those skilled in the art, and when the technical solutions are contradictory or cannot be realized, it should be considered that the combination of the technical solutions does not exist, and is not within the protection scope of the present invention.
The utility model provides a pulse generation circuit.
Referring to fig. 1, in the embodiment of the present invention, the pulse generating circuit includes a signal receiving circuit 100, a signal processing circuit 200, and a digital-to-analog conversion circuit 300, which are connected in sequence, where the signal receiving circuit 100 is connected to an upper computer; wherein,
the signal receiving circuit 100 is configured to receive a first digital pulse signal input by the upper computer and store the first digital pulse signal. In this embodiment, the signal receiving circuit 100 may be a processor module, the processor module may be configured to implement analysis of a communication command and storage of a waveform parameter with an upper computer, and the signal receiving circuit 100 may receive a first digital pulse signal input by the upper computer and store the first digital pulse signal. The signal receiving circuit 100 may include an input interface, and the signal receiving circuit 100 is connected to the upper computer through the input interface; the input interface may be a universal serial bus interface or an asynchronous serial interface.
The signal receiving circuit 100 is further configured to transmit the first digital pulse signal to the signal processing circuit 200. In this embodiment, the signal receiving circuit 100 may transmit the first digital pulse signal to the signal processing circuit 200 for pulse conversion according to a communication command of the upper computer, and output a second digital pulse signal meeting the requirement.
The signal processing circuit 200 is configured to receive the first digital pulse signal, and convert a time length and a pulse width of the first digital pulse signal to obtain a second digital pulse signal. In this embodiment, the signal processing circuit 200 may include a field programmable gate array, which receives the first digital pulse signal, writes the first digital pulse signal into a storage unit of the field programmable gate array, and outputs the waveform data from the storage unit according to a set frequency, and the field programmable gate array may generate the second digital pulse signal, including the pulse period, the driving of the high-speed DAC, the outputting of the waveform data, and the like.
The digital-to-analog conversion circuit 300 is configured to perform digital-to-analog conversion on the second digital pulse signal to obtain an analog pulse signal and output the analog pulse signal. In this embodiment, the digital-to-analog conversion circuit 300 may be a high-speed DAC module, and the high-speed DAC module may convert the digital waveform data of the second digital pulse signal into a waveform signal according to an instruction of the field programmable gate array, that is, obtain an analog pulse signal and output the analog pulse signal.
It should be noted that the pulse generating circuit can adopt programmable logic technology and high-speed DAC to realize high-speed programmable pulse output, and the pulse waveform can be arbitrarily edited by the upper computer to realize remote command control.
The embodiment provides a pulse generating circuit, which comprises a signal receiving circuit 100, a signal processing circuit 200 and a digital-to-analog conversion circuit 300 which are connected in sequence, wherein the signal receiving circuit 100 is connected with an upper computer; the signal receiving circuit 100 is configured to receive a first digital pulse signal input by the upper computer and store the first digital pulse signal; the signal receiving circuit 100 is further configured to transmit the first digital pulse signal to the signal processing circuit 200; the signal processing circuit 200 is configured to receive the first digital pulse signal, and convert a time length and a pulse width of the first digital pulse signal to obtain a second digital pulse signal; the digital-to-analog conversion circuit 300 is configured to perform digital-to-analog conversion on the second digital pulse signal to obtain an analog pulse signal and output the analog pulse signal. In this embodiment, the signal receiving circuit is configured to receive a first digital pulse signal through communication with an upper computer, the signal processing circuit is configured to convert a time length and a pulse width of the first digital pulse signal, output a second digital pulse signal meeting requirements, and finally convert the digital pulse signal into an analog pulse signal through the digital-to-analog conversion circuit for output, so as to meet pulse requirements of a high-performance laser, and solve technical problems that parameters such as a pulse shape is limited and an upper pulse response speed cannot meet the requirements of the high-performance laser in an existing pulse generator.
Further, referring to fig. 2, the signal processing circuit 200 includes a field programmable gate array FPGA; wherein,
the signal input end of the field programmable gate array FPGA is connected to the signal output end of the signal receiving circuit 100, the signal output end of the field programmable gate array FPGA is connected to the signal input end of the digital-to-analog conversion circuit 300, and the clock signal end of the field programmable gate array FPGA is connected to the clock signal end of the digital-to-analog conversion circuit 300.
It should be noted that the signal processing circuit 200 receives the first digital pulse signal, writes the first digital pulse signal into the storage unit of the FPGA, outputs the waveform output logic of the second digital pulse signal to retrieve the waveform data from the storage unit according to the set frequency,
specifically, the field programmable gate array FPGA may include a waveform selection key, a frequency control key, and an amplitude control key; and the keys of the field programmable gate array FPGA are coded by adopting a hardware description language programming program, so that the waveform, the output frequency and the amplitude of the second digital pulse signal are correspondingly controlled when the keys of the waveform selection key, the frequency control key and the amplitude control key are clicked. The keys of the FPGA can be coded by adopting a hardware description language programming program, so that the key length of the waveform selection key, the frequency control key and the amplitude control key is pressed to correspondingly control the signal type, the repetition frequency and the pulse width of the second digital pulse signal.
Further, with continued reference to fig. 2, the pulse generation circuit further includes a drive circuit 400; the driving circuit 400 is connected to the digital-to-analog conversion circuit 300; wherein,
the driving circuit 400 is configured to receive the analog pulse signal and generate a pulse current according to the analog pulse signal;
the driving circuit 400 is further configured to generate a pulse current signal according to the pulse current, and output a pulse laser according to the pulse current signal.
It is easy to understand that the pulse generating circuit further includes a driving circuit 400, and the driving circuit 400 is configured to convert the analog pulse signal and output a pulse laser according to requirements; the driving circuit 400 may include a pulse driving unit 401, a pump laser 402, a pulse laser output unit 403, and a photodiode 404; the pulse driving unit 401 is connected to the pump laser 402, the pump laser 402 is connected to the pulse laser output unit 403, and the pulse laser output unit 403 is connected to the photodiode 404.
Further, with continued reference to fig. 2, the driving circuit 400 includes a pulse driving unit 401, a pump laser 402, a pulse laser output unit 403, and a photodiode 404; wherein,
the pulse driving unit 401 is connected to the pump laser 402, the pump laser 402 is connected to the pulse laser output unit 403, and the pulse laser output unit 403 is connected to the photodiode 404.
It should be noted that the driving circuit 400 may include a pulse driving unit 401, a pump laser 402, a pulse laser output unit 403, and a photodiode 404, the driving circuit 400 drives the pump laser 402 of the laser system to output pump laser in response to the analog pulse signal, and the pulse laser output unit 403 generates and outputs short pulse laser by using the pump laser output by the pump laser 402, and at the same time, the photodiode 404 detects the short pulse laser signal, and the short pulse laser signal is captured by a pulse current signal detection circuit of the photodiode 404, and then outputs the pulse current signal, and feeds back the pulse current signal to the driving circuit 400, so that the driving circuit 400 may turn off the pump current.
Further, with continued reference to fig. 2, the signal receiving circuit 100 includes an input interface 101, and the signal receiving circuit 100 is connected to the upper computer via the input interface 101; wherein,
and the input interface 101 is used for receiving the digital pulse signal input by the upper computer.
It should be understood that the signal receiving circuit 100 may include an input interface 101, the signal receiving circuit 100 is connected to the upper computer via the input interface 101, the input interface 101 may be a communication interface, and the input interface 101 may be a universal serial bus interface or an asynchronous serial interface.
Further, the input interface 101 includes a universal serial bus interface or an asynchronous serial interface.
It is easy to understand that the input interface 101 may be a universal serial bus interface or an asynchronous serial interface, and the input interface 101 may also be other types of communication interfaces, which is not limited by the embodiment.
Further, with continued reference to fig. 2, the signal receiving circuit 100 further includes a pulse signal buffer circuit 102, where the pulse signal buffer circuit 102 is connected to the input interface 101; wherein,
the pulse signal buffer circuit 102 is configured to store the digital pulse signal.
It should be noted that the signal receiving circuit 100 further includes a pulse signal buffer circuit 102, and the signal receiving circuit 100 may be a processor module, and the processor module may be configured to implement analysis of a communication command and storage of waveform parameters with an upper computer, and the pulse signal buffer circuit 102 in the signal receiving circuit 100 may be configured to perform storage of waveform parameters.
Further, the pulse signal buffer circuit 102 includes a random access memory or a nonvolatile memory; wherein,
the random access memory or the non-volatile memory is connected to the input interface 101.
It is understood that the pulse signal buffer circuit 102 may include a random access memory or a nonvolatile memory, and the pulse signal buffer circuit 102 may also include other types of memories, which is not limited by the embodiment.
In order to achieve the above object, the present invention further provides a pulse generator, which includes the pulse generating circuit as described above. The specific structure of the pulse generating circuit refers to the above embodiments, and since the pulse generating device adopts all technical solutions of all the above embodiments, at least all the beneficial effects brought by the technical solutions of the above embodiments are achieved, and no further description is given here.
In order to achieve the above object, the present invention further provides a laser, which includes the pulse generating device as described above. The specific structure of the pulse generating device refers to the above embodiments, and since the laser adopts all technical solutions of all the above embodiments, at least all the beneficial effects brought by the technical solutions of the above embodiments are achieved, and no further description is given here.
The above only is the preferred embodiment of the present invention, not so limiting the patent scope of the present invention, all under the concept of the present invention, the equivalent structure transformation made by the contents of the specification and the drawings is utilized, or the direct/indirect application is included in other related technical fields in the patent protection scope of the present invention.

Claims (10)

1. A pulse generating circuit is characterized by comprising a signal receiving circuit, a signal processing circuit and a digital-to-analog conversion circuit which are sequentially connected, wherein the signal receiving circuit is connected with an upper computer; wherein,
the signal receiving circuit is used for receiving a first digital pulse signal input by the upper computer and storing the first digital pulse signal;
the signal receiving circuit is further used for transmitting the first digital pulse signal to the signal processing circuit;
the signal processing circuit is used for receiving the first digital pulse signal and converting the time length and the pulse width of the first digital pulse signal to obtain a second digital pulse signal;
the digital-to-analog conversion circuit is used for performing digital-to-analog conversion on the second digital pulse signal to obtain an analog pulse signal and outputting the analog pulse signal.
2. The pulse generating circuit of claim 1, wherein the signal processing circuit comprises a field programmable gate array; wherein,
the signal input end of the field programmable gate array is connected with the signal output end of the signal receiving circuit, the signal output end of the field programmable gate array is connected with the signal input end of the digital-to-analog conversion circuit, and the clock signal end of the field programmable gate array is connected with the clock signal end of the digital-to-analog conversion circuit.
3. The pulse generating circuit of claim 1, wherein the pulse generating circuit further comprises a drive circuit; the drive circuit is connected with the digital-to-analog conversion circuit; wherein,
the driving circuit is used for receiving the analog pulse signal and generating a pulse current according to the analog pulse signal;
the driving circuit is further used for generating a pulse current signal according to the pulse current and outputting pulse laser according to the pulse current signal.
4. The pulse generating circuit according to claim 3, wherein the driving circuit includes a pulse driving unit, a pump laser, a pulse laser output unit, and a photodiode; wherein,
the pulse driving unit is connected with the pump laser, the pump laser is connected with the pulse laser output unit, and the pulse laser output unit is connected with the photodiode.
5. The pulse generating circuit according to any one of claims 1 to 4, wherein the signal receiving circuit comprises an input interface, and the signal receiving circuit is connected with the upper computer through the input interface; wherein,
and the input interface is used for receiving the digital pulse signal input by the upper computer.
6. The pulse generation circuit of claim 5, wherein the input interface comprises a universal serial bus interface or an asynchronous serial interface.
7. The pulse generating circuit according to claim 5, wherein the signal receiving circuit further comprises a pulse signal buffer circuit, the pulse signal buffer circuit being connected to the input interface; wherein,
the pulse signal buffer circuit is used for storing the digital pulse signal.
8. The pulse generating circuit according to claim 7, wherein the pulse signal buffering circuit comprises a random access memory or a nonvolatile memory; wherein,
the random access memory or the nonvolatile memory is connected with the input interface.
9. A pulse generating device comprising a pulse generating circuit according to any one of claims 1 to 8.
10. A laser comprising the pulse generating apparatus of claim 9.
CN202022414600.6U 2020-10-26 2020-10-26 Pulse generation circuit, device and laser Active CN213547471U (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102022129873A1 (en) 2022-11-11 2024-05-16 Trumpf Laser Gmbh Laser pulse generator and method for generating a laser pulse

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102022129873A1 (en) 2022-11-11 2024-05-16 Trumpf Laser Gmbh Laser pulse generator and method for generating a laser pulse
WO2024100013A1 (en) 2022-11-11 2024-05-16 Trumpf Laser Gmbh Laser pulse generator, and method for generating a laser pulse

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