CN213521883U - Channel system based on high-speed frequency synthesis chip - Google Patents
Channel system based on high-speed frequency synthesis chip Download PDFInfo
- Publication number
- CN213521883U CN213521883U CN202023170701.XU CN202023170701U CN213521883U CN 213521883 U CN213521883 U CN 213521883U CN 202023170701 U CN202023170701 U CN 202023170701U CN 213521883 U CN213521883 U CN 213521883U
- Authority
- CN
- China
- Prior art keywords
- local oscillation
- module
- amplifier
- receiving
- oscillation source
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Abstract
The utility model provides a channel system based on high-speed is combined chip frequently, including up-conversion emission module, receiving module, local oscillator module and control power module, the first input of up-conversion emission module is connected with the terminal, and the first output signal of up-conversion emission module is to the antenna, and the second output signal of up-conversion emission module is to the front end of receiving module; the control power supply module comprises an FPGA chip and a DC/DC converter; the local oscillation module comprises a transmitting local oscillation source and a receiving local oscillation source, and the transmitting local oscillation source and the receiving local oscillation source are both connected with the FPGA chip; the local oscillation module is a frequency synthesizer. The high-speed of frequency synthesizer for integrated PLL + VCO is frequently synthesized the chip, the utility model discloses an integrated PLL + VCO's high-speed is frequently synthesized the chip and is regarded as the frequency hopping source, greatly reduced circuit complexity.
Description
Technical Field
The utility model relates to a wireless communication technology field particularly, relates to a channel system based on chip is synthesized frequently to high speed.
Background
The wave communication is communication using electromagnetic wave with wavelength between 0.1 mm and 1 m, the frequency range corresponding to the electromagnetic wave in the wavelength range is 300MHz (0.3GHz) -3 THz, and the microwave communication is communication using microwave as medium directly, without solid medium, when there is no obstacle in the straight line distance between two points, the microwave transmission can be used, and the communication using microwave has large capacity, good quality and can be transmitted to a long distance.
With the progress of the channel module related technology, the current microwave transceiver module generally has a plurality of channels with different wave bands, the circuit complexity is gradually increased, and the product yield is greatly reduced.
SUMMERY OF THE UTILITY MODEL
The utility model discloses aim at solving the high problem of channel module circuit complexity among the prior art, provide a channel system based on the chip is synthesized frequently to high speed, this system has adopted the high speed of integrated PLL + VCO to synthesize frequently the chip as the frequency hopping source, greatly reduced circuit complexity.
The embodiment of the utility model discloses a realize through following technical scheme: a channel system based on a high-speed frequency synthesis chip comprises an up-conversion transmitting module, a receiving module, a local oscillator module and a control power module, wherein a first input end of the up-conversion transmitting module is connected with a terminal and used for acquiring an intermediate-frequency modulated signal sent by the terminal, a first output end of the up-conversion transmitting module outputs a signal to an antenna, and a second output end of the up-conversion transmitting module outputs a signal to the front end of the receiving module;
the control power supply module comprises an FPGA chip and a DC/DC converter;
the local oscillation module comprises a transmitting local oscillation source and a receiving local oscillation source, the transmitting local oscillation source and the receiving local oscillation source are both connected with the FPGA chip, the transmitting local oscillation source outputs a first path to a second input end of the up-conversion transmitting module and is used for sending an up-conversion local oscillation signal, the transmitting local oscillation source outputs a second path as a transmitting frequency detection output, and the receiving local oscillation source outputs a path to an input end of the receiving module and is used for sending and receiving a local oscillation signal.
According to a preferred embodiment, the up-conversion transmitting module comprises a first amplifier, a first band-pass filter, an up-converter, a second amplifier, a power controller, a third amplifier, a fourth amplifier, a driving amplifier, a final amplifier, an isolator and a circulator which are connected in sequence,
the circulator outputs one path of signal to the antenna through the low-pass filter and the high-pass filter, and the circulator outputs one path of signal to the front end of the receiving module through the amplitude limiter and the low-noise amplifier; the first amplifier is connected with the intermediate frequency modulated signal sent by the terminal, and the up-converter is connected with the up-conversion local oscillation signal sent by the output local oscillation source.
According to a preferred embodiment, the receiving module comprises a second band-pass filter, a fifth amplifier and a power divider connected in sequence,
the power divider is divided into two paths, the first path is sequentially connected with a frequency mixer, a sixth amplifier and a third band-pass filter, the frequency mixer is connected with a local oscillation signal sent by the local oscillation source, and an output signal of the third band-pass filter is used as a receiving signal of the IFF;
and the second channel down converter outputs one channel of receiving signals as ATC through the logarithmic amplification module and the fourth generation of bandpass filter, and the two channel down converter outputs one channel of receiving signals as ADS-B through the linear amplification module and the fifth bandpass filter.
According to a preferred embodiment, the dual down-converter comprises a linear output port.
According to a preferred embodiment, the local oscillation module is a frequency synthesizer.
According to a preferred embodiment, the frequency synthesizer is a high-speed synthesizer chip integrating a PLL + VCO.
According to a preferred embodiment, the final amplifier is a narrow-band amplifier.
The utility model discloses technical scheme has following advantage and beneficial effect at least: the utility model discloses an integrated PLL + VCO's high speed is frequently combined the chip and is regarded as the frequency hopping source, greatly reduced circuit complexity.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are required to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present invention, and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained according to the drawings without inventive efforts.
Fig. 1 is a schematic block diagram of an up-conversion transmitting module provided in embodiment 1 of the present invention;
fig. 2 is a schematic block diagram of a receiving module provided in embodiment 1 of the present invention;
fig. 3 is a schematic block diagram of a control power supply module provided in embodiment 1 of the present invention;
fig. 4 is a schematic block diagram of the local oscillation module provided in embodiment 1 of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. The components of embodiments of the present invention, as generally described and illustrated in the figures herein, may be arranged and designed in a wide variety of different configurations.
Thus, the following detailed description of the embodiments of the present invention, presented in the accompanying drawings, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures.
In the description of the present invention, it should be noted that, if the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer" and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, or the orientation or positional relationship which is usually placed when the product of this application is used, the description is only for convenience of description and simplification, but the indication or suggestion that the device or element to be referred must have a specific orientation, be constructed in a specific orientation and be operated is not to be construed as limiting the present invention.
In the description of the present invention, it should be further noted that unless otherwise explicitly stated or limited, the terms "disposed," "mounted," "connected," and "connected" should be interpreted broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present invention can be understood in specific cases to those skilled in the art.
Example 1
Referring to fig. 1 to 4, the present embodiment provides a channel system based on a high-speed frequency synthesizer chip, including an up-conversion transmitting module, a receiving module, a local oscillator module, and a control power module, where a first input end of the up-conversion transmitting module is connected to a terminal and is configured to obtain an intermediate-frequency modulated signal sent by the terminal, a first output end of the up-conversion transmitting module outputs a signal to an antenna, and a second output end of the up-conversion transmitting module outputs a signal to a front end of the receiving module;
the control power supply module comprises an FPGA chip and a DC/DC converter, and particularly, after a power supply enters the module, the +12V is converted into +5V through the DC/DC converter and filtering to be used as a power supply of a channel system; +48V supplies power to the driving amplifier and the final amplifier; furthermore, the FPGA chip comprises pins such as T/R, SPI, FCON, PTT, RTT, ATT and the like.
Specifically, the local oscillation module comprises a transmitting local oscillation source and a receiving local oscillation source, the transmitting local oscillation source and the receiving local oscillation source are both connected with the FPGA chip, the transmitting local oscillation source outputs a first path to a second input end of the up-conversion transmitting module for sending an up-conversion local oscillation signal, the transmitting local oscillation source outputs a second path as a transmitting frequency detection output, and the receiving local oscillation source outputs a second path to an input end of the receiving module for sending and receiving a local oscillation signal.
Specifically, one end of a transmitting local oscillation source of the local oscillation module is connected with the FPGA chip, the other end of the transmitting local oscillation source is sequentially connected with the LPF and the power divider, the power divider divides two paths, one path is used as an up-conversion local oscillation signal, and the other path is used as transmission frequency detection output; furthermore, one end of the local oscillation receiving source of the local oscillation module is connected with the FPGA chip, the other end is connected with the LPF, and one path of local oscillation receiving signal is output through the LPF.
Specifically, the up-conversion transmitting module comprises a first amplifier, a first band-pass filter, an up-converter, a second amplifier, a power controller, a third amplifier, a fourth amplifier, a driving amplifier, a final amplifier, an isolator and a circulator which are sequentially connected, wherein the circulator outputs one path of signal to an antenna through a low-pass filter and a high-pass filter, and the circulator outputs one path of signal to the front end of the receiving module through an amplitude limiter and a low-noise amplifier; the first amplifier is connected with the intermediate frequency modulated signal sent by the terminal, and the up-converter is connected with the up-conversion local oscillation signal sent by the output local oscillation source.
Specifically, the up-conversion transmitting module receives an intermediate-frequency modulated signal sent by a terminal through a first amplifier, isolates, filters and amplifies the intermediate-frequency modulated signal, and up-converts the intermediate-frequency signal according to a received up-conversion local oscillator signal through an up-converter to obtain a frequency required by transmission, and performs filtering and amplification; furthermore, the amplified signal is divided into two paths, one path is sent to the antenna through the circulator and the low-pass filter, the other path is subjected to amplitude limiting through the circulator, and then is sent to the front end of the receiving module after being subjected to low-noise amplification.
Specifically, the receiving module comprises a second band-pass filter, a fifth amplifier and a power divider which are connected in sequence, the power divider is divided into two paths, the first path is connected with a frequency mixer, a sixth amplifier and a third band-pass filter in sequence, the frequency mixer receives a local oscillation signal sent by a local oscillation source, and an output signal of the third band-pass filter is used as a receiving signal of the IFF; and the second channel is connected with the dual-channel down converter, the dual-channel down converter outputs one channel as an ATC (automatic train control) receiving signal through the logarithmic amplification module and the fourth generation of pass filter, and the dual-channel down converter outputs one channel as an ADS-B receiving signal through the linear amplification module and the fifth band-pass filter.
Further, the dual-channel down converter comprises a linear output port so that the ADS-B branch can linearly amplify the signal.
Furthermore, the local oscillator module is a frequency synthesizer, and further, the minimum frequency hopping step of the selected frequency synthesizer is 2.4Hz, so that the device requirement of the channel system is met in the aspect of precision.
Further, the frequency synthesizer is a high-speed frequency synthesizer chip integrated with the PLL + VCO, and it can be understood that the high-speed frequency synthesizer chip integrated with the PLL + VCO is adopted as a frequency hopping source in this embodiment; furthermore, the frequency hopping source also outputs a locking indication signal, thereby greatly reducing the circuit complexity.
Further, the final amplifier is a narrow-band amplifier, and the operation state thereof is an electrical frequency state.
The above is only a preferred embodiment of the present invention, and is not intended to limit the present invention, and various modifications and changes will occur to those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (7)
1. A channel system based on a high-speed frequency synthesis chip is characterized by comprising an up-conversion transmitting module, a receiving module, a local oscillator module and a control power module, wherein a first input end of the up-conversion transmitting module is connected with a terminal and is used for acquiring an intermediate-frequency modulated signal sent by the terminal;
the control power supply module comprises an FPGA chip and a DC/DC converter;
the local oscillation module comprises a transmitting local oscillation source and a receiving local oscillation source, the transmitting local oscillation source and the receiving local oscillation source are both connected with the FPGA chip, the transmitting local oscillation source outputs a first path to a second input end of the up-conversion transmitting module and is used for sending an up-conversion local oscillation signal, the transmitting local oscillation source outputs a second path as a transmitting frequency detection output, and the receiving local oscillation source outputs a path to an input end of the receiving module and is used for sending and receiving a local oscillation signal.
2. The high speed FDC based channel system of claim 1, wherein the up-conversion transmitting module comprises a first amplifier, a first band pass filter, an up-converter, a second amplifier, a power controller, a third amplifier, a fourth amplifier, a driving amplifier, a final amplifier, an isolator, and a circulator connected in sequence,
the circulator outputs one path of signal to the antenna through the low-pass filter and the high-pass filter, and the circulator outputs one path of signal to the front end of the receiving module through the amplitude limiter and the low-noise amplifier; the first amplifier is connected with the intermediate frequency modulated signal sent by the terminal, and the up-converter is connected with the up-conversion local oscillation signal sent by the output local oscillation source.
3. The high-speed FDC based channel system as claimed in claim 1, wherein the receiving module comprises a second band-pass filter, a fifth amplifier and a power divider connected in sequence,
the power divider is divided into two paths, the first path is sequentially connected with a frequency mixer, a sixth amplifier and a third band-pass filter, the frequency mixer is connected with a local oscillation signal sent by the local oscillation source, and an output signal of the third band-pass filter is used as a receiving signal of the IFF;
and the second channel down converter outputs one channel of receiving signals as ATC through the logarithmic amplification module and the fourth generation of bandpass filter, and the two channel down converter outputs one channel of receiving signals as ADS-B through the linear amplification module and the fifth bandpass filter.
4. The high speed frequency synthesizer chip based channel system of claim 3, wherein the dual downconverter includes a linear output port.
5. The high speed integrated frequency chip based channel system according to claim 1, wherein said local oscillator module is a frequency synthesizer.
6. The high speed frequency synthesizer chip based channel system of claim 5, wherein the frequency synthesizer is a high speed frequency synthesizer chip integrated with a PLL + VCO.
7. The high speed frequency synthesizer chip based channel system of claim 2 wherein the final amplifier is a narrowband amplifier.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202023170701.XU CN213521883U (en) | 2020-12-23 | 2020-12-23 | Channel system based on high-speed frequency synthesis chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202023170701.XU CN213521883U (en) | 2020-12-23 | 2020-12-23 | Channel system based on high-speed frequency synthesis chip |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN213521883U true CN213521883U (en) | 2021-06-22 |
Family
ID=76428683
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202023170701.XU Active CN213521883U (en) | 2020-12-23 | 2020-12-23 | Channel system based on high-speed frequency synthesis chip |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN213521883U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115940941A (en) * | 2023-03-09 | 2023-04-07 | 中兵通信科技股份有限公司 | Frequency source for data link frequency hopping communication and rapid locking method thereof |
-
2020
- 2020-12-23 CN CN202023170701.XU patent/CN213521883U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115940941A (en) * | 2023-03-09 | 2023-04-07 | 中兵通信科技股份有限公司 | Frequency source for data link frequency hopping communication and rapid locking method thereof |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| DE112004002326B4 (en) | Multi-mode and multi-band RF transceiver and associated communication method | |
| US6208843B1 (en) | Radio frequency and microwave module for simultaneously transmitting data and audio signal | |
| CN202050038U (en) | Ka-band millimeter wave TR (transmitter-receiver) component | |
| CN103647575A (en) | 2-12GHz broadband microwave front-end circuit and 2-12GHz microwave signal receiving method | |
| CN209170346U (en) | A kind of FDD full frequency band transceiver | |
| EP3254427B1 (en) | Single local oscillator architecture for dual-band microwave/millimeter-wave transceiver | |
| CN213521883U (en) | Channel system based on high-speed frequency synthesis chip | |
| CN106603090B (en) | 12-channel receiving-transmitting frequency conversion channel device | |
| CN111585514A (en) | Millimeter wave down conversion subassembly | |
| CN103067032A (en) | Low noise decimetric wave signal frequency conversion amplification receiving system | |
| CN219592378U (en) | Microwave down-conversion assembly | |
| CN210120556U (en) | Miniaturized multichannel TR receives and dispatches subassembly | |
| JPH1093469A (en) | Frequency generator for radio communication equipment and frequency conversion method | |
| CN106888015A (en) | A kind of broadband frequency agility millimeter-wave frequency synthesizer | |
| CN213461730U (en) | Miniaturized low-power consumption receiver | |
| CN107294554B (en) | Single-frequency vehicle-mounted interphone | |
| CN210629430U (en) | X-waveband down converter and communication system | |
| CN100446411C (en) | Low noise frequency demultiplier | |
| CN217721172U (en) | Band up-conversion circuit for heightening and mixing | |
| CN213521854U (en) | Small-size channel system | |
| CN107959510B (en) | Dual-mode signal transceiver and method thereof | |
| CN213521856U (en) | Low-stray channel system | |
| CN212086157U (en) | Millimeter wave down conversion subassembly | |
| CN219372427U (en) | Transceiver and communication device | |
| CN216356719U (en) | Transceiver, chip, system on chip and chip system for increasing 2.4GHz frequency band communication distance |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |