CN213485068U

CN213485068U - Four-channel 12600MGSPS hardware playback platform

Info

Publication number: CN213485068U
Application number: CN202022915652.1U
Authority: CN
Inventors: 吴垒; 成光; 刘伟佳
Original assignee: Nanjing Changfeng Space Electronics Technology Co Ltd
Current assignee: Nanjing Changfeng Space Electronics Technology Co Ltd
Priority date: 2020-12-08
Filing date: 2020-12-08
Publication date: 2021-06-18
Anticipated expiration: 2030-12-08

Abstract

A four-channel 12600MGSPS hardware playback platform comprises a radio frequency connector, a radio frequency transformer, a signal driver, a clock management unit, a high-speed data converter and a high-speed connector; the number of the radio frequency connectors is 6, 1 radio frequency connector is connected with a signal driver and used for triggering input and output of signals, 1 radio frequency connector is connected with a clock management unit through a radio frequency transformer and used for providing clock signals for a four-channel 12600MGSPS hardware playback platform, and the other 4 radio frequency connectors are connected with a high-speed data converter through other radio frequency transformers and used for outputting the radio frequency signals; the high-speed connector is used for receiving data in cooperation with other equipment, and is connected with the high-speed data converter, the clock management unit and the signal driver. The utility model provides a pair of four-channel 12600MGSPS hardware playback platform, simple structure can export the wider first Nyquist zone of higher frequency, provides the higher hardware platform of performance index.

Description

Four-channel 12600MGSPS hardware playback platform

Technical Field

The utility model relates to a four-channel 12600MGSPS hardware playback platform belongs to radio framework technical field.

Background

Hardware playback platforms have grown in popularity for communication applications, ranging from civilian cellular handset base stations to military radars and professional communication systems. Conventional hardware playback platforms use a data converter and a quadrature modulator as the main building blocks of the communication link.

With technological advances in recent years, higher and higher frequencies are required for the clock rate of hardware playback platforms. The use of a data converter with a higher clock rate in conjunction with a high-speed serial data interface forms a completely new type of data converter, called an RF (radio frequency) data converter, that is capable of frequency synthesizing or capturing RF (radio frequency) signals directly without the need for conventional down-conversion or up-conversion with an analog radio link.

The existing hardware playback platform has many defects and shortcomings in the aspect of practical use, indexes such as spurious-free dynamic range cannot keep up with the technical progress, and signal images make the design of the filter complicated. In addition, the signal bandwidth is small due to the insufficient clock rate, and complicated down-conversion and up-conversion are required to be used in the system, thereby increasing the complexity of the device and the cost of the device.

Disclosure of Invention

An object of the utility model is to overcome not enough among the prior art, provide a four-channel 12600MGSPS hardware playback platform, simple structure can export the first Nyquist zone of higher frequency wideer, provides the higher hardware platform of performance index.

In order to achieve the above object, the utility model provides a four-channel 12600MGSPS hardware playback platform, which comprises a radio frequency connector, a radio frequency transformer, a signal driver, a clock management unit, a high-speed data converter and a high-speed connector;

the number of the radio frequency connectors is 6, 1 radio frequency connector is connected with a signal driver and used for triggering input and output of signals, 1 radio frequency connector is connected with a clock management unit through a radio frequency transformer and used for providing clock signals for the four-channel 12600MGSPS hardware playback platform, and the other 4 radio frequency connectors are connected with a high-speed data converter through the radio frequency transformer and used for outputting the radio frequency signals;

the high-speed connector is used for receiving data in cooperation with other equipment, and is connected with the high-speed data converter, the clock management unit and the signal driver.

Further, a power management unit is included that provides voltage and current to the four-channel 12600MGSPS hardware playback platform, the power management unit being connected to the high speed connector.

Furthermore, the power management unit outputs various voltages through multiple groups of switching power supplies and linear voltage-stabilized power supplies.

Preferably, the output voltage of the power management unit includes: digital voltage 1.0V, analog voltage 1.0V, digital voltage 1.8V, analog voltage 1.8V, digital voltage 3.3V, and analog voltage 3.3V.

Further, the radio frequency connector is in the model of SMA-5-KHD 12.

Preferably, the 6 rf connectors are respectively: signal output 1, signal output 2, signal output 3, signal output 4, sampling clock in, and a synchronization trigger signal.

Furthermore, a radio frequency connector connected with the clock management unit through the radio frequency transformer is a sampling clock input, and three clock signal inputs of an external sampling clock, an external reference clock and an internal reference clock are supported.

Preferably, the external sampling clock signal is a 12.6GHz signal of the external clock.

Preferably, the external reference clock signal is a 10MHz signal of the external clock.

Preferably, the internal reference clock signal is a 100MHz signal provided by an on-board crystal oscillator.

Further, the clock management unit transmits clock signals to the high-speed connector, wherein the clock signals are a synchronous clock signal, a core clock signal and a high-speed reference clock signal.

Preferably, the synchronous clock signal is an 3.90625MHz signal.

Preferably, the core clock signal is an 156.25MHz signal.

Preferably, the high-speed reference clock signal is an 156.25MHz signal.

Further, the clock management unit and the high-speed connector transmit configuration signals, enable signals and reset signals through a configuration interface, an enable interface and a reset interface.

Further, the high-speed connector transmits data to the high-speed data converter through a high-speed serial data interface.

Further, the high-speed connector and the high-speed data converter transmit a configuration signal, an enable signal and a reset signal through a configuration interface, an enable interface and a reset interface.

Compared with the prior art, the utility model discloses the beneficial effect who reaches:

the utility model is provided with 6 radio frequency connectors, wherein 4 radio frequency connectors are connected with a high-speed data converter through a radio frequency transformer and used for outputting radio frequency signals; signals can be synthesized according to the required output frequency, and the performance index is greatly improved;

the utility model has 1 radio frequency connector connected with the signal driver for the input and output of the trigger signal, and 1 radio frequency connector connected with the clock management unit through the radio frequency transformer for providing the clock signal for the four-channel 12600MGSPS hardware playback platform; the clock rate can be improved, the first Nyquist zone with higher frequency and wider width can be output, the problems that the signal bandwidth is small, the traditional quadrature modulator or the up-conversion mixer is not required to be configured are solved, the hardware needing to be deployed is simplified, and the cost is reduced.

Drawings

Fig. 1 is a block diagram of a four-channel 12600MGSPS hardware playback platform according to an embodiment of the present invention;

fig. 2 is a block diagram of a four-channel 12600MGSPS hardware playback platform power management unit according to an embodiment of the present invention;

fig. 3 is a power sequence diagram of a four-channel 12600MGSPS hardware playback platform according to an embodiment of the present invention;

fig. 4 is a structural diagram of a four-channel 12600MGSPS hardware playback platform clock management unit according to an embodiment of the present invention;

fig. 5 is an installation diagram of a four-channel 12600MGSPS hardware playback platform according to an embodiment of the present invention;

fig. 6 is an installation diagram of another angle of a four-channel 12600MGSPS hardware playback platform according to an embodiment of the present invention.

Detailed Description

The present invention will be further described with reference to the accompanying drawings. The following examples are only for illustrating the technical solutions of the present invention more clearly, and the protection scope of the present invention is not limited thereby.

In the description of the present invention, it is to be understood that the terms "center", "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like, indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are used merely for convenience of description and for simplicity of description, and do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore, should not be construed as limiting the present invention. Furthermore, the terms "first," "second," "third," and the like are used merely to describe distinctions and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated.

As shown in fig. 1, the present invention relates to a four-channel 12600MGSPS hardware playback platform, which includes a radio frequency connector, a radio frequency transformer, a signal driver, a clock management unit, a high speed data converter, a high speed connector and a power management unit.

The number of the radio frequency connectors is 6, the model of the 6 radio frequency managers is SMA-5-KHD12, and the manufacturer is Zhonghang photoelectric 158 factory. The 6 radio frequency connectors are respectively: signal output 1, signal output 2, signal output 3, signal output 4, sampling clock in, and a synchronization trigger signal.

As shown in fig. 1, the signal output 2, the signal output 3, and the signal output 4 are connected to the high-speed data converter through a radio frequency transformer, and are used for outputting radio frequency signals. The sampling clock input is connected with the clock management unit through a radio frequency transformer and used for providing clock signals for the four-channel 12600MGSPS hardware playback platform. The synchronous trigger signal is connected with the signal driver and used for inputting and outputting the trigger signal.

As shown in fig. 1, the sampling clock input supports three clock signal inputs of an external sampling clock, an external reference clock and an internal reference clock. The external sampling clock signal is a 12.6GHz signal of an external clock, the external reference clock signal is a 10MHz signal of the external clock, and the internal reference clock signal is a 100MHz signal provided by an on-board crystal oscillator.

As shown in fig. 1, the clock management unit is connected to the high-speed connector. And the clock management unit and the high-speed connector transmit a configuration signal, an enable signal and a reset signal through a configuration interface, an enable interface and a reset interface.

As shown in fig. 3, the clock signals are a synchronous clock signal, a core clock signal, and a high-speed reference clock signal. The synchronous clock signal is 3.90625MHz signal, the core clock signal is 156.25MHz signal, and the high-speed reference clock signal is 156.25MHz signal. The clock management unit also needs to generate 2 sets of clocks, each set of clocks comprising a synchronous clock 3.90625MHz and an operating clock 156.25MHz for connecting to the high-speed data converter.

As shown in fig. 1, the high-speed connector transmits data to the high-speed data converter through the high-speed serial data interface, and transmits a configuration signal, an enable signal, and a reset signal through the configuration interface, the enable interface, and the reset interface. The high-speed converter is also connected with the radio frequency transformer and used for outputting playback signals.

The high-speed converter supports the maximum sampling clock frequency of 12.6GSPS and supports the playback digit of 16 bits, the high-speed sampling clock ensures higher output frequency, and the high-precision playback digit ensures good spurious-free dynamic range. Therefore, in application, the design can be simplified, the cost can be saved, and units such as a local oscillator unit, a down-conversion unit, an up-conversion unit and the like can be omitted.

As shown in fig. 1, the power management unit receives the voltage provided by the high-speed connector, and converts the voltage into various required voltages through the switching power supply and the linear voltage-stabilized power supply according to the requirements of each device on a four-channel 12600MGSPS hardware playback platform.

As shown in fig. 2, after receiving the voltage +12V provided by the high-speed connector, the power management unit converts the voltage into various types of voltages according to the requirement, including:

the voltage is converted into 1.5V by a switching power supply 1, and then is converted into 1.0V by a linear voltage-stabilized power supply 1;

the voltage is converted into 1.7V by the switching power supply 2, and is converted into 1.0V by the linear voltage-stabilized power supply 2;

the voltage is converted into 3.2V by a switching power supply 3, and is converted into 1.8V of digital voltage and 1.8V of analog voltage by a linear voltage-stabilized power supply 3;

the voltage is converted into 3.9V by the switching power supply 4, and then is converted into 3.3V of digital voltage and 3.3V of analog voltage by the linear voltage-stabilized power supply 4.

As shown in fig. 4, after the hardware platform receives the +12V voltage provided by the high-speed connector, the hardware platform sequentially generates 3.3V, digital 1.0V, and 1.8V, and analog 1.0V and analog 1.8V, and this design can ensure that the clock management unit of the hardware platform works first, and after each required clock is generated, the digital circuit and the analog circuit are sequentially powered on to work.

As shown in fig. 5 and 6, a four-channel 12600MGSPS hardware playback platform is structurally a standard single-wide middle layer board card, supports four radio frequency interfaces, each of which operates independently, and has a maximum clock rate of 12.6GSPS and a playback bit number of 16 bits. The external data interface is a high-speed serial data interface and supports triggering synchronous output or triggering synchronous input, and the sampling clock can be generated according to an external reference clock or directly input into the sampling clock from the outside.

The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, a plurality of modifications and variations can be made without departing from the technical principle of the present invention, and these modifications and variations should also be considered as the protection scope of the present invention.

Claims

1. A four-channel 12600MGSPS hardware playback platform is characterized by comprising a radio frequency connector, a radio frequency transformer, a signal driver, a clock management unit, a high-speed data converter and a high-speed connector;

the number of the radio frequency connectors is 6, 1 radio frequency connector is connected with a signal driver and used for triggering input and output of signals, 1 radio frequency connector is connected with a clock management unit through a radio frequency transformer and used for providing clock signals for the four-channel 12600MGSPS hardware playback platform, and the other 4 radio frequency connectors are connected with a high-speed data converter through other radio frequency transformers and used for outputting the radio frequency signals;

2. The four-channel 12600MGSPS hardware playback platform of claim 1, further comprising a power management unit to provide voltage and current to the four-channel 12600MGSPS hardware playback platform, the power management unit being connected to the high speed connector.

3. The four-channel 12600MGSPS hardware playback platform of claim 2, wherein the power management unit outputs multiple voltages through multiple sets of switching power supplies and linear regulated power supplies.

4. The four-channel 12600MGSPS hardware playback platform of claim 1, wherein the rf connector connected to the clock management unit through the rf transformer supports three clock signal inputs of an external sampling clock, an external reference clock and an internal reference clock.

5. The four-channel 12600MGSPS hardware playback platform of claim 1, wherein the clock management unit transmits clock signals to the high speed connector, the clock signals being a synchronous clock signal, a core clock signal, and a high speed reference clock signal.

6. The four-channel 12600MGSPS hardware playback platform of claim 5, wherein the clock management unit communicates configuration, enable and reset signals with the high speed connector through a configuration, enable and reset interface.

7. The four-channel 12600MGSPS hardware playback platform of claim 1, wherein the high speed connector transmits data to the high speed data converter through a high speed serial data interface.

8. The four-channel 12600MGSPS hardware playback platform of claim 7, wherein the high speed connector and the high speed data converter transmit configuration, enable and reset signals through a configuration, enable and reset interface.

9. The four-channel 12600MGSPS hardware playback platform of claim 1, wherein said radio frequency connector is model SMA-5-KHD 12.