CN213459745U - High electron mobility transistor epitaxial structure and high electron mobility transistor - Google Patents

Abstract

The utility model discloses a high electron mobility transistor epitaxial structure and high electron mobility transistor. The high electron mobility transistor epitaxial structure comprises an interface processing layer, a barrier layer, an isolation layer, a channel layer and a contact layer which are sequentially formed on a semi-insulating GaN substrate with N-surface polarity, wherein at least the surface of the interface processing layer, which is in contact with the barrier layer, is also provided with a plurality of nano-scale pattern structures, and the nano-scale pattern structures and the interface processing layer are of a same-quality structure. The high electron mobility transistor epitaxial structure provided by the utility model has higher frequency characteristic; the GaN substrate and the semi-insulating property can be prepared in the early stage, so that adverse effects caused by the growth of a high-resistance epitaxial layer in the later stage can be avoided; and homoepitaxy does not have the problem of a high-density dislocation buffer layer on a heterogeneous substrate, and proper interface treatment is carried out before epitaxy, so that the generation of a leakage channel can be completely blocked.

Description

High electron mobility transistor epitaxial structure and high electron mobility transistor

Technical Field

The utility model relates to a HEMT device, in particular to high electron mobility transistor epitaxial structure and high electron mobility transistor belongs to semiconductor technology field.

Background

Most of the current GaN-based HEMT devices are prepared on heterogeneous substrates such as SiC/Si, and as shown in FIG. 1, an epitaxial structure of a high electron mobility transistor based on the SiC heterogeneous substrate needs to deposit an AlN buffer layer firstly in the manufacturing process, so that the lattice mismatch with GaN is reduced; after the buffer layer is transited, continuously growing an iron-or carbon-doped high-resistance GaN layer, wherein a GaN channel layer, an AlN isolating layer, an AlGaN barrier layer and a GaN cap layer structure are sequentially stacked on the high-resistance GaN layer; wherein, a very big potential well can be formed at the interface of the GaN channel layer and the AlGaN barrier layer, electrons are limited in the thin layer, high-density two-dimensional electron gas (2DEG) is formed in the channel layer, and the AlN isolating layer is very thin, so that the interface quality can be improved, the scattering can be reduced, the electron mobility can be improved, meanwhile, the discontinuity of a conduction band can be improved, and the density of the 2DEG can be increased; the purpose of the GaN cap layer is to reduce a gate electric field, inhibit gate current and reduce the generation of surface oxides, and the whole GaN-based HEMT device has Ga-face polarity.

Although the crystal quality is improved by the progress of the epitaxial technology, the requirement on the output efficiency of the device is further improved along with the new application of the high-frequency field such as microwave heating, 5G system communication and the like, and as the buffer layer on the heterogeneous substrate has high-density dislocation and an electric leakage channel with electron loss is formed at the interface between the GaN cap layer and the passivation layer (usually SiN), current collapse is caused, and the improvement of the performance of the GaN-based HEMT is restricted; meanwhile, the heterogeneous substrate needs to grow a high-resistance GaN layer of about 2-4 microns above the buffer layer, and the high-resistance GaN layer usually needs to be doped with iron or carbon, so that the risk of doped memory effect exists in subsequent growth, and the quality of the device is also adversely affected.

SUMMERY OF THE UTILITY MODEL

A primary object of the present invention is to provide an epitaxial structure of a high electron mobility transistor and a high electron mobility transistor, so as to overcome the disadvantages of the prior art.

For realizing the purpose of the utility model, the utility model discloses a technical scheme include:

an embodiment of the utility model provides a high electron mobility transistor epitaxial structure, it includes interface processing layer, barrier layer, isolation layer and the channel layer that forms in proper order on the semi-insulating GaN substrate of N face polarity, wherein, at least the interface processing layer with the surface that the barrier layer contacted still has a plurality of nanometer graphic structures, just nanometer graphic structure with the interface processing layer is the homogeneous structure.

The embodiment of the utility model provides a high electron mobility transistor is still provided, it includes:

the high electron mobility transistor epitaxial structure;

and the source electrode, the drain electrode and the grid electrode are matched with the high electron mobility transistor epitaxial structure, and the grid electrode is distributed between the source electrode and the drain electrode.

Compared with the prior art, the utility model has the advantages that:

1) the embodiment of the utility model provides a GaN substrate and semi-insulating characteristic in high electron mobility transistor epitaxial structure can be accomplished through preparation earlier stage, can avoid the adverse effect that later stage growth high resistance epitaxial layer brought;

2) in the epitaxial structure of the high electron mobility transistor provided by the embodiment of the utility model, homoepitaxy does not have the problem of a high-density dislocation buffer layer on a heterogeneous substrate, proper interface treatment is carried out in epitaxial growth, and the generation of a leakage channel can be completely blocked;

3) GaN is a polar material, the contact resistance of the N-surface polar GaN material is lower, and the surface state density between the N-surface polar GaN material and the passivation layer can be improved, so that the leakage problem is avoided;

4) the N-face polar GaN material has higher transconductance and can support higher working frequency.

Drawings

FIG. 1 is a schematic structural diagram of a high electron mobility transistor epitaxial structure based on a SiC heterogeneous substrate in the prior art;

fig. 2 is a schematic structural diagram of an epitaxial structure of a GaN substrate-based hemt according to an exemplary embodiment of the present invention;

FIG. 3 is a diagram illustrating the effect of a high electron mobility transistor epitaxial structure based on a SiC hetero-substrate in the prior art;

fig. 4 is a diagram illustrating an effect of an epitaxial structure of a GaN substrate-based hemt according to an exemplary embodiment of the present invention;

fig. 5 is an I-V test curve of the HEMT device based on the GaN substrate obtained in example 1 of the present invention and the HEMT device based on the SiC foreign substrate obtained in comparative example 1.

Detailed Description

In view of the deficiencies in the prior art, the utility model discloses the people can provide through long-term research and a large amount of practices the technical scheme of the utility model. The technical solution, its implementation and principles, etc. will be further explained as follows.

Hemt (high Electron Mobility transistor), a high Electron Mobility transistor, is a heterojunction field effect transistor, also known as a modulation doped field effect transistor (MODFET), a two-dimensional Electron gas field effect transistor (2-DEGFET), a Selective Doped Heterojunction Transistor (SDHT), and the like.

Both the HEMT device and the integrated circuit thereof can work in the fields of ultrahigh frequency (millimeter wave) and ultrahigh speed, because the HEMT device works by utilizing the so-called two-dimensional electron gas with very high mobility, the basic structure of the HEMT is a modulation doping heterojunction, the two-dimensional electron gas (2-DEG) with high mobility exists in the modulation doping heterojunction, the 2-DEG has very high mobility and can not be frozen at very low temperature, and the HEMT has very good low-temperature performance and can be used for low-temperature research work (such as fractional quantum Hall effect).

The HEMT device is a voltage control device, and the grid voltage Vg can control the depth of a heterojunction potential well and the area density of 2-DEG in the potential well, thereby controlling the working current of the device. For the HEMT of GaAs System, generalIn which n-Al is always present_xGa_1-xThe As control layer should be depleted (typically several hundred nanometers thick with a doping concentration of 10)⁷～10⁸/cm³) (ii) a If n-Al_xGa_1-xThe As layer has a large thickness and a high doping concentration, so that when Vg is equal to 0, 2-DEG exists, and the device is a depletion device, otherwise, the device is an enhancement device (when Vg is equal to 0, the Schottky depletion layer extends into the i-GaAs layer); however, if the layer is too thick and the doping concentration is too high, it will not be depleted during operation and will also exhibit leakage resistance in parallel with S-D.

Silicon carbide (SiC) is prepared by smelting quartz sand, petroleum coke (or coal coke), wood chips (salt is required when green silicon carbide is produced) and other raw materials at high temperature in a resistance furnace, and among modern C, N, B and other non-oxide high-technology refractory raw materials, the silicon carbide is the most widely and economically applied one and can be called as corundum or refractory sand. The silicon carbide produced at present is divided into black silicon carbide and green silicon carbide, both of which are hexagonal crystals, the specific gravity of the silicon carbide is 3.20-3.25, and the microhardness of the silicon carbide is 2840-3320 kg.

Silicon carbide has stable chemical properties, high thermal conductivity, small thermal expansion coefficient and good wear resistance, and has other purposes besides being used as an abrasive, for example, silicon carbide powder is coated on the inner wall of a water turbine impeller or a cylinder body by a special process, so that the wear resistance of the silicon carbide powder can be improved, and the service life of the silicon carbide powder is prolonged by 1-2 times; the high-grade refractory material prepared by the method has the advantages of thermal shock resistance, small volume, light weight, high strength and good energy-saving effect; the low-grade silicon carbide (containing SiC about 85%) is an excellent deoxidizer, and can be used for speeding up steel-making, easily controlling chemical composition and raising steel quality. In addition, silicon carbide is also used in great quantity to make silicon carbide rod for electric heating element.

In addition, silicon carbide has a high hardness, on the mohs scale of 9.5, next to the hardest diamond in the world (10), has excellent thermal conductivity, is a semiconductor, and is resistant to oxidation at high temperatures.

GaN is an extremely stable compound, yet a hard, high melting point material, with a melting point of about 1700 ℃, GaN has a high degree of ionization, the highest of group iii-v compounds (0.5 or 0.43); at atmospheric pressureNext, the GaN crystal is generally a hexagonal wurtzite structure; it has 4 atoms in one cell and an atomic volume of about half of GaAs. The electrical properties of GaN are the main factors affecting the device, and GaN not intentionally doped is n-type in each case, the best sample has an electron concentration of about 4 × 10¹⁶/cm³(ii) a The P-type samples prepared in general are highly compensated, and the GaN material series has low heat generation rate and high breakdown electric field, and is an important material for developing high-temperature high-power electronic devices and high-frequency microwave devices.

At present, with the progress of the MBE technology in GaN material application and the breakthrough of the key thin film growth technology, various GaN heterostructures are successfully grown, and novel devices such as metal field effect transistors (MESFETs), Heterojunction Field Effect Transistors (HFETs), modulation-doped field effect transistors (MODFETs) and the like are prepared by using GaN materials. The modulation doped AlGaN/GaN structure has high electron mobility (2000 cm)²S), high saturation velocity (1X 10)⁷cm/s) and low dielectric constant, which are the preferred materials for manufacturing microwave devices; the wide forbidden band width (3.4eV) of GaN and sapphire are used as the substrate, so that the heat dissipation performance is good, and the device can work under the condition of high power.

The forbidden band width of GaN is large (3.4eV), the thermal conductivity is high (1.3W/cm-K), the working temperature is high, the breakdown voltage is high, and the radiation resistance is strong; the bottom of the guide band of the GaN is at the point gamma, and the energy difference between the guide band and other energy valleys of the guide band is large, so that the valley scattering is not easy to generate, and a high strong field drift velocity (the electron drift velocity is not easy to saturate) can be obtained; GaN is easy to form mixed crystal with AlN, InN, etc., can be made into various heterostructures, and has mobility of 10 at low temperature⁵cm²2-DEG of/Vs (because the 2-DEG surface density is higher, factors such as optical phonon scattering, ionized impurity scattering and piezoelectric scattering are effectively shielded); GaN has relatively low lattice symmetry (hexagonal wurtzite structure or tetragonal metastable zincblende structure), strong piezoelectricity (due to non-centrosymmetry) and ferroelectricity (spontaneous polarization along the hexagonal c-axis): strong piezoelectric polarization (polarization electric field up to 2MV/cm) and spontaneous polarization (polarization electric field up to 3MV/cm) are generated near the heterojunction interface, and extremely high density is inducedInterface charges strongly modulate the energy band structure of the heterojunction, and strengthen the two-dimensional space limitation on the 2-DEG, thereby improving the surface density of the 2-DEG (up to 10 in the AlGaN/GaN heterojunction)¹³/cm²Which is an order of magnitude higher than in AlGaAs/GaAs heterojunctions), which is significant for device operation.

An embodiment of the utility model provides a high electron mobility transistor epitaxial structure, it includes interface processing layer, barrier layer, isolation layer and the channel layer that forms in proper order on the semi-insulating GaN substrate of N face polarity, wherein, at least the interface processing layer with the surface of barrier layer contact still has a plurality of nanometer graphic structures, just nanometer graphic structure with the interface processing layer is the homogeneous structure.

Further, the interface treatment layer comprises an AlN layer, and the thickness of the interface treatment layer is 2-5 nm.

Further, the nano-scale pattern structure includes nano-scale protrusions and nano-scale grooves, wherein the nano-scale protrusions have tips disposed toward the barrier layer, the height of the nano-scale protrusions is 0.1 to 0.3nm, and the depth of the nano-scale grooves is 0.1 to 0.3 nm.

Further, the nano-scale protrusions are of a conical structure.

Further, the nano-scale pattern structure and the interface processing layer are integrally formed, or the nano-scale pattern structure is formed on the surface of the interface processing layer in an epitaxial manner.

Further, the barrier layer comprises an AlGaN layer or an InGaN layer, and the thickness of the barrier layer is 15-25 nm.

Further, the content of the Al or In component In the barrier layer is 15 to 100%.

Further, the isolating layer comprises an AlN layer and has a thickness of 0.5-1 nm.

Furthermore, the channel layer comprises a GaN, InN, In GaN or AlGaN layer, and the thickness of the channel layer is 100-300 nm. If the AlGaN layer is used, the Al component content is 0-15%. In case of InGaN layer, the In component content is 0-15%.

Further, a contact layer is formed on the channel layer, the contact layer comprises an InN layer, and the thickness of the contact layer is 1-3 nm.

Furthermore, the surface of one side of the semi-insulating GaN substrate, which is far away from the interface processing layer, is also provided with a plurality of nano holes, the aperture of each nano hole is 1-5nm, the depth of each nano hole is smaller than 1/3 of the semi-insulating GaN substrate, and the volume ratio of the plurality of nano holes to the semi-insulating GaN substrate is smaller than 10%.

Further, the growth conditions of the interface treatment layer comprise:

taking 50-80% of hydrogen and 20-50% of ammonia as raw materials, reacting for 5-10 minutes at 1050-1100 ℃ under 400-700 mbar, and then introducing an Al source at a flow rate of 0-50 umol/min; wherein, the ratio of hydrogen and ammonia gas can be volume ratio or mass ratio;

and forming the nano-scale pattern structure on the surface of the interface processing layer by adopting an ion bombardment or wet etching mode or a direct epitaxial growth mode, and controlling the size of the nano-scale pattern structure by adjusting the conditions of the ion bombardment or wet etching and epitaxial growth, wherein the method can be realized by adopting a means known by a person skilled in the art.

The embodiment of the utility model provides a high electron mobility transistor is still provided, it includes:

the high electron mobility transistor epitaxial structure; and the source electrode, the drain electrode and the grid electrode are matched with the high electron mobility transistor epitaxial structure, and the grid electrode is distributed between the source electrode and the drain electrode.

Further, the source and the drain are electrically connected to the contact layer, for example, the source and the drain form an ohmic contact with the contact layer.

Further, a gate dielectric layer is further disposed between the gate and the contact layer, and the gate dielectric layer may be made of a material known to those skilled in the art, and the thickness is not particularly limited.

The technical solution, the implementation process and the principle thereof will be further explained with reference to the drawings and the specific embodiments.

Example 1

Referring to fig. 2, an epitaxial structure of a GaN substrate-based high electron mobility transistor includes an interface treatment layer 20, an AlGaN barrier layer 30, an AlN isolation layer 40, a GaN channel layer 50, and an InN contact layer 60 sequentially formed on a semi-insulating GaN substrate 10 having N-plane polarity, wherein the AlGaN barrier layer 30 and the GaN channel layer 50 cooperate to form a heterojunction, and two-dimensional electron gas is provided between the AlGaN barrier layer 30 and the GaN channel layer 50; wherein the interface treatment layer 20 is an AlN layer of 5nm, the AlGaN barrier layer 30 is 20nm thick, the Al component content is 25% (mass fraction, the same applies hereinafter), the AlN isolation layer 40 is 1nm thick, the GaN channel layer 50 is 300nm thick, and the InN contact layer 60 is 2nm thick; and at least the surface of the interface processing layer 20 contacting the barrier layer 30 further has a plurality of nano-scale pattern structures, and the nano-scale pattern structures and the interface processing layer are homogeneous structures, and the nano-scale pattern structures include nano-scale protrusions and nano-scale grooves, wherein the nano-scale protrusions have tips disposed toward the barrier layer 30, the height of the nano-scale protrusions is 0.1-0.3nm, and the depth of the nano-scale grooves is 0.1-0.3nm, for example, the nano-scale protrusions are tapered structures.

Specifically, the nano-scale pattern structure and the interface processing layer are integrally formed, or the nano-scale pattern structure is formed on the surface of the interface processing layer in an epitaxial manner.

The manufacturing method of the GaN substrate-based high-electron-mobility transistor epitaxial structure specifically comprises the following steps:

1) providing a semi-insulating GaN substrate with N-surface polarity, and processing the back surface of the semi-insulating GaN substrate to form a plurality of nano holes;

2) placing the semi-insulating GaN substrate with N-face polarity in a reaction vessel or a reaction system, introducing 70% of hydrogen and 30% of ammonia gas into the reaction vessel or the reaction system at 1100 ℃ and 600mbar, and baking for 10 minutes (aiming at removing impurity elements such as O in high-activity N-face GaN on the surface of the semi-insulating GaN substrate on the premise of ensuring flatness);

3) then, the temperature of the reaction container or the reaction system is reduced to 1000 ℃, and a small amount of Al is introduced under the condition of 100mbar pressure, so that a smooth AlN layer with the thickness of about 5nm is formed by deposition, the flatness of the epitaxial layer can be improved again because the Al has the effect of filling holes, meanwhile, a cushion can be laid and excessive for the growth of a barrier layer containing the Al so as to improve the flatness and the crystal quality of a subsequent AlGaN/GaN heterojunction, then, the nano-scale pattern structure is formed on the surface of the interface processing layer by adopting an ion bombardment or wet etching mode or a direct epitaxial growth mode, the size of the nano-scale pattern structure is controlled by adjusting the conditions of the ion bombardment or the wet etching and the epitaxial growth, and the method can be realized by adopting a means known by technicians in the field;

4) keeping the growth condition of the AlN interface treatment layer, and sequentially growing a 20nm AlGaN (Al component 25%) barrier layer, a 1nm AlN isolating layer and a 300nm GaN channel layer on the AlN interface treatment layer, wherein the AlGaN barrier layer and the GaN channel layer are manufactured in a different sequence from that of the traditional Ga-surface HEMT because the built-in electric field of the N-surface GaN is opposite and the position of the generated two-dimensional electron gas (2DEG) is different;

5) and cooling the reaction container or the reaction system to 700 ℃, and growing an InN contact layer on the GaN channel layer under the pressure condition of 300 mbar.

Comparative example 1

As shown in fig. 1, a SiC hetero-substrate based high electron mobility transistor epitaxial structure includes a SiC hetero-substrate, and an AlN buffer layer (about 200nm), a high-resistance GaN layer (about 2um), a GaN channel layer (about 300nm), an AlN isolation layer (about 1nm), an AlGaN barrier layer (about 20nm), and a GaN (about 2nm) cap layer sequentially disposed on the SiC hetero-substrate.

The I-V test (test method can be performed by methods and equipment known to those skilled in the art) is performed on the HEMT device based on the GaN substrate (defined as HEMT-1) obtained in embodiment 1 of the present invention and the HEMT device based on the SiC hetero-substrate (defined as HEMT-2) obtained in comparative example 1, respectively, and the test result is shown in fig. 5, as can be seen from fig. 5, the HEMT device based on the GaN substrate obtained in embodiment 1 of the present invention has higher breakdown voltage and lower buffer leakage current.

Specifically, please refer to fig. 3 and fig. 4, when the HEMT device is under a severer working condition, the present invention provides a GaN substrate based HEMT epitaxial structure, which is more advantageous than the SiC hetero-substrate based HEMT epitaxial structure of comparative example 1 in that the present invention provides a GaN substrate based HEMT epitaxial structure, and the present invention adopts a semi-insulating GaN self-supporting substrate with N-plane polarity, which can avoid the defects caused by lattice mismatch and thermal mismatch due to hetero-epitaxy, thereby causing a leakage channel at the buffer layer; meanwhile, the embodiment 1 of the utility model adopts the semi-insulating GaN substrate with N-surface polarity to improve the high-frequency response, adopts the InN contact layer to reduce the surface state density of the device, and inhibits the leakage channel between the epitaxial layer and the passivation layer; and the leakage channel is cut off from the two aspects, the current collapse effect is eliminated and reduced, the high performance of the GaN-based HEMT device is improved, and the application of the GaN-based HEMT device in high-temperature, high-frequency and high-power occasions is widened.

Specifically, the embodiment of the utility model provides a pair of high electron mobility transistor epitaxial structure's preparation method only needs to pass the less GaN channel layer of forbidden band width, can realize the low resistance connection of source/drain terminal, is different from the great AlGaN barrier layer of forbidden band width that need pass of current high electron mobility transistor epitaxial structure, consequently, the utility model discloses can obtain the contact resistance of lower surface state.

The embodiment of the utility model provides a semi-insulating characteristic of the GaN substrate in the high electron mobility transistor epitaxial structure can be accomplished through earlier stage preparation, can avoid the adverse effect that later stage growth high resistance epitaxial layer brought; the semi-insulating property of the GaN substrate can be obtained by: after the fabrication in the HVPE reactor is completed, the GaN substrate is formed by stripping, grinding and polishing, and then the HEMT structure is grown in the MOCVD reactor, and the specific parameters and processes can be implemented using existing techniques known to those skilled in the art.

Specifically, homoepitaxy does not have the problem of a high-density dislocation buffer layer on a heterogeneous substrate, and proper interface treatment and growth are carried out in epitaxy, so that the generation of a leakage channel can be completely blocked; moreover, the GaN is a polar material, the contact resistance of the N-surface polar GaN material is lower, and the surface state density between the GaN and the passivation layer can be improved, so that the leakage problem is avoided; the N-face polar GaN material also has higher transconductance and can work at higher frequency; in addition, high quality single polarity N-face polar GaN materials can only be obtained by homoepitaxy compared to heteroepitaxy.

It should be understood that the above-mentioned embodiments are merely illustrative of the technical concepts and features of the present invention, and the purpose thereof is to enable those skilled in the art to understand the contents of the present invention and to implement the present invention, and therefore, the protection scope of the present invention should not be limited thereby. All equivalent changes and modifications made according to the spirit of the present invention should be covered by the protection scope of the present invention.

Claims (10)

1. An epitaxial structure of a high electron mobility transistor is characterized by comprising an interface processing layer, a barrier layer, an isolation layer and a channel layer which are sequentially formed on a semi-insulating GaN substrate with N-surface polarity, wherein at least the surface of the interface processing layer, which is in contact with the barrier layer, is also provided with a plurality of nanoscale pattern structures, and the nanoscale pattern structures and the interface processing layer are of a same-quality structure.

2. The hemt epitaxial structure of claim 1, wherein: the interface treatment layer comprises an AlN layer, and the thickness of the interface treatment layer is 2-5 nm.

3. The hemt epitaxial structure of claim 1, wherein: the nanoscale pattern structure comprises nanoscale protrusions and nanoscale grooves, wherein the nanoscale protrusions are provided with tips arranged towards the barrier layer, the height of the nanoscale protrusions is 0.1-0.3nm, and the depth of the nanoscale grooves is 0.1-0.3 nm;

and/or the nano-scale protrusions are conical structures.

4. The hemt epitaxial structure of claim 1, wherein: the nano-scale pattern structure and the interface processing layer are integrally formed, or the nano-scale pattern structure is formed on the surface of the interface processing layer in an epitaxial mode.

5. The hemt epitaxial structure of claim 1, wherein: the barrier layer comprises an AlGaN layer or an InGaN layer, and the thickness of the barrier layer is 15-25 nm.

6. The hemt epitaxial structure of claim 1, wherein: the isolating layer comprises an AlN layer, and the thickness of the isolating layer is 0.5-1 nm;

and/or the channel layer comprises a GaN, InN, In GaN or AlGaN layer, and the thickness of the channel layer is 100-300 nm;

and/or a contact layer is further formed on the channel layer, the contact layer comprises an InN layer, and the thickness of the contact layer is 1-3 nm.

7. The hemt epitaxial structure of claim 1, wherein: the surface of one side, far away from the interface treatment layer, of the semi-insulating GaN substrate is further provided with a plurality of nano holes, the aperture of each nano hole is 1-5nm, the depth of each nano hole is smaller than 1/3 of the semi-insulating GaN substrate, and the volume ratio of the nano holes to the semi-insulating GaN substrate is smaller than 10%.

8. A high electron mobility transistor, comprising:

the high electron mobility transistor epitaxial structure of any one of claims 1-7;

and the source electrode, the drain electrode and the grid electrode are matched with the high electron mobility transistor epitaxial structure, and the grid electrode is distributed between the source electrode and the drain electrode.

9. The hemt of claim 8, wherein: the source electrode and the drain electrode are electrically combined with the contact layer.

10. The hemt of claim 8, wherein: and a gate dielectric layer is also distributed between the gate and the contact layer.

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