CN213426015U - Drive circuit that transformer was kept apart - Google Patents
Drive circuit that transformer was kept apart Download PDFInfo
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- CN213426015U CN213426015U CN202022396917.1U CN202022396917U CN213426015U CN 213426015 U CN213426015 U CN 213426015U CN 202022396917 U CN202022396917 U CN 202022396917U CN 213426015 U CN213426015 U CN 213426015U
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Abstract
The utility model discloses a drive circuit of transformer isolation belongs to switching power supply technical field, include: the driving transformer is provided with a primary winding and two secondary windings, one end of the primary winding is connected with a primary driving signal, the other end of the primary winding is connected with a capacitor C2, the capacitor C2 is connected with the primary driving signal, the two secondary windings are an upper secondary winding and a lower secondary winding respectively, and the upper secondary winding and the lower secondary winding are connected in a complementary driving mode; one end of the upper secondary winding is connected with the reference end and the input end of the resistor R4 respectively; the other end of the upper secondary winding is connected with the driving end and the input end of the upper turn-off accelerating circuit respectively; and the upper negative voltage bias circuit is arranged between the output end of the resistor R4 and the output end of the upper turn-off accelerating circuit or is arranged behind the output end of the resistor R4 and the output end of the upper turn-off accelerating circuit.
Description
Technical Field
The utility model relates to a switching power supply technical field, more specifically say, relate to a drive circuit that transformer is kept apart.
Background
At present, bridge arm power tube isolation driving circuits in DCDC conversion in the industry have various types, and have driving circuits which adopt isolation driving chips and high-speed driving optocouplers for isolation, and the circuits have relatively high cost, and in addition, or need independent additional power supplies or bootstrap power supplies, so that the circuits are not used as flexibly and conveniently as possible; there are various types of driving circuits isolated by using a driving transformer, but it is difficult to satisfy the driving requirements of high frequency, high speed and low loss at present, for example, patent No. CN103066814B, an isolated driving circuit has its own advantages in terms of cost, driving loss, reliability, etc., a typical circuit in patent No. CN103066814B is shown in fig. 1, the turn-off speed of the circuit in fig. 1 is not fast enough, fig. 2 is a driving circuit for accelerating turn-off in the patent, but fig. 2 is a driving circuit for accelerating turn-off in fig. 2, but where fig. 2 is still to be further improved, the part to be improved in the driving circuit in fig. 2 is specifically described below.
The transformer drive corresponds to three states, the high level is an on state, the dead time is zero level and the reverse cut-off state is a negative level, fig. 2 is a drive circuit which is preferably introduced with an anti-saturation diode and is beneficial to accelerating the turn-off, a diode connected in series with the base of a triode is added, the steady-state turn-off voltage of a power tube is theoretically raised when the high level is changed to the zero level, the turn-off immunity of the power tube is reduced, the drain electrode of the power tube is charged to the grid electrode through an equivalent capacitor between the drain electrode and the grid electrode due to the Miller effect of the MOSFET of the power tube at the turn-off moment, and the reliable turn-off is not facilitated or the; the key point is that when the circuit is lowered to a zero level from a high level and a negative level is raised to the zero level, because the driving circuit has leakage inductance of a transformer and inductance of a driving loop, the level is instantly resonated to the negative level when being lowered to the zero level, and the negative level is instantly resonated to the positive level when being raised to the zero level as shown in fig. 3, and at the moment, normal logic should be the zero level of a dead zone, if the negative level and the positive level generated by resonance exceed driving thresholds of the power tube, the instant on of one of the upper power tube and the lower power tube of the bridge arm which are both in the off state can be caused in the dead zone time, and if the instant on which the driving of the power tube is lowered to the zero level from the high level is not completely turned off, the instant on of the upper power tube and the lower power tube of the bridge arm.
SUMMERY OF THE UTILITY MODEL
1. Technical problem to be solved
To the problem that exists among the prior art, the utility model aims to provide a drive circuit that transformer is kept apart.
2. Technical scheme
In order to solve the above problem, the utility model adopts the following technical scheme:
a transformer isolated drive circuit comprising:
the driving transformer is provided with a primary winding and two secondary windings, one end of the primary winding is connected with a primary driving signal, the other end of the primary winding is connected with a capacitor C2, the capacitor C2 is connected with the primary driving signal, the two secondary windings are an upper secondary winding and a lower secondary winding respectively, and the upper secondary winding and the lower secondary winding are connected in a complementary driving mode;
one end of the upper secondary winding is connected with a reference end and the input end of the resistor R4 respectively;
the other end of the upper secondary winding is respectively connected with the driving end and the input end of the upper turn-off accelerating circuit;
an upper negative voltage bias circuit disposed between the output terminal of the resistor R4 and the output terminal of the upper turn-off acceleration circuit or disposed after the output terminal of the resistor R4 and the output terminal of the upper turn-off acceleration circuit;
an upper reverse clamp circuit, wherein:
when the upper negative voltage bias circuit is arranged between the output end of the resistor R4 and the output end of the upper turn-off accelerating circuit, the output end of the upper turn-off accelerating circuit is connected with the input end of the upper reverse clamping circuit;
when the upper negative voltage bias circuit is arranged behind the output end of the resistor R4 and the output end of the upper turn-off accelerating circuit, the output end of the upper negative voltage bias circuit is connected with the input end of the upper reverse clamping circuit;
one end of the lower secondary winding is connected with a reference end and the input end of the resistor R8 respectively;
the other end of the lower secondary winding is respectively connected with the driving end and the input end of the lower turn-off accelerating circuit;
a lower negative voltage bias circuit disposed between the output terminal of the resistor R8 and the output terminal of the lower turn-off acceleration circuit or disposed after the output terminal of the resistor R8 and the output terminal of the lower turn-off acceleration circuit; and
a lower reverse clamp circuit, wherein:
when the lower negative voltage bias circuit is arranged between the output end of the resistor R8 and the output end of the lower turn-off accelerating circuit, the output end of the lower turn-off accelerating circuit is connected with the input end of the lower reverse clamping circuit;
when the lower negative voltage bias circuit is arranged behind the output end of the resistor R8 and the output end of the lower turn-off accelerating circuit, the output end of the lower negative voltage bias circuit is connected with the input end of the lower reverse clamping circuit.
As an optimized scheme of the utility model, go up the turn-off accelerating circuit and include resistance R1, resistance R3, diode VD1, diode VD2, diode VD3 and triode V11, the other end of going up the secondary winding is connecting resistance R1's input and diode VD 1's input respectively, triode V11's base is connected to resistance R1's output, triode V11's projecting pole is connected to diode VD 1's output, triode VD 2's input and triode VD 3's input are connected respectively to triode V11's collecting electrode, triode V11's base is connected to diode VD 2's output, triode VD 3's output connecting resistance R3's input.
As a preferred embodiment of the present invention, the upper negative voltage bias circuit includes a capacitor C1 and a zener diode VD 5;
when the upper negative voltage bias circuit is arranged between the output end of the resistor R4 and the output end of the upper turn-off accelerating circuit, the output end of the resistor R4 is respectively connected with the input end of the capacitor C1 and the input end of the voltage stabilizing diode VD5, and the output end of the capacitor C1 and the output end of the voltage stabilizing diode VD5 are both connected with the output end of the resistor R3;
when the upper negative voltage bias circuit is arranged between the output end of the resistor R8 and the output end of the lower turn-off accelerating circuit, the output end of the resistor R4 is connected with the output end of the resistor R3, and the output end of the resistor R4 is connected with the output end of the resistor R3 and then is respectively connected with the input end of the capacitor C1 and the input end of the voltage stabilizing diode VD 5.
As a preferred scheme of the present invention, the upper reverse clamping circuit includes a zener diode VD11 and a diode VD 4;
when the upper negative voltage bias circuit is arranged between the output end of the resistor R4 and the output end of the upper turn-off accelerating circuit, the output end of the resistor R3 is connected with the input end of the diode VD4, and the output end of the diode VD4 is connected with the input end of the voltage stabilizing diode VD 11;
when the upper negative voltage bias circuit is arranged between the output end of the resistor R8 and the output end of the lower turn-off accelerating circuit, the output end of the capacitor C1 is connected with the output end of the diode VD5 and then is connected with the input end of the diode VD4, and the output end of the diode VD4 is connected with the input end of the voltage stabilizing diode VD 11.
As a preferred aspect of the present invention, the upper reverse clamping circuit includes a resistor R2 and a diode VD 4;
when the upper negative voltage bias circuit is arranged between the output end of the resistor R4 and the output end of the upper turn-off accelerating circuit, the output end of the resistor R3 is connected with the input end of the diode VD4, and the output end of the diode VD4 is connected with the input end of the resistor R2;
when the upper negative voltage bias circuit is arranged between the output end of the resistor R8 and the output end of the lower turn-off accelerating circuit, the output end of the capacitor C1 is connected with the output end of the diode VD5 and then is connected with the input end of the diode VD4, and the output end of the diode VD4 is connected with the input end of the resistor R2.
As an optimized scheme of the utility model, lower shutoff accelerating circuit includes resistance R5, resistance R7, diode VD6, diode VD7, diode VD8 and triode V12, the other end of lower secondary winding is connecting resistance R5's input and diode VD 6's input respectively, triode V12's base is connected to resistance R5's output, triode V12's projecting pole is connected to diode VD 6's output, triode VD 7's input and triode VD 8's input are connected respectively to triode V12's collecting electrode, triode V12's base is connected to diode VD 7's output, triode VD 8's output connecting resistance R7's input.
As a preferred embodiment of the present invention, the lower negative voltage bias circuit includes a capacitor C3 and a zener diode VD 10;
when the lower negative voltage bias circuit is arranged between the output end of the resistor R8 and the output end of the lower turn-off accelerating circuit, the output end of the resistor R8 is respectively connected with the input end of the capacitor C3 and the input end of the voltage stabilizing diode VD10, and the output end of the capacitor C3 and the output end of the voltage stabilizing diode VD10 are both connected with the output end of the resistor R7;
when the lower negative voltage bias circuit is arranged between the output end of the resistor R8 and the output end of the lower turn-off accelerating circuit, the output end of the resistor R8 is connected with the output end of the resistor R7, and the output end of the resistor R8 is connected with the output end of the resistor R7 and then is respectively connected with the input end of the capacitor C3 and the input end of the voltage stabilizing diode VD 10.
As a preferred scheme of the present invention, the lower reverse clamping circuit includes a zener diode VD12 and a diode VD 9;
when the lower negative voltage bias circuit is arranged between the output end of the resistor R8 and the output end of the lower turn-off accelerating circuit, the output end of the resistor R7 is connected with the input end of the diode VD9, and the output end of the diode VD9 is connected with the input end of the voltage stabilizing diode VD 12;
when the lower negative voltage bias circuit is arranged between the output end of the resistor R8 and the output end of the lower turn-off accelerating circuit, the output end of the capacitor C3 is connected with the output end of the diode VD10 and then is connected with the input end of the diode VD9, and the output end of the diode VD9 is connected with the input end of the voltage stabilizing diode VD 12.
As a preferred aspect of the present invention, the lower reverse clamp circuit includes a resistor R6 and a diode VD 9;
when the lower negative voltage bias circuit is arranged between the output end of the resistor R8 and the output end of the lower turn-off accelerating circuit, the output end of the resistor R7 is connected with the input end of the diode VD9, and the output end of the diode VD9 is connected with the input end of the resistor R6;
when the lower negative voltage bias circuit is arranged between the output end of the resistor R8 and the output end of the lower turn-off accelerating circuit, the output end of the capacitor C3 is connected with the output end of the diode VD10 and then is connected with the input end of the diode VD9, and the output end of the diode VD9 is connected with the input end of the resistor R6.
3. Advantageous effects
Compared with the prior art, the utility model has the advantages of:
the utility model omits an anti-saturation diode, and simplifies and optimizes the circuit slightly; an upper negative bias voltage circuit and a lower negative bias voltage circuit are added, a certain value negative bias voltage is provided for the diode VD4 and the diode VD9 in the time from high level to zero level and dead zone, a certain value negative bias voltage is provided for the diode VD4 and the diode VD9 in the time from negative level to zero level and dead zone, the increased negative bias voltage is favorable for improving the noise immunity of the driving signal to abnormal opening, and the stability of the disconnection of the diode VD4 and the diode VD9 is increased, which is favorable for the reliability of the utility model; the upper reverse clamping circuit is changed into a diode VD4 which is connected with a voltage stabilizing diode VD11 in series, so that the turn-off acceleration performance can be adjusted more flexibly and conveniently by adjusting a resistor R1 and a resistor R3; the lower reverse clamping circuit is changed into a diode VD9 connected in series with a voltage stabilizing diode VD12, so that the turn-off acceleration performance can be adjusted more flexibly and conveniently by adjusting a resistor R5 and a resistor R7; finally, the reverse clamping voltage is kept stable or meets the requirement under the conditions of high frequency and small duty ratio in the working range, the basic stability and controllability of the reverse clamping voltage are ensured, and the driving loss can be effectively reduced.
Drawings
Fig. 1 is a driving circuit of the prior art in a transformer isolated driving circuit of the present invention;
fig. 2 is a prior art drive circuit with anti-saturation diodes in a transformer isolated drive circuit of the present invention;
fig. 3 is a driving waveform diagram of a driving circuit having an anti-saturation diode according to the prior art in a transformer-isolated driving circuit of the present invention;
fig. 4 is a circuit diagram of the driving circuit of the present invention according to embodiment 1;
fig. 5 is a circuit diagram of the driving circuit of the present invention according to embodiment 2;
fig. 6 is a circuit diagram of the driving circuit of the transformer isolation according to embodiment 3 of the present invention;
fig. 7 is a schematic diagram of the transformer isolated driving circuit of the present invention when the driving end is switched from zero level to high level and maintains high level;
fig. 8 is a schematic diagram of the operation of the transformer isolated driving circuit when the driving end is switched from high level to zero level;
fig. 9 is a schematic diagram of the operation of the transformer isolated driving circuit when the driving end is changed from zero level to negative level;
fig. 10 is a schematic diagram of the operation of the transformer isolated driving circuit when the driving end is turned from negative level to zero level;
fig. 11 is an ideal driving waveform diagram when no leakage inductance is included in the transformer isolated driving circuit of the present invention;
fig. 12 is a driving waveform diagram of the transformer isolated driving circuit according to the present invention when the driving circuit includes leakage inductance.
The reference numbers in the figures illustrate:
1. an upper turn-off acceleration circuit; 2. an upper negative voltage bias circuit; 3. an upper reverse clamp circuit; 4. a lower turn-off acceleration circuit; 5. a lower negative voltage bias circuit; 6. a lower reverse clamp circuit.
Detailed Description
The technical solution in the embodiment of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiment of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all embodiments, and all other embodiments obtained by those skilled in the art without any inventive work are within the scope of the present invention based on the embodiments of the present invention.
In the description of the present invention, it should be noted that the terms "upper", "lower", "inner", "outer", "top/bottom", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience of description and simplification of description, but do not indicate or imply that the device or element referred to must have a specific orientation, be constructed in a specific orientation, and be operated, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present invention, it is to be noted that, unless otherwise explicitly specified or limited, the terms "mounted", "provided", "sleeved/connected", "connected", and the like are to be understood in a broad sense, such as "connected", which may be fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present invention can be understood in specific cases to those skilled in the art.
Example 1:
referring to fig. 4, a transformer isolated driving circuit includes:
the driving transformer is provided with a primary winding and two secondary windings, one end of the primary winding is connected with a primary driving signal, the other end of the primary winding is connected with a capacitor C2, the capacitor C2 is connected with the primary driving signal, the two secondary windings are an upper secondary winding and a lower secondary winding respectively, and the upper secondary winding and the lower secondary winding are connected in a complementary driving mode;
one end of the upper secondary winding is connected with the reference end and the input end of the resistor R4 respectively;
the upper turn-off accelerating circuit 1 is characterized in that the other end of an upper secondary winding is connected with a driving end and the input end of the upper turn-off accelerating circuit 1 respectively, the upper turn-off accelerating circuit 1 comprises a resistor R1, a resistor R3, a diode VD1, a diode VD2, a diode VD3 and a triode V11, the other end of the upper secondary winding is connected with the input end of a resistor R1 and the input end of a diode VD1 respectively, the output end of the resistor R1 is connected with the base electrode of a triode V11, the output end of the diode VD1 is connected with the emitter electrode of a triode V11, the collector electrode of the triode V11 is connected with the input end of a triode VD2 and the input end of a triode VD3 respectively, the output end of the diode VD2 is connected with the base electrode of a triode;
the upper negative voltage bias circuit 2 is arranged between the output end of the resistor R4 and the output end of the upper turn-off accelerating circuit 1, the upper negative voltage bias circuit 2 comprises a capacitor C1 and a voltage stabilizing diode VD5, the output end of the resistor R4 is respectively connected with the input end of the capacitor C1 and the input end of the voltage stabilizing diode VD5, and the output end of the capacitor C1 and the output end of the voltage stabilizing diode VD5 are both connected with the output end of the resistor R3;
the output end of the upper turn-off accelerating circuit 1 is connected with the input end of the upper reverse clamping circuit 3, the upper reverse clamping circuit 3 comprises a voltage stabilizing diode VD11 and a diode VD4, the output end of a resistor R3 is connected with the input end of a diode VD4, and the output end of the diode VD4 is connected with the input end of a voltage stabilizing diode VD 11;
one end of the lower secondary winding is connected with the reference end and the input end of the resistor R8 respectively;
the lower turn-off accelerating circuit 4 is characterized in that the other end of a lower secondary winding is connected with a driving end and the input end of the lower turn-off accelerating circuit 4 respectively, the lower turn-off accelerating circuit 4 comprises a resistor R5, a resistor R7, a diode VD6, a diode VD7, a diode VD8 and a triode V12, the other end of the lower secondary winding is connected with the input end of a resistor R5 and the input end of a diode VD6 respectively, the output end of the resistor R5 is connected with the base electrode of a triode V12, the output end of the diode VD6 is connected with the emitter electrode of a triode V12, the collector electrode of the triode V12 is connected with the input end of a triode VD7 and the input end of a triode VD8 respectively, the output end of the diode VD7 is connected with the base electrode of a triode;
the lower negative voltage bias circuit 5 is arranged between the output end of the resistor R8 and the output end of the lower turn-off accelerating circuit 4, the lower negative voltage bias circuit 5 comprises a capacitor C3 and a voltage stabilizing diode VD10, the output end of the resistor R8 is respectively connected with the input end of the capacitor C3 and the input end of the voltage stabilizing diode VD10, and the output end of the capacitor C3 and the output end of the voltage stabilizing diode VD10 are both connected with the output end of the resistor R7;
the output end of the lower cut-off accelerating circuit 4 is connected with the input end of the lower reverse clamping circuit 6, the lower reverse clamping circuit 6 comprises a voltage stabilizing diode VD12 and a diode VD9, the output end of a resistor R7 is connected with the input end of a diode VD9, and the output end of the diode VD9 is connected with the input end of a voltage stabilizing diode VD 12.
The working principle is as follows: it should be noted that: since the upper turn-off accelerating circuit and the lower turn-off accelerating circuit have the same structure, the upper reverse clamping circuit and the lower reverse clamping circuit have the same structure, and the upper negative voltage bias circuit and the lower negative voltage bias circuit have the same structure, the description is given by way of example only above;
when the driving end is changed from a zero level to a high level and maintains the high level, the circuit works as shown in fig. 7, a forward driving signal charges an equivalent gate-source capacitor Cin connected between a DRV01 and a COM01 through a diode VD1, an upper turn-off accelerating circuit and an upper reverse clamping circuit are both in a blocking state, a triode V11 is normally turned on, a capacitor C1 is precharged with a certain voltage in the mode, the positive and negative polarities are shown in fig. 7, and it needs to be explained that: fig. 3 does not show the equivalent gate-source capacitor Cin, but fig. 7 shows how the equivalent gate-source capacitor Cin is disposed, which is common knowledge of those skilled in the art, and fig. 7 can also directly obtain the equivalent gate-source capacitor Cin, so that the description is omitted, and the DRV01 and the COM01 are common knowledge of those skilled in the art, and therefore the connection relationship thereof is not described in too much detail;
when the driving end is switched from high level to zero level, as shown in fig. 8, the charge of the equivalent gate-source capacitor Cin and the capacitor C1 connected in series is discharged through the base current of the turn-off triode V11, and the charge of the equivalent gate-source capacitor Cin is simultaneously accelerated and discharged to zero through the collector current of the turn-off triode V11, so that the fast turn-off of the diode VD4 is realized, and simultaneously, the voltage and the positive and negative polarities of the equivalent gate-source capacitor Cin are maintained to be basically unchanged, so that a negative voltage with basically equal amplitude value fused into C1 is added to the equivalent gate-source capacitor Cin, that is, the voltage Vgs polarity of the equivalent gate-source capacitor Cin in fig. 7 is changed into that the upper end is negative and the lower end is positive and is basically maintained to be unchanged in dead time, so that the reliable turn-off of the power switching tube in the dead time is ensured, and the driving;
when the driving end is turned from zero level to negative level as shown in fig. 9, a driving signal passes through a resistor R4, a capacitor C1, an input end of a zener diode VD5, an upper reverse clamp circuit, an equivalent gate-source capacitor Cin, a base of a triode V11 and a resistor R1, so that the capacitor C1 is discharged until zero, and then further the zener diode VD5 is conducted in the forward direction to cause the positive and negative polarities of the capacitor C1 to be reversed, a voltage drop similar to the forward conduction of the diode VD4 is generated, the equivalent gate-source capacitor Cin is further charged in the reverse direction until the zener diode VD11 breaks down in the reverse direction to be conducted and then is basically kept unchanged, during the period that the driving end is maintained at negative level, the voltage value on the equivalent gate-source capacitor Cin is basically kept unchanged, the voltage polarity is maintained at the negative end, the negative end is maintained at the negative end, the diode VD4 is reliably;
when the driving end is turned from negative level to zero level, as shown in fig. 10, the charge serially connected between the equivalent gate-source capacitor Cin and the capacitor C1 will be discharged through the diode VD1, the forward voltage drop of the zener diode VD5 is VD about 0.7V, the zener diode VD11 is Vz, the forward voltage drop of the diode VD4 is Vst about 0.3V, and when the driving end is turned from negative level to zero level, the voltage drop of the equivalent gate-source capacitor Cin and the capacitor C1 is Vst about 0.3V
Namely when
When the charge of the capacitor C1 is completely discharged, the charge on the equivalent gate-source capacitor Cin is not discharged yet, so that the charge on the equivalent gate-source capacitor Cin charges the negative capacitor C1 with a voltage with a polarity opposite to the positive polarity and the negative polarity identified in fig. 10, that is, at this time, Vgs on the equivalent gate-source capacitor Cin still maintains a certain small negative voltage value as shown in fig. 10, thereby ensuring that the power switching tube in the dead zone maintains a reliable turn-off state; in an actual inductive discharge loop, due to resonance, the equivalent gate-source capacitor Cin can be further subjected to unidirectional resonance through the diode VD1, and a smaller forward voltage is charged into the equivalent gate-source capacitor Cin, and the forward voltage generated when the driving terminal Vgs shown in fig. 11 is turned from a negative level to a zero level and in a dead time simulates that the equivalent leakage inductance is generated due to resonance introduced into the leakage loop, so that the total inductance of the loop needs to be reduced as much as possible during design, and the key is to reduce the leakage inductance of the driving transformer and reduce the area of the driving wiring loop.
Example 2:
referring to fig. 6, a transformer isolated driving circuit includes:
the driving transformer is provided with a primary winding and two secondary windings, one end of the primary winding is connected with a primary driving signal, the other end of the primary winding is connected with a capacitor C2, the capacitor C2 is connected with the primary driving signal, the two secondary windings are an upper secondary winding and a lower secondary winding respectively, and the upper secondary winding and the lower secondary winding are connected in a complementary driving mode;
one end of the upper secondary winding is connected with the reference end and the input end of the resistor R4 respectively;
the upper turn-off accelerating circuit 1 is characterized in that the other end of an upper secondary winding is connected with a driving end and the input end of the upper turn-off accelerating circuit 1 respectively, the upper turn-off accelerating circuit 1 comprises a resistor R1, a resistor R3, a diode VD1, a diode VD2, a diode VD3 and a triode V11, the other end of the upper secondary winding is connected with the input end of a resistor R1 and the input end of a diode VD1 respectively, the output end of the resistor R1 is connected with the base electrode of a triode V11, the output end of the diode VD1 is connected with the emitter electrode of a triode V11, the collector electrode of the triode V11 is connected with the input end of a triode VD2 and the input end of a triode VD3 respectively, the output end of the diode VD2 is connected with the base electrode of a triode;
the upper negative voltage bias circuit 2 is arranged after the output end of the resistor R4 and the output end of the upper turn-off accelerating circuit 1, the upper negative voltage bias circuit 2 comprises a capacitor C1 and a voltage stabilizing diode VD5, the output end of the resistor R4 is connected with the output end of the resistor R3, and the output end of the resistor R4 is connected with the output end of the resistor R3 and then respectively connected with the input end of the capacitor C1 and the input end of the voltage stabilizing diode VD 5;
the output end of the upper negative voltage bias circuit 2 is connected with the input end of the upper reverse clamp circuit 3, the upper reverse clamp circuit 3 comprises a voltage stabilizing diode VD11 and a diode VD4, the output end of a capacitor C1 is connected with the output end of the diode VD5 and then connected with the input end of the diode VD4, and the output end of a diode VD4 is connected with the input end of a voltage stabilizing diode VD 11;
one end of the lower secondary winding is connected with the reference end and the input end of the resistor R8 respectively;
the lower turn-off accelerating circuit 4 is characterized in that the other end of a lower secondary winding is connected with a driving end and the input end of the lower turn-off accelerating circuit 4 respectively, the lower turn-off accelerating circuit 4 comprises a resistor R5, a resistor R7, a diode VD6, a diode VD7, a diode VD8 and a triode V12, the other end of the lower secondary winding is connected with the input end of a resistor R5 and the input end of a diode VD6 respectively, the output end of the resistor R5 is connected with the base electrode of a triode V12, the output end of the diode VD6 is connected with the emitter electrode of a triode V12, the collector electrode of the triode V12 is connected with the input end of a triode VD7 and the input end of a triode VD8 respectively, the output end of the diode VD7 is connected with the base electrode of a triode;
the lower negative voltage bias circuit 5 is arranged after the output end of the resistor R8 and the output end of the lower turn-off accelerating circuit 4, the lower negative voltage bias circuit 5 comprises a capacitor C3 and a voltage stabilizing diode VD10, the output end of the resistor R8 is connected with the output end of the resistor R7, and the output end of the resistor R8 is connected with the output end of the resistor R7 and then respectively connected with the input end of the capacitor C3 and the input end of the voltage stabilizing diode VD 10;
the output end of the lower negative voltage bias circuit 5 is connected with the input end of the lower reverse clamping circuit 6, the lower reverse clamping circuit 6 comprises a voltage stabilizing diode VD12 and a diode VD9, the output end of a capacitor C3 is connected with the output end of the diode VD10 and then connected with the input end of the diode VD9, and the output end of a diode VD9 is connected with the input end of a voltage stabilizing diode VD 12.
Embodiment 2 differs from embodiment 1 only in that the upper negative voltage bias circuit 2 and the lower negative voltage bias circuit 5 are different in setting position, and the operation principle is similar to that of embodiment 1, and thus the description is omitted.
Example 3:
referring to fig. 5, on the basis of embodiment 1 or embodiment 2, the voltage regulator diode VD11 in the upper reverse clamp circuit 3 is replaced by a resistor R2, and the voltage regulator diode VD12 in the lower reverse clamp circuit 6 is replaced by a resistor R6, which should be noted that there are two specific implementation methods in this embodiment:
this embodiment shows only a drawing replacing the zener diode VD11 and the zener diode VD12 in fig. 4;
another implementation method is as follows: the zener diode VD11 and the zener diode VD12 in fig. 6 are replaced, but this embodiment is not illustrated, and those skilled in the art can easily understand that these are not illustrated;
the working principle of this embodiment is similar to that of embodiment 1, and thus, the description thereof is omitted.
The above description is only the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can substitute or change the technical solution and the improvement concept of the present invention within the technical scope disclosed in the present invention.
Claims (9)
1. A transformer isolated driver circuit, comprising:
the driving transformer is provided with a primary winding and two secondary windings, one end of the primary winding is connected with a primary driving signal, the other end of the primary winding is connected with a capacitor C2, the capacitor C2 is connected with the primary driving signal, the two secondary windings are an upper secondary winding and a lower secondary winding respectively, and the upper secondary winding and the lower secondary winding are connected in a complementary driving mode;
one end of the upper secondary winding is connected with a reference end and the input end of the resistor R4 respectively;
the other end of the upper secondary winding is connected with the driving end and the input end of the upper turn-off accelerating circuit (1) respectively;
an upper negative voltage bias circuit (2), wherein the upper negative voltage bias circuit (2) is arranged between the output end of the resistor R4 and the output end of the upper turn-off accelerating circuit (1) or is arranged behind the output end of the resistor R4 and the output end of the upper turn-off accelerating circuit (1);
an upper reverse clamp circuit (3), wherein:
when the upper negative voltage bias circuit (2) is arranged between the output end of the resistor R4 and the output end of the upper turn-off accelerating circuit (1), the output end of the upper turn-off accelerating circuit (1) is connected with the input end of the upper reverse clamping circuit (3);
when the upper negative voltage bias circuit (2) is arranged behind the output end of the resistor R4 and the output end of the upper turn-off accelerating circuit (1), the output end of the upper negative voltage bias circuit (2) is connected with the input end of the upper reverse clamping circuit (3);
one end of the lower secondary winding is connected with a reference end and the input end of the resistor R8 respectively;
the other end of the lower secondary winding is respectively connected with the driving end and the input end of the lower turn-off accelerating circuit (4);
a lower negative voltage bias circuit (5), the lower negative voltage bias circuit (5) is arranged between the output end of the resistor R8 and the output end of the lower turn-off accelerating circuit (4) or is arranged behind the output end of the resistor R8 and the output end of the lower turn-off accelerating circuit (4); and
a lower reverse clamp circuit (6), wherein:
when the lower negative voltage bias circuit (5) is arranged between the output end of the resistor R8 and the output end of the lower turn-off accelerating circuit (4), the output end of the lower turn-off accelerating circuit (4) is connected with the input end of the lower reverse clamping circuit (6);
when the lower negative voltage bias circuit (5) is arranged behind the output end of the resistor R8 and the output end of the lower cut-off accelerating circuit (4), the output end of the lower negative voltage bias circuit (5) is connected with the input end of the lower reverse clamping circuit (6).
2. The isolated transformer driving circuit of claim 1, wherein the upper turn-off accelerating circuit (1) comprises a resistor R1, a resistor R3, a diode VD1, a diode VD2, a diode VD3 and a transistor V11, the other end of the upper secondary winding is connected to the input terminal of a resistor R1 and the input terminal of a diode VD1, the output terminal of the resistor R1 is connected to the base of a transistor V11, the output terminal of the diode VD1 is connected to the emitter of a transistor V11, the collector of the transistor V11 is connected to the input terminal of a transistor VD2 and the input terminal of a transistor VD3, the output terminal of the diode VD2 is connected to the base of a transistor V11, and the output terminal of the transistor VD3 is connected to the input terminal of a resistor R3.
3. A transformer isolated driver circuit according to claim 2, wherein said upper negative voltage bias circuit (2) comprises a capacitor C1 and a zener diode VD 5;
when the upper negative voltage bias circuit (2) is arranged between the output end of the resistor R4 and the output end of the upper turn-off accelerating circuit (1), the output end of the resistor R4 is respectively connected with the input end of the capacitor C1 and the input end of the voltage stabilizing diode VD5, and the output end of the capacitor C1 and the output end of the voltage stabilizing diode VD5 are both connected with the output end of the resistor R3;
when the upper negative voltage bias circuit (2) is arranged between the output end of the resistor R8 and the output end of the lower turn-off accelerating circuit (4), the output end of the resistor R4 is connected with the output end of the resistor R3, and the output end of the resistor R4 is connected with the output end of the resistor R3 and then respectively connected with the input end of the capacitor C1 and the input end of the voltage stabilizing diode VD 5.
4. A transformer isolated driver circuit according to claim 3, wherein said upper reverse clamp circuit (3) comprises a zener diode VD11 and a diode VD 4;
when the upper negative voltage bias circuit (2) is arranged between the output end of the resistor R4 and the output end of the upper turn-off accelerating circuit (1), the output end of the resistor R3 is connected with the input end of a diode VD4, and the output end of the diode VD4 is connected with the input end of a voltage stabilizing diode VD 11;
when the upper negative voltage bias circuit (2) is arranged between the output end of the resistor R8 and the output end of the lower turn-off accelerating circuit (4), the output end of the capacitor C1 is connected with the output end of the diode VD5 and then connected with the input end of the diode VD4, and the output end of the diode VD4 is connected with the input end of the voltage stabilizing diode VD 11.
5. A transformer isolated driver circuit according to claim 3, wherein said upper reverse clamp circuit (3) comprises a resistor R2 and a diode VD 4;
when the upper negative voltage bias circuit (2) is arranged between the output end of the resistor R4 and the output end of the upper turn-off accelerating circuit (1), the output end of the resistor R3 is connected with the input end of the diode VD4, and the output end of the diode VD4 is connected with the input end of the resistor R2;
when the upper negative voltage bias circuit (2) is arranged between the output end of the resistor R8 and the output end of the lower turn-off accelerating circuit (4), the output end of the capacitor C1 is connected with the output end of the diode VD5 and then connected with the input end of the diode VD4, and the output end of the diode VD4 is connected with the input end of the resistor R2.
6. The isolated transformer driving circuit of claim 1, wherein the lower turn-off accelerating circuit (4) comprises a resistor R5, a resistor R7, a diode VD6, a diode VD7, a diode VD8 and a transistor V12, the other end of the lower secondary winding is connected to the input terminal of a resistor R5 and the input terminal of a diode VD6, the output terminal of the resistor R5 is connected to the base of a transistor V12, the output terminal of the diode VD6 is connected to the emitter of a transistor V12, the collector of the transistor V12 is connected to the input terminal of a transistor VD7 and the input terminal of a transistor VD8, the output terminal of the diode VD7 is connected to the base of a transistor V12, and the output terminal of the transistor VD8 is connected to the input terminal of a resistor R7.
7. A transformer isolated driving circuit according to claim 6, characterized in that the lower negative voltage bias circuit (5) comprises a capacitor C3 and a zener diode VD 10;
when the lower negative voltage bias circuit (5) is arranged between the output end of the resistor R8 and the output end of the lower turn-off accelerating circuit (4), the output end of the resistor R8 is respectively connected with the input end of the capacitor C3 and the input end of the voltage stabilizing diode VD10, and the output end of the capacitor C3 and the output end of the voltage stabilizing diode VD10 are both connected with the output end of the resistor R7;
when the lower negative voltage bias circuit (5) is arranged between the output end of the resistor R8 and the output end of the lower turn-off accelerating circuit (4), the output end of the resistor R8 is connected with the output end of the resistor R7, and the output end of the resistor R8 is connected with the output end of the resistor R7 and then respectively connected with the input end of the capacitor C3 and the input end of the voltage stabilizing diode VD 10.
8. A transformer isolated driving circuit according to claim 7, characterized in that the lower reverse clamp circuit (6) comprises a zener diode VD12 and a diode VD 9;
when the lower negative voltage bias circuit (5) is arranged between the output end of the resistor R8 and the output end of the lower turn-off accelerating circuit (4), the output end of the resistor R7 is connected with the input end of a diode VD9, and the output end of the diode VD9 is connected with the input end of a voltage stabilizing diode VD 12;
when the lower negative voltage bias circuit (5) is arranged between the output end of the resistor R8 and the output end of the lower cut-off accelerating circuit (4), the output end of the capacitor C3 and the output end of the diode VD10 are connected and then connected with the input end of the diode VD9, and the output end of the diode VD9 is connected with the input end of the voltage stabilizing diode VD 12.
9. A transformer isolated driving circuit according to claim 7, characterized in that the lower reverse clamp circuit (6) comprises a resistor R6 and a diode VD 9;
when the lower negative voltage bias circuit (5) is arranged between the output end of the resistor R8 and the output end of the lower turn-off accelerating circuit (4), the output end of the resistor R7 is connected with the input end of the diode VD9, and the output end of the diode VD9 is connected with the input end of the resistor R6;
when the lower negative voltage bias circuit (5) is arranged between the output end of the resistor R8 and the output end of the lower cut-off accelerating circuit (4), the output end of the capacitor C3 is connected with the output end of the diode VD10 and then connected with the input end of the diode VD9, and the output end of the diode VD9 is connected with the input end of the resistor R6.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202022396917.1U CN213426015U (en) | 2020-10-23 | 2020-10-23 | Drive circuit that transformer was kept apart |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202022396917.1U CN213426015U (en) | 2020-10-23 | 2020-10-23 | Drive circuit that transformer was kept apart |
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| CN213426015U true CN213426015U (en) | 2021-06-11 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114337200A (en) * | 2021-12-09 | 2022-04-12 | 广东友电新能源科技有限公司 | Isolation drive circuit, DC conversion circuit and DC conversion device |
| CN116260321A (en) * | 2023-05-16 | 2023-06-13 | 杭州锐健医疗科技有限公司 | MOS tube driving circuit, switching power supply and ablation equipment |
-
2020
- 2020-10-23 CN CN202022396917.1U patent/CN213426015U/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114337200A (en) * | 2021-12-09 | 2022-04-12 | 广东友电新能源科技有限公司 | Isolation drive circuit, DC conversion circuit and DC conversion device |
| CN114337200B (en) * | 2021-12-09 | 2023-02-10 | 广东友电新能源科技有限公司 | Isolation drive circuit, direct current conversion circuit and direct current conversion device |
| CN116260321A (en) * | 2023-05-16 | 2023-06-13 | 杭州锐健医疗科技有限公司 | MOS tube driving circuit, switching power supply and ablation equipment |
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