CN213366093U

CN213366093U - Power supply circuit, drive board and display device

Info

Publication number: CN213366093U
Application number: CN202021529320.3U
Authority: CN
Inventors: 王明良; 袁海江
Original assignee: HKC Co Ltd
Current assignee: HKC Co Ltd
Priority date: 2020-07-28
Filing date: 2020-07-28
Publication date: 2021-06-04
Anticipated expiration: 2030-07-28

Abstract

The utility model discloses a power supply circuit, drive plate and display device for drive display panel's drive plate, drive plate include output drive unit, and power supply circuit includes a N detection circuit and a N current source unit, and each detection circuit detects and the input signal of the scanning line that corresponds separately, and according to the control signal that input signal output corresponds. The output current of the N current source units is set according to a preset distance. When each current source unit receives a control signal of a detection circuit correspondingly connected with the current source unit as a starting signal, the output end of the current source unit outputs a current source to the output driving unit of the driving board.

Description

Power supply circuit, drive board and display device

Technical Field

The utility model relates to a drive technical field, in particular to power supply circuit, drive plate and display device.

Background

In the prior art, as the size of the lcd television is larger and larger, the resolution is higher and higher, and thus when the panel is charged by the data line, the charging difference between the near end and the far end becomes more and more obvious, which means that the far end charging effect is poor and the brightness is low. The pixel (cell) portion near the driving board (driving board or driving board) charges well and has high brightness, but the pixel (cell) portion far from the driving board has low brightness due to poor charging.

SUMMERY OF THE UTILITY MODEL

The utility model aims at providing a power supply circuit aims at solving the problem that current pixel is poor the farther away charging effect from the drive plate.

In order to achieve the above object, the utility model provides a power supply circuit for display panel's drive plate, drive plate include output drive unit, power supply circuit includes:

the detection ends of the N detection circuits are connected with the N scanning lines of the display panel in a one-to-one manner; each detection circuit is used for detecting the input signal of the corresponding scanning line and outputting the corresponding control signal according to the input signal;

the current source units are provided with controlled ends and output ends, the controlled ends of the N current source units are in one-to-one connection with the output ends of the corresponding N detection circuits, and the output currents of the N current source units are set according to a preset distance; each current source unit is configured to, when receiving a control signal of the detection circuit correspondingly connected to each current source unit as a start signal, output a current source from an output end of the current source unit to an output driving unit of the driving board, so as to charge pixels of the scan line corresponding to the current source unit; the preset distance is the distance from the scanning line corresponding to the current source unit to the driving board;

and the value of N is greater than zero.

Optionally, the power circuit further includes M current source units, and controlled terminals of the M current source units are connected to output terminals of the N detection circuits.

Optionally, the N detection circuits include:

the input end of the self-locking circuit is the detection end of the detection circuit;

the self-locking circuit is used for detecting an input signal of an Nth scanning line and latching a voltage represented by the input signal into the self-locking circuit;

the self-locking circuit comprises a reset circuit, wherein the output end of the self-locking circuit is connected with the output end of the reset circuit, the connection node of the reset circuit is the output end of the detection circuit, the controlled end of the reset circuit is connected with the (N + 1) th scanning line, and the reset circuit is used for determining whether to reset the voltage of the self-locking circuit according to the voltage of an input signal of the (N + 1) th scanning line.

Optionally, the self-locking circuit includes a second switching tube, a third switching tube, a first resistor, a second resistor, and a third resistor, a first end of the first resistor is an input end of the self-locking circuit, a second end of the first resistor, a first end of the second switching tube, and a controlled end of the third switching tube are connected, and a connection node thereof is an output end of the self-locking circuit; the second end of the second switching tube and the first end of the third resistor are connected with a first power supply input end, and the controlled end of the second switching tube, the second end of the third resistor and the first end of the third switching tube are connected; and the second end of the third switching tube and the second end of the second resistor are both grounded.

Optionally, the reset circuit includes a fourth switching tube, a controlled end of the fourth switching tube is the controlled end of the reset circuit, a first end of the fourth switching tube is the output end of the reset circuit, and a second end of the fourth switching tube is grounded.

Optionally, the current source unit includes a current source and a first switching tube, a first end of the first switching tube is connected to the current source, a second end of the first switching tube is an output end of the current source unit, and a controlled end of the first switching tube is a controlled end of the current source unit.

Optionally, the power circuit further includes an or gate, an N +1 th current source unit, and an N +1 th switch tube, where the or gate includes N input terminals and an output terminal, the N input terminals of the or gate are respectively connected to the input terminals of the N detection circuits, and the output terminal of the or gate is connected to the controlled terminal of the N +1 th switch tube; the first end of the (N + 1) th switch tube is connected with the (N + 1) th current source unit, and the second end of the (N + 1) th switch tube is the output end of the current source unit.

Optionally, the power circuit further includes an and gate, an N +1 th current source unit, and an N +1 th switching tube, where the and gate includes N input ends and an output end, the N input ends of the and gate are respectively connected to the input ends of the N detection circuits, and the output end of the and gate is connected to the controlled end of the N +1 th switching tube; the first end of the (N + 1) th switch tube is connected with the (N + 1) th current source unit, and the second end of the (N + 1) th switch tube is the output end of the current source unit.

Optionally, the switch tube is a PMOS tube or an NMOS tube.

In order to achieve the above object, the present invention further provides a power supply circuit, which includes:

the N detection circuits comprise detection ends and output ends, and the detection ends of the N detection circuits are connected with the N scanning lines in a one-to-one mode; the detection circuit is used for detecting input signals of N scanning lines of the display panel and outputting corresponding N control signals according to the input signals of the N scanning lines;

the current source units are provided with controlled ends and output ends, the controlled ends of the current source units from 1 st to Nth are connected with the output ends of the corresponding detection circuits, and the controlled ends of the current source units from (N + 1) th are interconnected with the output ends of the N detection circuits; the 1 st to nth current source units are output driving units for outputting current sources to a driving board when the received corresponding control signal of the detection circuit is a start signal;

the N +1 current source unit is an output driving unit for outputting a current source to a driving board when the received control signals of all the detection circuits are off signals.

In order to achieve the above object, the present invention further provides a driving board, including the power circuit.

In order to achieve the above object, the present invention further provides a display device, which includes a display panel and the power circuit or the driving board as described above.

The utility model discloses a set up a N detection circuit and a N current source unit at power supply circuit, wherein, a power supply circuit is arranged in display panel's drive plate, and the drive plate includes output drive unit, and detection circuit includes sense terminal and output, and is N the sense terminal of detection circuit is connected one to one with a N scanning line of display panel. The current source units are provided with controlled ends and output ends, and the controlled ends of the N current source units are connected with the output ends of the corresponding N detection circuits in a one-to-one mode. Each detection circuit detects the input signal on the corresponding scanning line and outputs the corresponding control signal according to the input signal. When each current source unit receives a control signal of the detection circuit correspondingly connected with each current source unit as a starting signal, the output end of the current source unit outputs a current source to the output driving unit of the driving board, at the moment, an input signal of a scanning line reflects the working state of the scanning line, and when an input signal representing that the scanning line has the scanning signal is detected, the current source of the corresponding current source unit is output to the output driving unit of the driving board, so that the corresponding driving current can be output to the output driving unit of the driving board when the corresponding scanning line has the input signal, the pixel of the scanning line corresponding to the current source unit is charged, at the moment, the output currents of N current source units are set according to the distance between the corresponding scanning line and the driving board, wherein the value of N is greater than zero, so that the driving board can supply current sources with different sizes according to the distance between the scanning line and the driving board, therefore, even if the pixel is far away from the driving board, the pixel can be charged by a proper current source, and the charging effect of the pixel is improved.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the structures shown in the drawings without creative efforts.

Fig. 1 is a schematic block diagram of an embodiment of a power circuit according to the present invention;

fig. 2 is a schematic circuit diagram of a partial detection circuit in the power circuit of the present invention;

fig. 3 is a schematic block diagram of an embodiment of the power circuit of the present invention;

fig. 4 is a schematic block diagram of an embodiment of the power circuit of the present invention;

fig. 5 is a schematic circuit diagram of the current source unit in the power circuit of the present invention.

The objects, features and advantages of the present invention will be further described with reference to the accompanying drawings.

Detailed Description

The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.

It should be noted that, if directional indications (such as upper, lower, left, right, front and rear … …) are involved in the embodiment of the present invention, the directional indications are only used to explain the relative position relationship between the components, the motion situation, etc. in a specific posture (as shown in the drawings), and if the specific posture is changed, the directional indications are changed accordingly.

In addition, if there is a description relating to "first", "second", etc. in the embodiments of the present invention, the description of "first", "second", etc. is for descriptive purposes only and is not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, the technical solutions in the embodiments may be combined with each other, but it must be based on the realization of those skilled in the art, and when the technical solutions are contradictory or cannot be realized, the combination of the technical solutions should not be considered to exist, and is not within the protection scope of the present invention.

The utility model provides a power supply circuit for solve current pixel apart from the drive plate more far the more poor technical problem of charging effect.

In an embodiment of the present invention, as shown in fig. 1, a power circuit is used for a driving board 100 of a display panel 10, the driving board 100 includes an output driving unit 40, the power circuit includes N detecting circuits 20(N detecting circuits 20 are respectively a detecting circuit 1(201), a detecting circuit 2(202), a detecting circuit 3 (203.. detecting circuit N) and N current source units 30(N current source units 30 are respectively a current source unit 1(301), a current source unit 2(302), a current source unit 3 (303.. current source unit N), the N detecting circuits 20 include a detecting end and an output end, and the detecting ends of the N detecting circuits are connected to N scanning lines of the display panel 10 one to one. The current source units are provided with controlled ends and output ends, the controlled ends of the N current source units are in one-to-one connection with the output ends of the corresponding N detection circuits, and the output currents of the N current source units are set according to a preset distance.

In the above embodiment, the preset distance is a distance from the driving board 100 to a scanning line corresponding to the current source unit, and each of the detecting circuits detects an input signal of the corresponding scanning line and outputs a corresponding control signal according to a detection result. The control signal is divided into an on signal and an off signal, when an input signal representing that a scanning signal exists on the scanning line is detected, the control signal output by the detection circuit is the on signal, when the input signal representing that the scanning signal exists on the scanning line is not detected, the control signal output by the detection circuit is the off signal, and when each current source unit receives the control signal of the detection circuit correspondingly connected with the current source unit, the corresponding current source unit does not output the control signal. When each current source unit receives a control signal of the detection circuit connected to the current source unit as a start signal, the output end of the corresponding current source unit outputs a current source to the output driving unit 40. At this time, the output driving unit 40 outputs the current source of the current source unit to the pixel of the corresponding scan line to enhance the charging capability of the data signal to the pixel, thereby implementing the positions with different distances, and the farther the current source unit with different currents is used from the driving board 100, the larger the current of the current source is, thereby implementing the purpose of enhancing the charging capability, thereby effectively improving the problem of inconsistent driving of the pixel from the far end and the near end of the driving board 100. The overall pixel charging rate is improved. In addition, fine adjustment can be realized under the condition of small distance, and adjustment can be carried out on all the brightness of the pixels. The value of N is greater than zero, namely N can take any number greater than zero at the moment, and N generally takes an integer positive value in practical application. It should be noted that, a specific setting method for setting the output current of the current source unit according to the preset distance is as follows:

the distance from the scanning line to the driving board 100 and the current output by the corresponding current source unit are counted to obtain a correlation formula, so that the current output by the corresponding current source unit can be directly set as long as the distance from the scanning line to the driving board 100 is obtained. The farther the scan line corresponding to the current source unit is from the driving board 100, the larger the required output current of the current source unit.

Alternatively, to further increase the yield of the produced driving board 100, the distance between each scan line may be fixed, and the distance of the nth scan line from the driving board 100 is equal to the distance between each scan line. At the moment, the yield can be improved only by testing the output current of the current source unit required by each scanning line in the sample plate, verifying the output current corresponding to the fitted correlation formula and further determining the production parameters.

Optionally, as shown in fig. 4, the driving board 100 further includes a digital-to-analog unit 80, an output end of the digital-to-analog unit 80 is connected to a data input end of the output driving unit 40, and the digital-to-analog unit 80 outputs a control signal to the output driving unit 40 to control the current source to output to the pixel of the corresponding scan line.

Optionally, as shown in fig. 2, the detecting circuit includes a self-locking circuit 2012 and a reset circuit 2011, an input terminal of the self-locking circuit 2012 is a detecting terminal of the detecting circuit, an output terminal of the self-locking circuit 2012 is connected to an output terminal of the reset circuit 2011, a connection node thereof is an output terminal of the detecting circuit, and a controlled terminal of the reset circuit 2011 is connected to the N +1 th scan line.

The latch circuit 2012 detects the input signal of the nth scan line and latches the voltage represented by the input signal in the latch circuit 2012, and the reset circuit 2011 determines whether to reset the voltage of the latch circuit 2012 according to the voltage of the input signal of the (N + 1) th scan line. When the voltage of the input signal of the (N + 1) th scanning line is high level, the low level is assigned to the self-locking circuit 2012, so that the reset of the detection circuit is realized, and the detection circuit returns to the initial state, thereby facilitating the next detection.

Optionally, as shown in fig. 5, the current source unit includes a current source I1 and a first switching tube Q1, a first end of the first switching tube Q1 is connected to the current source I1, a second end OUT of the first switching tube Q1 is an output end of the current source unit, and a controlled end EN of the first switching tube Q1 is a controlled end of the current source unit.

When the first switch Q1 is a PMOS transistor, if the control signal output by the corresponding detection circuit is low, the first switch Q1 is turned on, and the corresponding current source unit outputs the current source I1. When the first switch Q1 is an NMOS transistor, if the control signal output by the corresponding detection circuit is at a high level, the first switch Q1 is turned on, and the corresponding current source unit outputs the current source I1.

Optionally, as shown in fig. 4, the power circuit further includes an or gate 90, an N +1 th current source unit 50, and an N +1 th switch tube 60, where the or gate 90 includes N input terminals and output terminals, the N input terminals of the or gate 90 are respectively connected to the input terminals of the N detection circuits 20, and the output terminal of the or gate 90 is connected to the controlled terminal of the N +1 th switch tube 60. The first end of the (N + 1) th switch tube 60 is connected to the (N + 1) th current source unit 50, and the second end of the (N + 1) th switch tube 60 is the output end of the current source unit.

When the control signals input to the input terminals of the N detection circuits 20 are all at a low level, the or gate 90 outputs a low level, and when the N +1 th switch tube 60 is a PMOS tube, the N +1 th switch tube 60 is turned on, and the current source unit outputs the current source I1. When the (N + 1) th switch 60 is an NMOS transistor, the (N + 1) th switch 60 is turned off, and the current source unit does not output the current source I1.

When any one of the control signals input to the input terminals of the N detection circuits 20 is at a high level, the or gate 90 outputs a high level, and when the N +1 th switching tube 60 is a PMOS tube, the N +1 th switching tube 60 is turned off, and the current source unit does not output the current source I1. When the (N + 1) th switch 60 is an NMOS transistor, the (N + 1) th switch 60 is turned on, and the current source unit outputs the current source I1.

Optionally, as shown in fig. 3, the power circuit further includes an and gate 70, an N +1 th current source unit 50, and an N +1 th switch tube 60, where the and gate 70 includes N input terminals and output terminals, the N input terminals of the and gate 70 are respectively connected to the input terminals of the N detection circuits 20, and the output terminal of the and gate 70 is connected to the controlled terminal of the N +1 th switch tube 60; the first end of the (N + 1) th switch tube 60 is connected to the (N + 1) th current source unit 50, and the second end of the (N + 1) th switch tube 60 is the output end of the current source unit.

When any one of the control signals input to the input terminals of the N detection circuits 20 is at a low level, the and gate 70 outputs the low level, and when the N +1 th switching tube 60 is a PMOS tube, the N +1 th switching tube 60 is turned on, and the current source unit outputs the current source I1. When the (N + 1) th switch 60 is an NMOS transistor, the (N + 1) th switch 60 is turned off, and the current source unit does not output the current source I1.

When the control signals input to the input terminals of the N detection circuits 20 are all at a high level, the and gate 70 outputs a high level, and when the N +1 th switch tube 60 is a PMOS tube, the N +1 th switch tube 60 is turned off, and the current source unit does not output the current source I1. When the (N + 1) th switch 60 is an NMOS transistor, the (N + 1) th switch 60 is turned on, and the current source unit outputs the current source I1. The current source unit may be various current sources I1 commonly used, and the current source I1 with a proper current magnitude may be selected as required.

Optionally, as shown in fig. 2, the self-locking circuit 2012 includes a second switch Q2, a third switch Q3, a first resistor R1, a second resistor R2, and a third resistor R3, a first end of the first resistor R1 is an input end of the self-locking circuit 2012, a second end of the first resistor R1, a first end of the second resistor R2, a first end of the second switch Q2, and a controlled end of the third switch Q3 are connected, and a connection node thereof is an output end of the self-locking circuit 2012; a second end of the second switch tube Q2 and a first end of the third resistor R3 are both connected to a first power input end, and a controlled end of the second switch tube Q2, a second end of the third resistor R3 and a first end of the third switch tube Q3 are connected; a second terminal of the third switch transistor Q3 and a second terminal of the second resistor R2 are both grounded.

Wherein, the second switch Q2 is a PMOS transistor, the third switch Q3 is an NMOS transistor, for convenience of description, it is assumed that there are M rows in the scan line, at this time, the signal input by the mth row detection circuit is the input signal waveform of the mth row, when the panel display scan does not reach the mth row, the signal input by the mth row detection circuit is low level (low), the third switch Q3 cannot be opened, the third switch Q3 cannot be conducted, the gate voltage of the second switch Q2 is the same as the voltage of the first power input terminal, the second switch Q2 cannot be conducted, the signal input by the mth row detection circuit is low level (low), and the present circuit is a self-locking circuit 2012, when the control signal output by the detection circuit is low level (low), the third switch Q3 is not conducted, so that the second switch Q2 is not conducted, so that the control signal output by the detection circuit is low level (low), the control signal output by the detection circuit is maintained at a low level (low).

However, when the input signal reaches the mth column, the signal input by the mth column detection circuit is at a high level (high), the third switch Q3 can be turned on, the first power input end can be connected to ground through the third resistor R3 and the third switch Q3, the voltage at the gate of the third transistor is 0V, the second switch Q2 can be turned on, and the control signal output by the detection circuit is at a high level (high). At this time, the self-locking circuit 2012 can also maintain the high level (high) of the control signal output by the detection circuit, and when the high level (high) of the control signal output by the detection circuit is not changed, the third switch Q3 is turned on, and the second switch Q2 is turned on, so that the control signal output by the detection circuit is high level (high), and even when the voltage of the signal input by the detection circuit is low level (low), the control signal output by the detection circuit can still maintain the high level (high) unchanged. Wherein, the value of M is larger than zero, and M generally takes an integer positive value in practical application. Optionally, the reset circuit 2011 includes a fourth switch Q4, the controlled terminal of the fourth switch Q4 is the controlled terminal of the reset circuit 2011, the first terminal of the fourth switch Q4 is the output terminal of the reset circuit 2011, and the second terminal of the fourth switch Q4 is grounded.

The fourth switch Q4 is an NMOS transistor, and when the voltage of the signal inputted by the M +1 th column detection circuit is at a high level (high), the fourth switch Q4 is turned on, and the voltage of the signal inputted by the M +1 th column detection circuit is pulled down to a low level (low). When the voltage of the signal input by the M +1 th column detection circuit is at a low level (low), the fourth switch Q4 is turned off, and the voltage of the signal input by the M +1 th column detection circuit is unchanged.

The principle of the present invention is described below with reference to fig. 1 and 2:

in a border area (i.e., a non-display area) of the panel, different detection circuits are made for different distance positions, and output currents of N current source units are set according to distances from the corresponding scan lines to the driving board 100, as shown in fig. 1, in the following, taking a three-way detection circuit as an example, in an embodiment, the detection circuit 1 is for an M-th row, the detection circuit 2 is for an N-th row, the detection circuit 3 is for an X-th row, and the three detection circuits respectively correspond to the first input signal GateM, the second input signal GateN, and the third input signal GateX, and respectively output corresponding first control signal EN1, second control signal EN2, and third control signal EN 3. The detection circuit 1 is designed for the Mth column, and it is considered that the minimum driving capability is used from the 1 st column to the M-1 st column, and the driving capability between the Mth column and the Nth column needs to be enhanced, and similarly, the farther the distance is, the stronger the driving capability is.

As shown in fig. 1, when the panel display scanning signal does not reach the mth row scanning line, the first input signal GateM of the detection circuit 1, that is, the input signal waveform of the mth row scanning line, is at a low level (low), the third switching tube Q3 cannot be opened, the third switching tube Q3 cannot be conducted, the voltage at the junction between the third resistor R3 and the third switching tube Q3 is the same as the voltage at the first power input, the second switching tube Q2 cannot be conducted, the first control signal is also at a low level (low), and the present circuit is the self-locking circuit 2012, the first control signal EN1 is at a low level (low), the third switching tube Q3 is not conducted, the second switching tube Q2 is not conducted, so that the first control signal EN1 is kept at a low level (low), and the first control signal is kept at a low level (low). However, when the input signal reaches the mth column, the input signal enters the detection circuit 2, the first input signal GateM is high, the third switch tube Q3 may be turned on, at this time, the first power input end may be connected to ground through the third resistor R3 and the third switch tube Q3, the gate voltage of the second switch tube Q2 is 0V, the second switch tube Q2 may be turned on, the first control signal EN1 is high (high), at this time, the self-locking circuit 2012 may also maintain the first control signal EN1 at the high level (high), the first control signal EN1 at the high level (high), so that the third switch tube Q3 is turned on, and then the second switch tube Q2 is turned on, so that the first control signal EN1 is at the high level (high), and even if the first input signal GateM is low (low), the first control signal EN1 may still maintain the high level (high).

When the input signal reaches the nth column, the input signal enters the detection circuit 2, the second input signal is at a high level (high), the fifth switch Q5 can be turned on, the sixth switch Q6 is also turned on, the second control signal EN2 is at a high level (high), the second control signal EN2 serves as a reset signal of the detection circuit 1, when the second control signal EN2 is at a high level (high), the fourth switch Q4 is turned on, and the first control signal EN1 is pulled to a low level (low). In this case, only the second control signal EN2 is at a high level (high), and similarly, it can be presumed that the second control signal EN2 is at a low level (low) when the output signal of the detection circuit 3 is the third control signal EN3 is at a high level (high), and the scan signal pulls the third control signal EN3 down (low) only when the scan signal of the next frame arrives.

That is, when the scanning of the 1 st to M-1 st rows is realized, the first control signal EN1, the second control signal EN2, and the third control signal EN3 are all at a low level (low), only the second control signal EN2 is at a high level (high) from the M-th row to the N-1 st row, only the third control signal EN3 is at a high level (high) from the N-th row to the X-th row, only the EN3 is at a high level (high) from the X-th row to the last row, and when a next frame arrives, all of the first control signal EN1, the second control signal EN2, and the third control signal EN3 are at a low level (low).

4 current sources I1 are provided, the current increases sequentially, the first current source I1 is controlled by a combination of the first control signal EN1, the second control signal EN2 and the third control signal EN3, only when the first control signal EN1, the second control signal EN2 and the third control signal EN3 are simultaneously low (low), the or gate 90 outputs a low level (low), the first current source I1 is turned on, and when the first control signal EN1 is at a high level (high), the second current source I1 is controlled to be turned on, and similarly, when the second control signal EN2 and the third control signal EN3 are at a high level (high), the third current source I1 and the fourth current source I1 are respectively controlled to be turned on, the charging circuit charges pixels corresponding to different distances, achieves the purpose of enhancing the driving capability by using current sources I1 with different sizes, and effectively solves the problem of inconsistent driving of the far end and the near end.

The principle that the power supply circuit improves the pixel charging rate is explained above, the liquid crystal display panel can be widely applied to the liquid crystal display panel 10, the driving capability is improved and the pixel charging rate is enhanced without additionally adding a data line, the structure is simple, and the liquid crystal display panel has a good effect.

In the present invention, the value of X is greater than zero, and N generally takes an integer positive value in practical application, so as to facilitate understanding of those skilled in the art, in understanding the technical principle of the present invention, an integer value may be substituted into N, M, X, such as 1, 2, and 3, which is only one of many embodiments of the present invention.

In order to solve the above problem, the utility model also provides a power supply circuit, power supply circuit includes a N detection circuit 20 and a N +1 current source unit, and detection circuit includes sense terminal and output, and is N detection circuit's sense terminal is connected with a pair of one of a N scanning line. The current source unit is provided with a controlled end and an output end, the controlled ends of the 1 st to the Nth current source units of the current source unit are connected with the output ends of the corresponding detection circuits, and the controlled end of the (N + 1) th current source unit is interconnected with the output ends of the N detection circuits.

The detection circuit detects N scan line voltages of the display panel 10 and outputs N corresponding control signals according to the N scan line voltages, the 1 st to nth current source units output the current source I1 to the output driving unit 40 when the received corresponding control signal of the detection circuit is an on signal, and the N +1 th current source unit outputs the current source I1 to the output driving unit 40 when the received control signal of all the detection circuits is an off signal.

Alternatively, as shown in fig. 4, the (N + 1) th current source unit includes a current source, an or gate, and a switching tube.

In order to solve the above problem, the present invention further provides a driving board 100, which includes a plurality of current source units of the power circuit.

It is worth noting that, because the utility model discloses drive plate 100 has contained all embodiments of above-mentioned power supply circuit, consequently the utility model discloses drive plate 100 has all beneficial effects of above-mentioned power supply circuit, and it is no longer repeated here.

In order to solve the above problem, the present invention further provides a display device, which includes a display panel 10 and a power circuit or a driving board 100.

It is worth noting that, because the utility model discloses display device has contained above-mentioned power supply circuit's whole embodiments, consequently the utility model discloses display device has above-mentioned power supply circuit's all beneficial effects, and it is no longer repeated here.

Above only be the utility model discloses an optional embodiment to not consequently restrict the utility model discloses a patent range, all are in the utility model discloses a conceive, utilize the equivalent structure transform that the content of description and drawing did, or direct/indirect application all is included in other relevant technical field the utility model discloses a patent protection within range.

Claims

1. A power supply circuit for supplying power to a drive board of a display panel, the drive board including an output driving unit, the power supply circuit comprising:

the current source units are provided with controlled ends and output ends, the controlled ends of the N current source units are in one-to-one connection with the output ends of the corresponding N detection circuits, and the output currents of the N current source units are set according to a preset distance; when the control signal of the detection circuit correspondingly connected with each current source unit is received as a starting signal, the output end of each current source unit outputs a current source to the output driving unit of the driving board so as to charge the pixels of the scanning lines corresponding to the current source units;

the preset distance is the distance from the scanning line corresponding to the current source unit to the driving board;

and the value of N is greater than zero.

2. The power supply circuit of claim 1 wherein the N detection circuits comprise:

3. The power supply circuit according to claim 2, wherein the self-locking circuit comprises a second switching tube, a third switching tube, a first resistor, a second resistor and a third resistor, wherein a first end of the first resistor is an input end of the self-locking circuit, a second end of the first resistor, a first end of the second switching tube and a controlled end of the third switching tube are connected, and a connection node thereof is an output end of the self-locking circuit; the second end of the second switching tube and the first end of the third resistor are connected with a first power supply input end, and the controlled end of the second switching tube, the second end of the third resistor and the first end of the third switching tube are connected; and the second end of the third switching tube and the second end of the second resistor are both grounded.

4. The power supply circuit according to claim 2, wherein the current source unit comprises a current source and a first switch tube, a first end of the first switch tube is connected to the current source, a second end of the first switch tube is an output end of the current source unit, and a controlled end of the first switch tube is a controlled end of the current source unit.

5. The power circuit as claimed in claim 4, wherein the power circuit further comprises an or gate, an N +1 th current source unit and an N +1 th switch tube, the or gate comprises N input terminals and an output terminal, the N input terminals of the or gate are respectively connected to the input terminals of the N detection circuits, and the output terminal of the or gate is connected to the controlled terminal of the N +1 th switch tube; the first end of the (N + 1) th switch tube is connected with the (N + 1) th current source unit, and the second end of the (N + 1) th switch tube is the output end of the current source unit.

6. The power supply circuit according to claim 4, wherein the power supply circuit further comprises an and gate, an N +1 th current source unit and an N +1 th switching tube, the and gate comprises N input terminals and output terminals, the N input terminals of the and gate are respectively connected with the input terminals of the N detection circuits, and the output terminal of the and gate is connected with the controlled terminal of the N +1 th switching tube; the first end of the (N + 1) th switch tube is connected with the (N + 1) th current source unit, and the second end of the (N + 1) th switch tube is the output end of the current source unit.

7. The power supply circuit as claimed in claim 2, wherein the reset circuit comprises a fourth switching tube, the controlled terminal of the fourth switching tube is the controlled terminal of the reset circuit, the first terminal of the fourth switching tube is the output terminal of the reset circuit, and the second terminal of the fourth switching tube is grounded.

8. The power supply circuit as claimed in claim 3 or 4, wherein the switch transistor is a PMOS transistor or an NMOS transistor.

9. A driver board comprising a power supply circuit as claimed in any one of claims 1 to 8.

10. A display device comprising a display panel and the power supply circuit according to any one of claims 1 to 8 or the driver board according to claim 9.