CN213240877U - Ethernet control unit - Google Patents
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- CN213240877U CN213240877U CN202022747853.5U CN202022747853U CN213240877U CN 213240877 U CN213240877 U CN 213240877U CN 202022747853 U CN202022747853 U CN 202022747853U CN 213240877 U CN213240877 U CN 213240877U
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Abstract
The utility model provides an ethernet control unit relates to rail vehicle control technical field. Wherein, ethernet control unit includes: the system comprises a network board, a core control board, a digital input/output board and an analog quantity acquisition board; ethernet chips are arranged on the network board, the core control board, the digital input/output board and the analog quantity acquisition board; the Ethernet chip of the network board is in communication connection with the Ethernet chip of the core control board through an Ethernet protocol; the Ethernet chip of the core control board is respectively connected with the Ethernet chip of the digital input/output board and the Ethernet chip of the analog quantity acquisition board through Ethernet protocol communication. The Ethernet is used as a communication bus for data interaction between the control unit board cards, so that both hardware design and software development are simpler, and the research and development cost of the rail transit vehicle is reduced.
Description
Technical Field
The utility model relates to a rail vehicle control technical field especially relates to an ethernet control unit.
Background
With the advent of the information age, it is necessary to sufficiently and quickly grasp the state of equipment on a rail transit vehicle. Because the real-time status data, fault information, health status data and other information of the equipment on the rail transit vehicle are more, the control unit not only needs to have stable and reliable performance, but also needs to have the functions of collecting and storing a large amount of real-time data, fault data, health status data and the like, and has the capability of interacting data with a train backbone network.
In the prior art, each board card of the control unit performs data interaction based on a CPCI bus. The CPCI bus has multiple data lines, address lines, control lines, and the like, so that both hardware design and software development are complex, and the development cost of rail transit vehicles is increased.
Therefore, it is necessary to provide a control unit to solve the situation faced during the development of rail transit vehicles.
SUMMERY OF THE UTILITY MODEL
The utility model provides an ethernet control unit to solve the CPCI bus and have multichannel data line, address line, control line etc. for hardware design and software development are all more complicated, can increase the problem of rail transit vehicle's research and development cost.
The utility model provides an ethernet control unit, include: the system comprises a network board, a core control board, a digital input/output board and an analog quantity acquisition board;
the network board, the core control board, the digital input/output board and the analog quantity acquisition board are all provided with Ethernet chips;
the Ethernet chip of the network board is in communication connection with the Ethernet chip of the core control board through an Ethernet protocol;
the Ethernet chip of the core control board is respectively in communication connection with the Ethernet chip of the digital input/output board and the Ethernet chip of the analog quantity acquisition board through an Ethernet protocol.
Optionally, the number of the core control boards, the number of the digital input/output boards, and the number of the analog quantity acquisition boards are all multiple, and the multiple core control boards are respectively connected with the multiple digital input/output boards and the multiple analog quantity acquisition boards in a one-to-one correspondence manner.
Optionally, the network board includes an FPGA chip and a plurality of ethernet chips, and the FPGA chip of the network board is connected to the plurality of ethernet chips respectively;
the core control board comprises an FPGA chip and three Ethernet chips, and the FPGA chip of the core control board is connected with the three Ethernet chips;
the digital input/output board comprises an FPGA chip and one Ethernet chip, and the FPGA chip of the digital input/output board is connected with one Ethernet chip;
the analog quantity acquisition board comprises an FPGA chip and one Ethernet chip, and the FPGA chip of the analog quantity acquisition board is connected with one Ethernet chip;
the plurality of Ethernet chips of the network board are respectively connected with one Ethernet chip on the plurality of core control boards in a one-to-one correspondence manner;
the Ethernet chip of the digital input/output board and the Ethernet chip of the analog quantity acquisition board are respectively connected with the other two Ethernet chips of the core control board in a one-to-one correspondence manner.
Optionally, the digital input/output board further includes an I/O conditioning circuit, and the FPGA chip of the digital input/output board is connected to the I/O conditioning circuit.
Optionally, the analog quantity acquisition board further includes an a/D sampling circuit, and an FPGA chip of the analog quantity acquisition board is connected to the a/D sampling circuit.
Optionally, an RGMII interface is used between the FPGA chip of the network board and the ethernet chip of the network board to exchange data.
Optionally, the network board further includes an ARM control board, the ARM control board of the network board is in communication connection with the FPGA chip of the network board through an ethernet communication protocol, and the ARM control board of the network board is in communication connection with the maintenance terminal through the ethernet communication protocol.
Optionally, a GPMC interface is further adopted between the ARM control board of the network board and the FPGA chip of the network board to exchange data.
Optionally, the power supply device further comprises a back plate and a power supply plate;
the network board, the core control board, the digital input/output board, the analog quantity acquisition board and the power supply board are all connected to the back board;
the power supply board supplies power to the network board, the core control board, the digital input/output board and the analog quantity acquisition board through the backboard;
the network board is in communication connection with the core control board through the backboard.
Optionally, the power boards include a first power board and a second power board, and the first power board supplies power to the network board, the core control board and the digital input/output board through the backplane; the second power supply board supplies power to the analog quantity acquisition board through the back board.
The utility model provides an ethernet control unit, include: the system comprises a network board, a core control board, a digital input/output board and an analog quantity acquisition board; ethernet chips are arranged on the network board, the core control board, the digital input/output board and the analog quantity acquisition board; the Ethernet chip of the network board is in communication connection with the Ethernet chip of the core control board through an Ethernet protocol; the Ethernet chip of the core control board is respectively connected with the Ethernet chip of the digital input/output board and the Ethernet chip of the analog quantity acquisition board through Ethernet protocol communication. The Ethernet is used as a communication bus for data interaction between the control unit board cards, so that both hardware design and software development are simpler, and the research and development cost of the rail transit vehicle is reduced.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without inventive labor.
Fig. 1 is a schematic structural diagram of an ethernet control unit according to the present invention;
fig. 2 is a schematic diagram of a communication structure between the network board and the core control board in fig. 1;
FIG. 3 is a schematic diagram of a communication structure between the core control board and the analog quantity acquisition board and between the core control board and the digital quantity input/output board in FIG. 1;
fig. 4 is a schematic diagram of an internal communication structure of the network board in fig. 1.
Description of reference numerals:
10-a network board;
11-an ethernet chip;
12-an FPGA chip;
13-ARM control panel;
20-core control board;
30-digital input/output board;
40-analog quantity acquisition board;
50-a back plate;
60-a power panel;
61-a first power panel;
62-second power panel.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.
It should be noted that the terms "first" and "second" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present invention, "a plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.
In the present invention, unless otherwise expressly specified or limited, the terms "mounted," "connected," "secured," and the like are to be construed broadly and can include, for example, fixed connections, removable connections, or integral connections; may be mechanically coupled, may be electrically coupled or may be in communication with each other; they may be directly connected or indirectly connected through intervening media, or they may be connected internally or in any other suitable relationship, unless expressly stated otherwise. The specific meaning of the above terms in the present invention can be understood according to specific situations by those skilled in the art.
In the present application, unless expressly stated or limited otherwise, the first feature may be directly on or directly under the second feature or indirectly via intermediate members. Also, a first feature "on," "over," and "above" a second feature may be directly or diagonally above the second feature, or may simply indicate that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature may be directly under or obliquely under the first feature, or may simply mean that the first feature is at a lesser elevation than the second feature.
In the description above, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples and features of different embodiments or examples described in this specification can be combined and combined by one skilled in the art without contradiction.
With the advent of the information age, it is necessary to sufficiently and quickly grasp the state of equipment on a rail transit vehicle. Because the real-time status data, fault information, health status data and other information of the equipment on the rail transit vehicle are more, the control unit not only needs to have stable and reliable performance, but also needs to have the functions of collecting and storing a large amount of real-time data, fault data, health status data and the like, and has the capability of interacting data with a train backbone network. In the prior art, each board card of the control unit performs data interaction based on a CPCI bus. The CPCI bus has multiple data lines, address lines, control lines, and the like, so that both hardware design and software development are complex, and the development cost of rail transit vehicles is increased.
Therefore, it is necessary to provide a control unit to solve the situation faced during the development of rail transit vehicles.
In order to solve the problem, the utility model provides an ethernet control unit is as the communication bus of data interaction between the control unit integrated circuit board through the ethernet for hardware design and software development are all comparatively simple, thereby have reduced rail transit vehicle's research and development cost.
The ethernet control unit provided by the present invention is described in detail with reference to the following embodiments.
Fig. 1 is a schematic structural diagram of an ethernet control unit according to the present invention; fig. 2 is a schematic diagram of a communication structure between the network board and the core control board in fig. 1; FIG. 3 is a schematic diagram of a communication structure between the core control board and the analog quantity acquisition board and between the core control board and the digital quantity input/output board in FIG. 1; fig. 4 is a schematic diagram of an internal communication structure of the network board in fig. 1.
As shown in the figure, the utility model provides an ethernet control unit, include: a network board 10, a core control board 20, a digital input/output board 30 and an analog quantity acquisition board 40; the network board 10, the core control board 20, the digital input/output board 30 and the analog quantity acquisition board 40 are all provided with an Ethernet chip 11; the ethernet chip 11 of the network board 10 is in communication connection with the ethernet chip 11 of the core control board 20 through an ethernet protocol; the ethernet chip 11 of the core control board 20 is in communication connection with the ethernet chip 11 of the digital input/output board 30 and the ethernet chip 11 of the analog acquisition board 40 through an ethernet protocol.
The ethernet control unit further includes a back panel 50 and a power panel 60. The network board 10, the core control board 20, the digital input/output board 30, the analog quantity collecting board 40 and the power supply board 60 are all connected to the back board 50.
Connectors are arranged on the network board 10, the core control board 20, the digital input/output board 30, the analog quantity acquisition board 40 and the power supply board 60, and connectors corresponding to the connectors on the network board 10, the core control board 20, the digital input/output board 30, the analog quantity acquisition board 40 and the power supply board 60 are arranged on the back board 50. The backplane 50 is used to provide signal and power paths between the various boards.
The power board 60 supplies power to the network board 10, the core control board 20, the digital input/output board 30, and the analog quantity collecting board 40 through the back board 50.
The network board 10 is used for data interaction with the core control board 20 and transmitting data with the core control board 20 to the maintenance terminal, so that the state of the equipment on the rail vehicle can be fully and rapidly mastered through the maintenance terminal. The network board 10 and the core control board 20 are both provided with ethernet chips 11, and the ethernet chips of the core control board 20 and the ethernet chips of the network board 10 are in communication connection through an ethernet communication protocol.
The core control board 20 performs data interaction with the digital input/output board 30 and the analog quantity acquisition board 40, respectively. The core control board 20, the digital input/output board 30 and the analog quantity acquisition board 40 are all provided with ethernet chips 11, and the ethernet chips 11 of the core control board 20 are respectively in communication connection with the ethernet chips 11 of the digital input/output board 30 and the ethernet chips 11 of the analog quantity acquisition board 40 through an ethernet communication protocol.
It should be noted that the ethernet chip 11 may be a gigabit ethernet chip or a gigabit ethernet chip, and is not specifically configured here.
The utility model provides an ethernet the control unit is as the communication bus of data interaction between the control unit integrated circuit board through ethernet for hardware design and software development are all comparatively simple, thereby have reduced rail transit vehicle's research and development cost.
Alternatively, the number of the core control boards 20, the number of the digital input/output boards 30, and the number of the analog quantity acquisition boards 40 are all plural, and the plural core control boards are respectively connected to the plural digital input/output boards and the plural analog quantity acquisition boards in a one-to-one correspondence.
The combination of the core control boards 20, the digital input/output boards 30 and the analog acquisition boards 40 can complete specific functions, so that the ethernet control unit has a flexible architecture, and the modularization degree of the ethernet control unit is improved.
Exemplarily, the number of the network boards 10 is one, each network board 10 includes an FPGA chip 12 and four ethernet chips 11, and the FPGA chip 12 of the network board 10 is connected to the four ethernet chips 11 respectively; the number of the core control boards 20 is four, each core control board 20 comprises an FPGA chip 12 and three Ethernet chips 11, and the FPGA chip 12 of each core control board is connected with the three Ethernet chips 11; the number of the digital input/output boards 30 is four, the digital input/output boards 30 comprise an FPGA chip and an Ethernet chip, and the FPGA chip 12 of the digital input/output boards 30 is connected with an Ethernet chip 11; the number of the analog quantity acquisition boards 40 is four, each analog quantity acquisition board 40 comprises an FPGA chip and an Ethernet chip, and the FPGA chip 12 of the analog quantity acquisition board 40 is connected with one Ethernet chip 11. The four ethernet chips 11 of the network board 10 are respectively connected with one ethernet chip 11 on each of the four core control boards 20 through the backplane 50, so that the network board 10 simultaneously performs ethernet communication with the four core control boards 20, thereby realizing that the network board 10 simultaneously performs data exchange with the four core control boards 20; the ethernet chips 11 of the digital input/output board 30 and the ethernet chips 11 of the analog acquisition board 40 are respectively connected to the other two ethernet chips 11 of the core control board 20 in a one-to-one correspondence manner, so that the four core control boards 20 respectively and simultaneously perform ethernet work with the four digital input/output boards 30 and the analog acquisition board 40, and thus the four core control boards 20 respectively and simultaneously perform data exchange with the four digital input/output boards 30 and the analog acquisition board 40.
It should be noted that the number of the core control board 20, the digital input/output board 30 and the analog quantity acquisition board 40 is determined by the function realized by the ethernet control unit.
It should be further noted that, a physical connection manner of four pairs of differential signals is adopted between the core control board 20 and the network board 10, that is, two pairs of receiving signals and two pairs of sending signals are respectively provided, and eight lines are provided in total, so that data transceiving of the gigabit ethernet between the core control board 20 and the network board 10 is realized; the core control board 20 and the analog quantity acquisition board 40 and the digital quantity input/output board 30 are physically connected by four pairs of differential signals, that is, two pairs of receiving signals and two pairs of sending signals are respectively provided, and the total number is eight lines, so that the data transceiving of the gigabit Ethernet between the core control board 20 and the analog quantity acquisition board 40 and between the core control board and the digital quantity input/output board 30 is realized.
Optionally, in order to condition the input level state of the ethernet control unit, the digital input/output board 30 further includes an I/O conditioning circuit, and the FPGA chip of the digital input/output board 30 is connected to the I/O conditioning circuit.
The digital input/output board 30 reads the input level state passing through the I/O conditioning circuit through the FPGA chip and transmits the input level state to the core control board 20 in an ethernet communication manner, and then the core control board 20 operates the ethernet chip through the FPGA chip to transmit an I/O output instruction in the ethernet communication manner and outputs a corresponding level in a corresponding I/O channel.
Optionally, in order to read a sampling signal of the sensor, the analog quantity acquisition board 40 further includes an a/D sampling circuit, and the FPGA chip of the analog quantity acquisition board 40 is connected to the a/D sampling circuit.
The analog quantity acquisition board 40 operates the A/D sampling circuit through the FPGA chip and reads sampling signals of the sensor, then sends acquired data to the core control board 20 in an Ethernet communication mode, and finally the core control board 20 sends the data to the network board 10 in the Ethernet communication mode, so that the state of equipment on the rail vehicle can be fully and quickly mastered.
It should be noted that the ethernet belongs to a universal standard bus, and not only can be connected with an FPGA chip, but also can support processors of other architectures, so that the ethernet control unit is convenient to develop, and further, the development and maintenance costs of the rail vehicle are reduced.
It should also be noted that the sensor may be a temperature sensor, a humidity sensor, a current sensor, a voltage sensor, etc., and is not specifically provided herein.
Optionally, in order to improve the reliability of the ethernet control unit, an RGMII interface is used between the FPGA chip of the network board 10 and the ethernet chip of the network board 10 to exchange data. Certainly, the RGMII interface may also be used between the FPGA chip and the ethernet chip of the other board cards to exchange data, and no specific setting is made here.
Optionally, in order to store the data launched by the FPGA chip of the network board 10 in a file form, the network board 10 further includes an ARM control board 13, the ARM control board 13 of the network board 10 is in communication connection with the FPGA chip of the network board 10 through an ethernet communication protocol, and the ARM control board 13 of the network board 10 is in communication connection with the maintenance terminal through the ethernet communication protocol.
The FPGA chip of the network board 10 is connected with the ARM control board 13 through two Ethernet chips 11, so that Ethernet communication is performed between the FPGA chip of the network board 10 and the ARM control board 13, and data exchange between the FPGA chip of the network board 10 and the ARM control board 13 is realized.
The physical connection mode of four pairs of differential signals is adopted between the FPGA chip of the network board 10 and the ARM control board 13, that is, two pairs of receiving signals and two pairs of sending signals are respectively provided, and the total number is eight lines, so that the data receiving and sending of the gigabit Ethernet between the FPGA chip of the network board 10 and the ARM control board 13 are realized.
It should be noted that the ARM control board 13 communicates with the maintenance terminal through the ethernet chip 11 controlled by the RGMII interface, at this time, the ARM control board 13 can establish a TCP/IP server, and the human-computer interaction interface on the maintenance terminal establishes a link with the ARM control board 13 in the form of a TCP/IP client.
It is further noted that, in addition to the role of the ARM control board 13 of the network board 10 in communicating with the FPGA chip and the maintenance terminal, the ARM control board 13 further includes: establishing a Linux operating system, and storing data sent by the FPGA chip in a file form; the data sent by the FPGA chip are forwarded to a human-computer interaction interface on the maintenance terminal; and establishing an FTP server so that an operator can download the data file through the maintenance port.
Optionally, in order to actively read and write data of the FPGA chip of the network board 10, a GPMC interface is further used between the ARM control board 13 of the network board 10 and the FPGA chip of the network board 10 to exchange data, and at this time, the FPGA chip of the network board 10 is equivalent to a memory peripheral of the ARM control board 13.
Alternatively, in order that the ethernet control unit may be space-saving, the power board 60 includes a first power board 61 and a second power board 62, the first power board 61 supplies power to the network board 10, the core control board 20, and the digital input/output board 30 through the backplane 50; the second power board 62 supplies power to the analog quantity acquisition board 40 through the back board 50. In other implementations, the power board 60 may be an integrated board card, and is not specifically configured herein, where the product space allows.
Illustratively, the first power board 61 provides DC +5V and GND for the network board 10, the core control board 20, and the digital input/output board 30 through the backplane 50; the second power board 62 supplies DC +15V, DC-15V and GND to the analog quantity collecting board 40 through the back board 50.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the present invention.
Claims (10)
1. An ethernet control unit, comprising: the system comprises a network board, a core control board, a digital input/output board and an analog quantity acquisition board;
the network board, the core control board, the digital input/output board and the analog quantity acquisition board are all provided with Ethernet chips;
the Ethernet chip of the network board is in communication connection with the Ethernet chip of the core control board through an Ethernet protocol;
the Ethernet chip of the core control board is respectively in communication connection with the Ethernet chip of the digital input/output board and the Ethernet chip of the analog quantity acquisition board through an Ethernet protocol.
2. The ethernet control unit according to claim 1, wherein the number of the core control boards, the number of the digital input/output boards and the number of the analog acquisition boards are all plural, and the plural core control boards are respectively connected to the plural digital input/output boards and the plural analog acquisition boards in a one-to-one correspondence.
3. The ethernet control unit according to claim 2, wherein said network board comprises an FPGA chip and a plurality of said ethernet chips, said FPGA chip of said network board being connected to said plurality of said ethernet chips, respectively;
the core control board comprises an FPGA chip and three Ethernet chips, and the FPGA chip of the core control board is connected with the three Ethernet chips;
the digital input/output board comprises an FPGA chip and one Ethernet chip, and the FPGA chip of the digital input/output board is connected with one Ethernet chip;
the analog quantity acquisition board comprises an FPGA chip and one Ethernet chip, and the FPGA chip of the analog quantity acquisition board is connected with one Ethernet chip;
the plurality of Ethernet chips of the network board are respectively connected with one Ethernet chip on the plurality of core control boards in a one-to-one correspondence manner;
the Ethernet chip of the digital input/output board and the Ethernet chip of the analog quantity acquisition board are respectively connected with the other two Ethernet chips of the core control board in a one-to-one correspondence manner.
4. The Ethernet control unit of claim 3, wherein the digital input/output board further comprises an I/O conditioning circuit, the FPGA chip of the digital input/output board being connected to the I/O conditioning circuit.
5. The Ethernet control unit of claim 4, wherein the analog acquisition board further comprises an A/D sampling circuit, and the FPGA chip of the analog acquisition board is connected with the A/D sampling circuit.
6. The Ethernet control unit of claim 5, wherein the FPGA chip of the network board and the Ethernet chip of the network board exchange data using an RGMII interface.
7. The Ethernet control unit of any one of claims 3-6, wherein the network board further comprises an ARM control board, the ARM control board of the network board is communicatively connected to the FPGA chip of the network board via an Ethernet communication protocol, and the ARM control board of the network board is communicatively connected to the maintenance terminal via an Ethernet communication protocol.
8. The ethernet control unit according to claim 7, wherein a GPMC interface is further used between the ARM control board of the network board and the FPGA chip of the network board to exchange data.
9. The ethernet control unit of claim 8, further comprising a backplane and a power strip;
the network board, the core control board, the digital input/output board, the analog quantity acquisition board and the power supply board are all connected to the back board;
the power supply board supplies power to the network board, the core control board, the digital input/output board and the analog quantity acquisition board through the backboard;
the network board is in communication connection with the core control board through the backboard.
10. The ethernet control unit of claim 9, wherein said power boards comprise a first power board and a second power board, said first power board powering said network board, said core control board and said digital input/output board through said backplane; the second power supply board supplies power to the analog quantity acquisition board through the back board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202022747853.5U CN213240877U (en) | 2020-11-24 | 2020-11-24 | Ethernet control unit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202022747853.5U CN213240877U (en) | 2020-11-24 | 2020-11-24 | Ethernet control unit |
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|---|---|
| CN213240877U true CN213240877U (en) | 2021-05-18 |
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| CN202022747853.5U Active CN213240877U (en) | 2020-11-24 | 2020-11-24 | Ethernet control unit |
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