CN107729281B - A kind of high-speed transfer implementation method based on RapidIO - Google Patents

A kind of high-speed transfer implementation method based on RapidIO Download PDF

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Publication number
CN107729281B
CN107729281B CN201710769906.3A CN201710769906A CN107729281B CN 107729281 B CN107729281 B CN 107729281B CN 201710769906 A CN201710769906 A CN 201710769906A CN 107729281 B CN107729281 B CN 107729281B
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dma
data
rapidio
load
address
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CN107729281A (en
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杜默
谭智敏
钟松岩
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Beijing Aerospace 706 Information Technology Co ltd
Beijing Institute of Computer Technology and Applications
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Beijing Institute of Computer Technology and Applications
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/28DMA

Abstract

The high-speed transfer implementation method based on RapidIO that the invention discloses a kind of, wherein include: to carry out the load of RapidIO drive module;Carry out main equipment drive load;Loaded from device drives;Carry out the load of high-speed transfer drive module;After carrying out the load of high-speed transfer drive module, equipment opening is carried out;Apply for DMA channel;Carry out the mapping of virtual address to physical address;By RapidIO address of cache to physical address;Carry out the communication between master-slave equipment, comprising: send data acquisition instructions;Send DMA data packet;Notice receiving device DMA data has been sent;Receive DMA data;It repeats to send DMA data packet, receiving device DMA data is notified to send and received DMA data step, until total data is sent;Transmission is ceased and desisted order.The present invention can carry out carrying out the work of big data high-speed transfer by DMA under RapidIO bus under VPX framework.

Description

A kind of high-speed transfer implementation method based on RapidIO
Technical field
The present invention designs a kind of data transmission method, is particularly based on the high-speed transfer implementation method of RapidIO.
Background technique
The existing warplane computer for using VPX architectural framework is mostly with Serial RapidIO serial communication bus For system interconnection, Serial RapidIO serial communication bus will be the master of the following Military Computer system interconnected Stream mode;VPX computer-internal board is typically based on dedicated RapidIO chip (such as the TSI721 of Integrated Device Technology, Inc.) or IP kernel Mode constructs interconnecting interface, and the advantage of the mode based on dedicated RapidIO chip is communication stability height, good reliability, It is at low cost, complete function.
It is less to Serial RapidIO software study both at home and abroad compared to hardware, especially Driver Development and research Reference is seldom, and the available driving that official provides is not provide the mature driving of Linux platform for windows platform.
Summary of the invention
The high-speed transfer implementation method based on RapidIO that the purpose of the present invention is to provide a kind of, it is above-mentioned existing for solving There is the problem of technology.
A kind of high-speed transfer implementation method based on RapidIO of the present invention, wherein include: to carry out RapidIO drive module Load;Carry out main equipment drive load;Loaded from device drives;Carry out the load of high-speed transfer drive module;Carry out high speed After transmission drive module load, equipment opening is carried out, comprising: register a doorbell response in the driving of receiving end and ask It finds a function, after equipment receives a doorbell signal containing specified doorbell number, local device is responded, and is executed Behavior in doorbell respond request function;A message is registered in the driving of receiving end enters mailbox respond request letter Number, after equipment receives message signal, local device is responded, and is executed message and is entered mailbox respond request function In behavior;A message is registered in the driving of receiving end and goes out mailbox respond request function, when equipment receives After message signal, local device is responded, and is executed message and is gone out the behavior in mailbox respond request function;It carries out The initialization of message transmit queue;Apply for DMA channel;Carry out the mapping of virtual address to physical address;By the address RapidIO It is mapped to physical address;Carry out the communication between master-slave equipment, comprising: send data acquisition instructions;Send DMA data packet;Notice Receiving device DMA data has been sent;Receive DMA data;It repeats to send DMA data packet, receiving device DMA data is notified to send And DMA data step is received, until total data is sent;Transmission is ceased and desisted order.
High-speed transfer implementation method according to the present invention based on RapidIO, wherein send further packet of ceasing and desisting order Include: transmitting terminal, which will cease and desist order to be put into, sends buffer area, and given transmission buffer length, sends the data to receiving end and sets It is standby;The data in mailbox are read in receiving end after receiving message signal, and the data read in mailbox are copied to In message queue, executes and stop data acquisition function, data receiver queue is emptied, to receive new message data.
High-speed transfer implementation method according to the present invention based on RapidIO, wherein main after total data is sent completely Equipment sends halt instruction by message function, notifies from device end data collection task.
High-speed transfer implementation method according to the present invention based on RapidIO, wherein sending data acquisition instructions includes: Data acquisition instructions are put by transmitting terminal sends buffer area, and given transmission buffer length, sends the data to receiving end and sets It is standby;The data in mailbox are read in receiving end after receiving message signal, and the data read in mailbox are copied to In message queue, data acquisition function is executed, data receiver queue is emptied, to receive new message data;
High-speed transfer implementation method according to the present invention based on RapidIO, wherein sending DMA data packet includes: hair Sending end defines DMA transmitting terminal descriptor, defines the transmission direction of DMA, applies for DMA channel, binds buffer area to be sent, gives mesh Address, configure transmitting terminal RapidIO MA data, obtain dma descriptor, determine that data are sent completely completely, reset DMA response marker;
High-speed transfer implementation method according to the present invention based on RapidIO, wherein receiving DMA data includes: to receive It after end receives a doorbell, learns and has received data on the physical address mapped, mapped from equipment reading Data in DMA buffer are simultaneously saved to local.
High-speed transfer implementation method according to the present invention based on RapidIO, wherein the step of main equipment drive load, It include: 1, load " rapidio.ko " driving, the incoming parameter hdid in load, configuration parameter hdid are 0;2, it loads " tsi721_mport.ko " driving;3, load " rio-scan.ko " driving, incoming parameter scan, configuration parameter in load Scan is 1.
High-speed transfer implementation method according to the present invention based on RapidIO, wherein the step of being loaded from device drives Are as follows: 1, load " rapidio.ko " driving, the incoming parameter hdid in load, configuration parameter hdid are -1;2, it loads " tsi721_mport.ko " driving;3, load " rio-scan.ko " driving, incoming parameter scan, configuration parameter in load Scan is 0.
High-speed transfer implementation method according to the present invention based on RapidIO, wherein obtained after loading turntable driving RapidIO equipment rdev, for main equipment, rdev is from equipment, and the rdev detected for from equipment is main Equipment.
High-speed transfer implementation method according to the present invention based on RapidIO, wherein send DMA data packet, comprising: hair Sending end: define DMA transmitting terminal descriptor, comprising: define DMA asynchronous transmission descriptor, define in this structural body including A descriptor including the cookie of DMA, physical address and channel number call back function;Define the transmission direction of DMA, packet Include: the transmission direction of DMA is divided into transmitted in both directions, unidirectionally sends data, unidirectional reading data and without DMA transfer;It binds pending Send buffer area, comprising: by the address of appointed buffer and be mounted on RapidIO dma descriptor, the data of transmission are should Data in buffer area;Given destination address, comprising: the destination address that given DMA is sent, the address are the address RapidIO, DMA sends the data in buffer area on the specified address RapidIO, receiving end by the address of cache to it is local physically Location, then by physical address map to virtual address, the data that the data in the virtual address are DMA transfer are read, constantly Continuous data are sent on destination address;Configure transmitting terminal RapidIO DMA data, comprising: configuration DMA sends end data and passes Defeated information, the data include I/O list, list length, RapidIO WriteMode and RapidIO destination address address;It obtains Dma descriptor, comprising: RapidIO DMA data is assigned to by DMA description by rio_dma_prep_slave_sg () function DMA data is sent receiving end by symbol, the descriptor;DMA call back function, comprising: by retouching after DMA data packet is sent completely It states symbol and calls call back function, the calling of the function illustrates that DMA data is sent completely completely, no longer influences the hair of follow-up data Pass through journey;Resetting DMA response marker, comprising: the transmission process of DMA is over, during data packet is sent, DMA Controller sends DMA answer signal to peripheral hardware, and it is 1 that transmitting terminal answer signal DMA, which controls response home position, terminates in transmission Afterwards, which should be reset again, makes it after data packet is sent completely in available mode.
High-speed transfer implementation method based on RapidIO of the invention, based on the dedicated TSI721 chip that industry is most mature Scheme has exploitation in mind and transplants the driver being suitble under Linux platform, is processor plate, two class base of high-speed record memory plane Serial RapidIO communication between plinth board provides driving layer and supports, and carries out the application layer exploitation of demonstration and verification, by The prototype design opportunity of " next-generation ground radar computer " breaks through Serial RapidIO and drives common technology.Pass through TSI721 conversion chip realizes the process that data are converted from PCIE to RapidIO, is mainly used for meeting weapon system radar number According to the demand of processor big data quantity exchange transmission, data are transmitted between motherboard and memory plane/data record plate.
Detailed description of the invention
Nothing
Specific embodiment
To keep the purpose of the present invention, content and advantage clearer, below with reference to embodiment, to specific reality of the invention The mode of applying is described in further detail.
RapidIO large-capacity data transmission driving realization process include RapidIO drive module loading procedure and The realization of doorbell, message, DMA communication function.It is opened for the main place's platform RapidIO serial communication protocol driving of X86 Hair, the communication function which realizes are as shown in table 1.
Table 1
High-speed data acquisition process is that main equipment sends data, the process for receiving data from equipment and storing, and the process is first It first passes through and sends data acquisition instructions notice from equipment progress data collection task, main equipment sends data later, in main equipment After being sent completely, sends data and be sent completely instruction, terminate data acquisition.The process by by doorbell function, Message function combines to realize with DMA function.
A kind of high-speed transfer implementation method based on RapidIO of the present invention, comprising:
S1, RapidIO drive module loading procedure, comprising:
It needs to drive RapidIO in the present embodiment and be compiled with modular form, independently of being loaded except kernel, The RapidIO driving file of TSI721 is provided in linux kernel, which is located under the path " drivers/rapidio ".
RapidIO data transmission procedure needs to distinguish master-slave equipment, all from equipment by main equipment Quality Initiative road. Therefore, it is necessary to memory plane and data record plate are arranged first, from plate, to load from load mainboard driving after plate driving, otherwise Scanning result will malfunction.Wherein memory plane is defaulted as not needing to carry out operation bidirectional, data record plate is needed in mainboard from plate It carries out working from plate attribute configuration before scanning.It needs first to load during loading and be driven from the RapidIO of equipment, load Carry out the drive load process of main equipment again after the completion.If mistake occurs for sequence, need to carry out power-off restarting behaviour to system Make.
The step of S2, main equipment drive load, comprising:
1, load " rapidio.ko " driving, the driving provide the transmitting and receiving to mapping, rio equipment, port data And the support to functions such as doorbell, message, DMA.The driving needs the incoming parameter hdid in load, configuration ginseng Number hdid is -1;
2, load " tsi721_mport.ko " driving, this is driven to TSI721 chip drives, provides the end to TSI721 Mouth operation and the support of DMA data transfer function;
3, load " rio-scan.ko " driving, which is mainly scanned entire link, dynamically by the institute in link There is the bridging chip on TSI721 conversion chip and power board to scan to come, and routing table is written.Driving needs are loading When incoming parameter scan, configuration parameter scan is that 0 pair of entire link is scanned.
S3, from device drives load the step of are as follows:
1, load " rapidio.ko " driving, the driving provide the transmitting and receiving to mapping, rio equipment, port data And the support to functions such as doorbell, message, DMA.The driving needs the incoming parameter hdid in load, configuration ginseng Number hdid is 0;
2, load " tsi721_mport.ko " driving, this is driven to TSI721 chip drives, provides the end to TSI721 Mouth operation and the support of DMA data transfer function;
3, load " rio-scan.ko " driving, which is mainly scanned entire link, dynamically by the institute in link There is the bridging chip on TSI721 conversion chip and power board to scan to come, and routing table is written.Driving needs are loading When incoming parameter scan, configuration parameter scan is that 1 pair of entire link is scanned.
As a result: RapidIO equipment rdev is obtained after loading turntable driving, for main equipment, rdev be from equipment, The rdev detected for from equipment is main equipment.By to rdev equipment carry out operation realize main equipment with from equipment Between data transmit work.
S4, high-speed transfer drive module loading procedure include:
S41, equipment detection process, comprising:
On the basis of completing equipment scanning, high-speed transfer drive module loading procedure is carried out.Pass through a upper process scanning Obtained remote equipment is matched with the manufacturer number of equipment in list of devices and device number, successful match, is loaded this and is distally set Standby, no successful match cannot then load.If needing to add for each equipment at this time there are multiple equipment on topological structure Carry the driving of a manufacturer number adaptable with it and device number.Complete the loading procedure of high-speed transfer drive module.
S42, device procedures are opened, comprising:
After detecting equipment, the work for opening equipment is carried out:
1, a doorbell respond request function is registered in the driving of receiving end, when equipment receives one containing finger After the doorbell signal for determining doorbell number, local device is responded, and executes the behavior in receptance function;
2, a message is registered in the driving of receiving end and enter mailbox respond request function, when equipment receives After message signal, local device is responded, and executes the behavior in receptance function;
3, a message is registered in the driving of receiving end and go out mailbox respond request function, when equipment receives After message signal, local device is responded, and executes the behavior in receptance function;
4, message transmit queue initializes;
5, DMA channel application.TSI721 chip provides 8 road DMA channels, logical in one DMA of the total online application of RapidIO Road can carry out DMA data transfer by the channel;
6, mapping of the virtual address to physical address.It is that data are read in virtual address that computer, which reads data, and DMA It is to be operated to physical address, therefore, for the data of reading DMA transmission, needs first by physical address map to virtually Address;
7, by RapidIO address of cache to physical address.The DMA data transfer process carried out by RapidIO, destination Location is the address RapidIO, is not the physical address of purpose equipment, it is therefore desirable to by the object of the address RapidIO and purpose equipment Manage address phase mapping;
Step S5, the communication process between master-slave equipment, comprising:
This process sends instruction by message function, controls and receives end equipment and carries out data acquisition or stop data Collection process.Table 2 is instruction catalogue.
Table 2
Instruction name Instruction ID
Data acquisition 0x0101
It ceases and desist order 0x010F
1, data acquisition instructions are sent, comprising:
Transmitting terminal:
Data acquisition instructions are put into and send buffer area, and given transmission buffer length, letter is sent by message Number sends the data to receiving device.
Receiving end:
The data in mailbox are read after receiving message signal, and the data read in mailbox are copied into message In queue, data acquisition function is executed, data receiver queue is emptied, to receive new message data.
2, DMA data packet is sent, comprising:
Transmitting terminal:
(1) DMA transmitting terminal descriptor is defined
DMA asynchronous transmission descriptor is defined, the cookie including DMA is defined in this structural body, physical address, is led to A descriptor including Taoist monastic name call back function etc.;
(2) transmission direction of DMA is defined
The transmission direction of DMA is divided into transmitted in both directions, unidirectionally transmission data, unidirectional reading data and without DMA transfer, here The transmission direction for defining DMA is transmitted in both directions;
(3) DMA channel application
TSI721 chip provides 8 road DMA channels, in one channel DMA of the total online application of RapidIO, passes through the channel It can carry out DMA data transfer;
(4) buffer area to be sent is bound
It by the address of appointed buffer and is mounted on RapidIO dma descriptor, the data of transmission are the buffer area In data;
(5) destination address is given
The destination address that given DMA is sent, the address are the address RapidIO, and the data in buffer area are sent finger by DMA On the fixed address RapidIO, receiving end by the address of cache to local physical address, then by physical address map to virtually The data that the data in the virtual address are DMA transfer are read in location, by constantly sending continuous number on destination address According to realizing the transmission process of big data quantity;
(6) transmitting terminal RapidIO DMA data is configured
The information that DMA sends end data transmission is configured, which includes I/O list, list length, RapidIO WriteMode And RapidIO destination address address.
(7) dma descriptor is obtained
RapidIO DMA data is assigned to DMA descriptor by rio_dma_prep_slave_sg () function, the description DMA data is sent receiving end by symbol;
(8) DMA call back function
Call back function is called by descriptor after DMA data packet is sent completely, the calling of the function illustrates DMA data It is sent completely completely, no longer influences the transmission process of follow-up data.
(9) DMA response marker is reset
The transmission process of DMA is over, and during data packet is sent, dma controller sends DMA response to peripheral hardware Signal, it is 1 that transmitting terminal answer signal DMA, which controls response home position,.After transmission, which should be weighed again It sets, makes it after data packet is sent completely in available mode.Here, DMA shares 128 queues, uses a queue every time, If not resetting DMA control response marker, it may appear that the problem of 128 bag data can only be sent.
3, notice receiving device DMA data has been sent, comprising:
Since the DMA function of RapidIO only sends data to specified address, interruption will not be sent, purpose equipment is not known The data that transmitting terminal sends over have been received in road.After DMA data packet is sent completely, pass through calling in transmitting terminal Doorbell sends function, sends specified data to receiving device, purpose equipment is notified to take out data from address.
4, DMA data receives, comprising:
After receiving end receives a doorbell, learns and received data on the physical address mapped, from equipment It reads the data in the DMA buffer mapped and saves to local, realize the receive capabilities of DMA data.
5, continuous data is sent, comprising:
The 2nd, 3,4 steps are repeated, until total data is sent;
6, it sends and ceases and desist order
After total data is sent completely, main equipment sends halt instruction by message function, notifies from device end number According to collecting work.
Transmitting terminal:
It will cease and desist order to be put into and send buffer area, and given transmission buffer length, sending function by message will Data are sent to receiving device.
Receiving end:
The data in mailbox are read after receiving message signal, and the data read in mailbox are copied into message In queue, executes and stop data acquisition function, data receiver queue is emptied, to receive new message data.
Step S6, the unloading of drive module, comprising:
When unloading driving, need that function is called to discharge doorbell function.
When unloading driving, need that function release message is called to enter mailbox functions.
When unloading driving, need that function release message is called to go out mailbox functions.
When unloading driving, need that function is called to discharge DMA channel.
So far, high-speed data acquisition process is completed.By test, which can achieve 700MB/ S realizes the high speed data transfer process under VPX framework.
TSI721 chip includes 8 DMA channels, and this patent does not limit to and any one channel.
A kind of high-speed transfer implementation method based on RapidIO of the present invention, can be driven by RapidIO driver TSI721 chip operation, to carry out carrying out the work of big data high-speed transfer by DMA under RapidIO bus under VPX framework.In In practical application multidiameter delay transmission process can be realized by registering 8 road DMA channels simultaneously.
The above is only a preferred embodiment of the present invention, it is noted that for the ordinary skill people of the art For member, without departing from the technical principles of the invention, several improvement and deformations can also be made, these improvement and deformations Also it should be regarded as protection scope of the present invention.

Claims (10)

1. a kind of high-speed transfer implementation method based on RapidIO characterized by comprising
Carry out the load of RapidIO drive module;
Carry out main equipment drive load;
Loaded from device drives;
Carry out the load of high-speed transfer drive module;
After carrying out the load of high-speed transfer drive module, equipment opening is carried out, comprising:
A doorbell respond request function is registered in the driving of receiving end, when equipment receives one containing specified doorbell After the doorbell signal of number, local device is responded, and executes the behavior in doorbell respond request function;
A message is registered in the driving of receiving end and enters mailbox respond request function, when equipment receives message signal Afterwards, local device is responded, and is executed message and is entered the behavior in mailbox respond request function;
A message is registered in the driving of receiving end and goes out mailbox respond request function, when equipment receives message signal Afterwards, local device is responded, and is executed message and is gone out the behavior in mailbox respond request function;
Carry out the initialization of message transmit queue;
Apply for DMA channel;
Carry out the mapping of virtual address to physical address;
By RapidIO address of cache to physical address;Carry out the communication between master-slave equipment, comprising:
Send data acquisition instructions;
Send DMA data packet;
Notice receiving device DMA data has been sent;
Receive DMA data;
It repeats to send DMA data packet, receiving device DMA data is notified to send and received DMA data step, until whole numbers According to being sent;
Transmission is ceased and desisted order.
2. the high-speed transfer implementation method based on RapidIO as described in claim 1, which is characterized in that transmission is ceased and desisted order Further comprise:
Transmitting terminal, which will cease and desist order to be put into, sends buffer area, and given transmission buffer length, sends the data to receiving end and sets It is standby;The data in mailbox are read in receiving end after receiving message signal, and the data read in mailbox are copied to In message queue, executes and stop data acquisition function, data receiver queue is emptied, to receive new message data.
3. the high-speed transfer implementation method based on RapidIO as described in claim 1, which is characterized in that total data is sent After the completion, main equipment sends halt instruction by message function, notifies from device end data collection task.
4. the high-speed transfer implementation method based on RapidIO as described in claim 1, which is characterized in that send data acquisition Instruction, which includes: transmitting terminal, to be put into data acquisition instructions and sends buffer area, and it is given send buffer length, send the data to Receiving device;The data in mailbox are read in receiving end after receiving message signal, and the data read in mailbox are replicated Into message queue, data acquisition function is executed, data receiver queue is emptied, to receive new message data.
5. the high-speed transfer implementation method based on RapidIO as described in claim 1, which is characterized in that send DMA data packet Include: that transmitting terminal defines DMA transmitting terminal descriptor, define the transmission direction of DMA, applies for DMA channel, bind buffering to be sent Area gives destination address, configures the DMA data of transmitting terminal RapidIO, obtains dma descriptor, determines that data are sent completely It completes, resets DMA response marker.
6. the high-speed transfer implementation method based on RapidIO as described in claim 1, which is characterized in that receive DMA data packet It includes: after receiving end receives a doorbell, learning and received data on the physical address mapped, reflected from equipment reading The data in DMA buffer penetrated simultaneously are saved to local.
7. the high-speed transfer implementation method based on RapidIO as described in claim 1, which is characterized in that main equipment driving adds The step of load, comprising:
(1), load " rapidio.ko " driving, the incoming parameter hdid in load, configuration parameter hdid are 0;
(2), load " tsi721_mport.ko " driving;
(3), load " rio-scan.ko " driving, the incoming parameter scan in load, configuration parameter scan are 1.
8. the high-speed transfer implementation method based on RapidIO as described in claim 1, which is characterized in that from device drives plus The step of load are as follows:
(1), load " rapidio.ko " driving, the incoming parameter hdid in load, configuration parameter hdid are -1;
(2), load " tsi721_mport.ko " driving;
(3), load " rio-scan.ko " driving, the incoming parameter scan in load, configuration parameter scan are 0.
9. the high-speed transfer implementation method based on RapidIO as described in claim 1, which is characterized in that driven in load scanning RapidIO equipment rdev is obtained after dynamic, for main equipment, rdev is detected for from equipment from equipment Rdev is main equipment.
10. the high-speed transfer implementation method based on RapidIO as described in claim 1, which is characterized in that send DMA data Packet, comprising:
Transmitting terminal:
Define DMA transmitting terminal descriptor, comprising:
DMA asynchronous transmission descriptor is defined, defines cookie, physical address and channel including DMA in this structural body A descriptor including number call back function;
Define the transmission direction of DMA, comprising:
The transmission direction of DMA is divided into transmitted in both directions, unidirectionally sends data, unidirectional reading data and without DMA transfer;
Bind buffer area to be sent, comprising:
The address of appointed buffer is mounted on RapidIO dma descriptor, the data of transmission are the data in the buffer area;
Given destination address, comprising:
The destination address that given DMA is sent, the address are the address RapidIO, and DMA sends the data in buffer area to specified On the address RapidIO, receiving end to local physical address, then by physical address map to virtual address, reads the address of cache Taking the data in the virtual address is the data of DMA transfer, and continuous data are constantly sent on destination address;
Configure transmitting terminal RapidIO DMA data, comprising:
Configure DMA send end data transmission information, the data include I/O list, list length, RapidIO WriteMode and RapidIO destination address;
Obtain dma descriptor, comprising:
RapidIO DMA data is assigned to dma descriptor by rio_dma_prep_slave_sg () function, which will DMA data is sent to receiving end;
DMA call back function, comprising:
Call back function is called by descriptor after DMA data packet is sent completely, the calling of the function illustrates that DMA data is complete It is sent completely entirely, no longer influences the transmission process of follow-up data;
Reset DMA response marker, comprising:
The transmission process of DMA is over, and during data packet is sent, dma controller sends DMA response letter to peripheral hardware Number, it is 1 that transmitting terminal answer signal DMA, which controls response home position, after transmission, which should be reset again, Make it after data packet is sent completely in available mode.
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