CN213181906U - Multi-mainboard test circuit and device - Google Patents
Multi-mainboard test circuit and device Download PDFInfo
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- CN213181906U CN213181906U CN202022219679.7U CN202022219679U CN213181906U CN 213181906 U CN213181906 U CN 213181906U CN 202022219679 U CN202022219679 U CN 202022219679U CN 213181906 U CN213181906 U CN 213181906U
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Abstract
The utility model provides a many mainboards test circuit and many mainboards testing arrangement, the circuit includes receiving module, control module and a plurality of test module, receiving module's output connection control module's input, and each test module's input is connected respectively to control module's output, and a mainboard under test is connected respectively to each test module's output, wherein: the receiving module is used for receiving the test signal and sending the received test signal to the control module; the control module is used for receiving the test signal sent by the receiving module and sending a corresponding test instruction to the test module according to the test signal; and the test module is used for receiving the test instruction sent by the control module and sending the received test instruction to the tested mainboard so as to test the tested mainboard. By sending the test instruction to the control module and then testing the plurality of test modules through the control module, the test efficiency is greatly improved.
Description
Technical Field
The utility model relates to a mainboard test field especially relates to a many mainboards test circuit and many mainboards testing arrangement.
Background
At present, the test of flat screen television mainboard mainly adopts the mode one to test, and a staff can only test one at the same time promptly and is surveyed the mainboard, and this kind of test mode makes test time be of a specified duration, and because the mainboard kind is more and production speed is fast, leads to the mainboard low test efficiency to influence production efficiency.
SUMMERY OF THE UTILITY MODEL
The utility model discloses a main aim at provides a many mainboards test circuit and many mainboard testing arrangement, aims at solving the low problem of mainboard efficiency of test among the prior art.
In order to achieve the above object, the utility model provides a many mainboards test circuit, the circuit includes receiving module, control module and a plurality of test module, receiving module's output is connected control module's input, each test module's input is connected respectively to control module's output, and a mainboard under test is connected respectively to each test module's output, wherein:
the receiving module is used for receiving the test signal and sending the received test signal to the control module;
the control module is used for receiving the test signal sent by the receiving module and sending a corresponding test instruction to the test module according to the test signal;
and the test module is used for receiving the test instruction sent by the control module and sending the received test instruction to the tested mainboard so as to test the tested mainboard.
Optionally, the receiving module comprises a remote control receiving head,
the output end of the remote control receiving head is connected with the input end of the control module, the power end of the remote control receiving head is connected with a power supply, and the grounding end of the remote control receiving head is grounded.
Optionally, the control module includes a control chip, and the control chip includes a plurality of output terminals;
the output end of the remote control receiving head is respectively connected with the input end of the control chip, and one output end of the control chip is correspondingly connected with the input end of one test module.
Optionally, the control module further includes a plurality of first resistors, and each input terminal of the control chip is connected to the output terminal of the remote control receiving head through one first resistor.
Optionally, the control module further includes a plurality of compensation units, the number of the compensation units is the same as that of the test modules, the input end of each compensation unit is connected to the power supply, and one output end of the control chip is correspondingly connected to the output end of one compensation unit;
and the compensation unit is used for compensating the power supply of the test module.
Optionally, the compensation unit comprises a second resistor,
the first end of the second resistor is connected with a power supply, and the second end of the second resistor is connected with one output end of the control chip.
Optionally, the circuit further includes a plurality of indication modules, the number of the indication modules is the same as that of the test modules, and a control end of one indication module is correspondingly connected to a motherboard status end of one test module;
the indication module is used for receiving the mainboard state signal sent by the test module and indicating according to the mainboard state signal;
the test module is also used for detecting the state of the mainboard and sending a corresponding mainboard state signal to the indication module according to the state of the mainboard.
Optionally, the indication module comprises a triode, a third resistor, a fourth resistor and a light emitting diode,
the base electrode of the triode is connected with the mainboard state end of the test module through the third resistor, the emitting electrode of the triode is grounded, the collecting electrode of the triode is connected with the negative electrode of the light-emitting diode, the positive electrode of the light-emitting diode is connected with the base electrode of the triode through the fourth resistor, and the positive electrode of the light-emitting diode is also connected with the power supply.
Optionally, the light emitting diode is a bicolor light emitting diode.
In addition, in order to achieve the above object, the present invention also provides a multi-motherboard testing apparatus, which comprises a multi-motherboard testing circuit configured as the above multi-motherboard testing circuit.
The utility model provides a pair of many mainboards test circuit and many mainboards testing arrangement, the circuit includes receiving module, control module and a plurality of test module, receiving module's output is connected control module's input, each test module's input is connected respectively to control module's output, and one is connected respectively to each test module's output and is surveyed the mainboard, wherein: the receiving module is used for receiving the test signal and sending the received test signal to the control module; the control module is used for receiving the test signal sent by the receiving module and sending a corresponding test instruction to the test module according to the test signal; and the test module is used for receiving the test instruction sent by the control module and sending the received test instruction to the tested mainboard so as to test the tested mainboard. By sending the test instruction to the control module and then testing the plurality of test modules through the control module, the test efficiency is greatly improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the structures shown in the drawings without creative efforts.
FIG. 1 is a functional block diagram of an embodiment of the multi-motherboard test circuit of the present invention;
FIG. 2 is a circuit diagram of the multi-motherboard test circuit of the present invention applied in the embodiment of FIG. 1;
FIG. 3 is a circuit diagram of an indication module in the multi-motherboard test circuit of the present invention;
fig. 4 is the pin diagram of the test module in the multi-motherboard test circuit of the present invention.
The objects, features and advantages of the present invention will be further described with reference to the accompanying drawings.
The reference numbers illustrate:
| reference numerals | Name (R) | Reference numerals | Name (R) | |
| 100 | Receiving module | R1～R4 | First to |
|
| 200 | Control module | | Triode transistor | |
| 210 | Compensation unit | D1 | |
|
| 300 | Test module | U1 | Control chip | |
| U2 | Remote control receiving head |
Detailed Description
It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.
It should be noted that all directional indicators (such as up, down, left, right, front, and back) in the embodiments of the present invention are only used to explain the relative position relationship between the components, the motion situation, and the like in a specific posture (as shown in the drawings), and if the specific posture is changed, the directional indicator is changed accordingly.
In addition, the descriptions related to "first", "second", etc. in the present invention are for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicit ly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, the technical solutions in the embodiments may be combined with each other, but it must be based on the realization of those skilled in the art, and when the technical solutions are contradictory or cannot be realized, the combination of the technical solutions should not be considered to exist, and is not within the protection scope of the present invention.
The utility model provides a many mainboards test circuit is applied to many mainboards testing arrangement, please refer to fig. 1, and fig. 1 is the utility model discloses the functional module diagram of many mainboards test circuit embodiment. In this embodiment, the multi-motherboard testing circuit includes a receiving module 100, a control module 200, and a plurality of testing modules 300, an output end of the receiving module 100 is connected to an input end of the control module 200, output ends of the control module 200 are respectively connected to input ends of the testing modules 300, and output ends of the testing modules 300 are respectively connected to a tested motherboard, where:
the receiving module 100 is configured to receive a test signal and send the received test signal to the control module 200;
the control module 200 is configured to receive a test signal sent by the receiving module 100, and send a corresponding test instruction to the test module 300 according to the test signal;
the test module 300 is configured to receive a test instruction sent by the control module 200, and send the received test instruction to a tested motherboard, so as to test the tested motherboard.
In this embodiment, the test efficiency is greatly improved by sending the test instruction to the control module 200 and then testing the plurality of test modules 300 through the control module 200.
Further, referring to fig. 2 to 4 together, the receiving module 100 includes a remote control receiving head U2,
the output end of the remote control receiving head U2 is connected with the input end of the control module 200, the power end of the remote control receiving head U2 is connected with a power supply, and the grounding end of the remote control receiving head U2 is grounded.
Further, the control module 200 comprises a control chip U1, the control chip U1 comprises a plurality of output terminals;
the output end of the remote control receiving head U2 is respectively connected with the input end of the control chip U1, and one output end of the control chip U1 is correspondingly connected with the input end of one test module 300.
Further, the control module 200 further includes a plurality of first resistors R1, and each input terminal of the control chip U1 is connected to the output terminal of the remote control receiving head U2 through a first resistor R1.
Further, the control module 200 further includes a plurality of compensation units 210, the number of the compensation units 210 is the same as that of the test modules 300, the input end of the compensation unit 210 is connected to a power supply, and one output end of the control chip U1 is correspondingly connected to the output end of one compensation unit 210;
the compensation unit 210 is used for compensating the power supply of the test module 300.
Further, the compensation unit 210 includes a second resistor R2,
the first end of the second resistor R2 is connected with a power supply, and the second end of the second resistor R2 is connected with an output end of the control chip U1.
Since the type and performance requirements of the tested motherboard are different, the power supply provided by the test module 300 may be insufficient, and therefore the compensation unit 210 is configured to supplement the power supply when the power supply of the test module 300 is insufficient.
Further, the circuit further includes a plurality of indication modules, the number of the indication modules is the same as that of the test modules 300, and a control end of one indication module is correspondingly connected with a motherboard status end of one test module 300;
the indicating module is configured to receive a motherboard status signal sent by the testing module 300, and indicate according to the motherboard status signal;
the test module 300 is further configured to detect a motherboard state, and send a corresponding motherboard state signal to the indication module according to the motherboard state.
Further, the indicating module comprises a transistor Q1, a third resistor R3, a fourth resistor R4 and a light emitting diode D1,
the base of the triode Q1 is connected to the main board state end of the test module 300 through the third resistor R3, the emitter of the triode Q1 is grounded, the collector of the triode Q1 is connected to the cathode of the light emitting diode D1, the anode of the light emitting diode D1 is connected to the base of the triode Q1 through the fourth resistor R4, and the anode of the light emitting diode D1 is also connected to the power supply.
Further, the light emitting diode D1 is a bicolor light emitting diode.
It should be noted that the indication module may further include a plurality of light emitting diodes D1 with different colors, and light the light emitting diodes D1 with different colors when different states of the tested motherboard are detected.
The following description is made with reference to fig. 2 to 4:
the remote control receiving head U2 receives a test signal sent by a user, and sends the test signal to the control chip U1, the control chip U1 sends a corresponding test instruction to each test module 300 according to the test signal after receiving the test signal, the test module 300 sends the test instruction to a tested mainboard connected with the test module 300, when the mainboard state end of the test module 300 detects that the mainboard is in a standby state, the bicolor light-emitting diode D1 receives a lower voltage and lights a red light, and when the mainboard state end of the test module 300 detects that the mainboard is in a test state, the bicolor light-emitting diode D1 receives a higher voltage and lights a green light.
The utility model discloses still protect a many mainboard testing arrangement, this many mainboard testing arrangement includes many mainboard test circuit, and above-mentioned embodiment can be referred to this many mainboard test circuit's structure, no longer gives details here. It should be understood that, since the protection device of the present embodiment adopts the technical solution of the multi-motherboard test circuit, the protection device has all the beneficial effects of the multi-motherboard test circuit.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or system. The term "comprising", without further limitation, means that the element so defined is not excluded from the group of processes, methods, articles, or systems that include the element. The above embodiment numbers of the present invention are only for description, and do not represent the advantages and disadvantages of the embodiments.
The above is only the preferred embodiment of the present invention, and not the scope of the present invention, all the equivalent structures or equivalent flow changes made by the contents of the specification and the drawings or the direct or indirect application in other related technical fields are included in the patent protection scope of the present invention.
Claims (10)
1. The utility model provides a many mainboards test circuit, its characterized in that, the circuit includes receiving module, control module and a plurality of test module, receiving module's output is connected control module's input, control module's output is connected each test module's input respectively, and a mainboard under test is connected respectively to each test module's output, wherein:
the receiving module is used for receiving the test signal and sending the received test signal to the control module;
the control module is used for receiving the test signal sent by the receiving module and sending a corresponding test instruction to the test module according to the test signal;
and the test module is used for receiving the test instruction sent by the control module and sending the received test instruction to the tested mainboard so as to test the tested mainboard.
2. The multi-motherboard test circuit of claim 1, wherein said receive module comprises a remote receive head,
the output end of the remote control receiving head is connected with the input end of the control module, the power end of the remote control receiving head is connected with a power supply, and the grounding end of the remote control receiving head is grounded.
3. The multi-motherboard test circuit of claim 2, wherein said control module comprises a control chip, said control chip comprising a plurality of outputs;
the output end of the remote control receiving head is respectively connected with the input end of the control chip, and one output end of the control chip is correspondingly connected with the input end of one test module.
4. The multi-motherboard test circuit as recited in claim 3, wherein said control module further comprises a plurality of first resistors, and each input terminal of said control chip is connected to an output terminal of said remote control receiving head through a respective one of said first resistors.
5. The multi-motherboard test circuit as claimed in claim 4, wherein the control module further comprises a plurality of compensation units, the number of the compensation units is the same as the number of the test modules, the input terminals of the compensation units are connected to the power supply, and one output terminal of the control chip is correspondingly connected to the output terminal of one compensation unit;
and the compensation unit is used for compensating the power supply of the test module.
6. The multi-motherboard test circuit of claim 5, wherein said compensation unit comprises a second resistor,
the first end of the second resistor is connected with a power supply, and the second end of the second resistor is connected with one output end of the control chip.
7. The multi-motherboard test circuit as claimed in claim 1, further comprising a plurality of indication modules, wherein the number of the indication modules is the same as the number of the test modules, and the control terminal of one indication module is correspondingly connected to the motherboard status terminal of one test module;
the indication module is used for receiving the mainboard state signal sent by the test module and indicating according to the mainboard state signal;
the test module is also used for detecting the state of the mainboard and sending a corresponding mainboard state signal to the indication module according to the state of the mainboard.
8. The multi-motherboard test circuit as recited in claim 7 wherein said indication module comprises a transistor, a third resistor, a fourth resistor, and a light emitting diode,
the base electrode of the triode is connected with the mainboard state end of the test module through the third resistor, the emitting electrode of the triode is grounded, the collecting electrode of the triode is connected with the negative electrode of the light-emitting diode, the positive electrode of the light-emitting diode is connected with the base electrode of the triode through the fourth resistor, and the positive electrode of the light-emitting diode is also connected with the power supply.
9. The multi-motherboard test circuit as recited in claim 8 wherein said light emitting diode is a bi-color light emitting diode.
10. A multi-motherboard test apparatus, comprising a multi-motherboard test circuit as claimed in any one of claims 1 to 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202022219679.7U CN213181906U (en) | 2020-09-30 | 2020-09-30 | Multi-mainboard test circuit and device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202022219679.7U CN213181906U (en) | 2020-09-30 | 2020-09-30 | Multi-mainboard test circuit and device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN213181906U true CN213181906U (en) | 2021-05-11 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202022219679.7U Active CN213181906U (en) | 2020-09-30 | 2020-09-30 | Multi-mainboard test circuit and device |
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| Country | Link |
|---|---|
| CN (1) | CN213181906U (en) |
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- 2020-09-30 CN CN202022219679.7U patent/CN213181906U/en active Active
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