CN213126008U - Ring oscillator - Google Patents
Ring oscillator Download PDFInfo
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- CN213126008U CN213126008U CN202021623149.2U CN202021623149U CN213126008U CN 213126008 U CN213126008 U CN 213126008U CN 202021623149 U CN202021623149 U CN 202021623149U CN 213126008 U CN213126008 U CN 213126008U
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Abstract
The utility model provides a ring oscillator, which comprises a current source circuit, an amplifying circuit, a frequency trimming device and a ring oscillator circuit formed by connecting phase inverters; the output end of the current source circuit is connected with the input end of the amplifying circuit; the adjusting end of the amplifying circuit is connected with the frequency trimming device in series and then grounded, and meanwhile, the output end of the amplifying circuit is connected with the input end of the ring oscillator circuit. The utility model provides an annular oscillator can be through trimming with frequency calibration to accurate value, calibrates the frequency drift that the ambient temperature change arouses simultaneously.
Description
Technical Field
The utility model belongs to the technical field of the integrated circuit technique and specifically relates to a ring oscillator is related to.
Background
A ring oscillator is one of the most common circuit blocks in an integrated circuit. The microcontroller chip has the advantages of simple structure, easy integration, low cost and the like, and is widely applied to the microcontroller chip.
The traditional ring oscillator circuit is formed by cascading an odd number of inverters end to end. The circuit structure of the conventional ring oscillator is simple, but the disadvantages thereof are also obvious. Because the oscillation frequency of the conventional ring oscillator is related to the on-resistance, parasitic capacitance and power supply voltage of the mosfet, and these variables are greatly influenced by the ambient temperature, the power supply voltage and the process parameters, the oscillation frequency generally has the disadvantages of low accuracy and large drift along with the temperature. Because of the above disadvantages of conventional ring oscillators, off-chip crystal oscillators have to be used instead in some situations where a high precision clock is required.
SUMMERY OF THE UTILITY MODEL
To the technical problem, the utility model provides an annular oscillator can be through trimming with frequency calibration to accurate value, the frequency drift that the change of calibration ambient temperature arouses simultaneously. The technical scheme is as follows:
the embodiment of the utility model provides an annular oscillator, which comprises a current source circuit, an amplifying circuit, a frequency trimming device and an annular oscillator circuit formed by connecting phase inverters;
the output end of the current source circuit is connected with the input end of the amplifying circuit;
the adjusting end of the amplifying circuit is connected with the frequency trimming device in series and then grounded, and meanwhile, the output end of the amplifying circuit is connected with the input end of the ring oscillator circuit.
Preferably, the current source circuit comprises a bias current source and a current mirror; the bias current source is connected with the current mirror and provides bias current.
Preferably, the amplifying circuit includes at least a first follower circuit for stabilizing a voltage of the frequency trimming device, and a second follower circuit for stabilizing an input voltage of the ring oscillator circuit.
As a preferred scheme, the current mirror comprises a first P-type MOS transistor, a second P-type MOS transistor, a third P-type MOS transistor, and a fourth P-type MOS transistor;
the source electrodes of the first P-type MOS tube, the second P-type MOS tube, the third P-type MOS tube and the fourth P-type MOS tube are all connected with a power supply;
the grids of the first P-type MOS tube, the second P-type MOS tube, the third P-type MOS tube and the fourth P-type MOS tube are all connected with the anode of the bias current source;
the drain electrode of the first P-type MOS tube is connected with the anode of the bias current source;
the drain electrodes of the second P-type MOS tube, the third P-type MOS tube and the fourth P-type MOS tube are connected to the input end of the amplifying circuit.
Preferably, the amplifying circuit comprises a first N-type MOS transistor, a second N-type MOS transistor, and a third N-type MOS transistor;
the grid electrode of the first N-type MOS tube, the drain electrode of the first N-type MOS tube, the grid electrode of the second N-type MOS tube and the drain electrode of the second P-type MOS tube are connected in parallel;
the drain electrode of the second N-type MOS tube, the grid electrode of the third N-type MOS tube and the drain electrode of the third P-type MOS tube are connected in parallel;
and the drain electrode of the fourth P-type MOS tube is connected with the drain electrode of the third N-type MOS tube.
As a preferred scheme, the output terminal of the amplifying circuit is connected to the input terminal of the ring oscillator circuit, and specifically includes:
the ring oscillator circuit is formed by connecting odd inverters end to end;
and the input end of the ring oscillator circuit is connected with the source electrode of the first N-type MOS tube and the source electrode of the third N-type MOS tube in parallel.
Preferably, the ring oscillator further comprises an output buffer; the input end of the output buffer is connected with the output end of the ring oscillator circuit.
Preferably, the frequency trimming device is a low temperature coefficient resistor.
Preferably, the frequency trimming device is formed by combining a positive temperature coefficient resistor and a negative temperature coefficient resistor.
Preferably, the frequency trimming device is a field effect transistor.
Compared with the prior art, the embodiment of the utility model provides a have following beneficial effect:
the utility model provides an annular oscillator, including current source circuit, amplifier circuit, frequency trimming ware and the annular oscillator circuit that forms by the phase inverter connection. The output end of the current source circuit is connected with the input end of the amplifying circuit; the current source circuit only provides current bias, the oscillation frequency cannot be influenced, the adjusting end of the amplifying circuit is connected with the frequency trimming device in series and then grounded, and meanwhile, the output end of the amplifying circuit is connected with the input end of the ring oscillator circuit, so that even if the oscillation frequency is related to the capacitance, in the ring oscillator, because the temperature coefficient of the capacitance is small, only the frequency trimming device needs to be trimmed, a high-precision clock with low temperature drift can be generated, the ring oscillator can calibrate the frequency to an accurate value, and meanwhile, the frequency drift caused by the change of the ambient temperature is calibrated.
Drawings
Fig. 1 is a circuit diagram of a ring oscillator according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.
The utility model provides an exemplary embodiment, a ring oscillator, which comprises a current source circuit, an amplifying circuit, a frequency trimming device and a ring oscillator circuit formed by connecting phase inverters;
the output end of the current source circuit is connected with the input end of the amplifying circuit; it will be appreciated that the current source circuit also provides a bias current to the amplification circuit.
The adjusting end of the amplifying circuit is connected with the frequency trimming device in series and then grounded, and meanwhile, the output end of the amplifying circuit is connected with the input end of the ring oscillator circuit.
In a first preferred embodiment, the frequency modifier is a low temperature coefficient resistor.
In a second preferred embodiment, the frequency trimming device is formed by combining a positive temperature coefficient resistor and a negative temperature coefficient resistor.
In a third preferred embodiment of the present invention, the frequency modifier is a fet.
The utility model provides a concrete implementation mode, the current source circuit comprises a bias current source and a current mirror; the bias current source is connected with the current mirror and provides bias current.
Specifically, the current mirror comprises a first P-type MOS tube, a second P-type MOS tube, a third P-type MOS tube and a fourth P-type MOS tube;
the source electrodes of the first P-type MOS tube, the second P-type MOS tube, the third P-type MOS tube and the fourth P-type MOS tube are all connected with a power supply; it is understood that the power supply herein refers to a positive voltage power supply VCC.
The grids of the first P-type MOS tube, the second P-type MOS tube, the third P-type MOS tube and the fourth P-type MOS tube are all connected with the anode of the bias current source;
the drain electrode of the first P-type MOS tube is connected with the anode of the bias current source;
the drain electrodes of the second P-type MOS tube, the third P-type MOS tube and the fourth P-type MOS tube are connected to the input end of the amplifying circuit.
The utility model provides a two kinds of concrete implementation modes, amplifier circuit is including being used for stabilizing at least the first follower circuit of the voltage of frequency trimming ware, and be used for stabilizing the second follower circuit of the input voltage of ring oscillator circuit.
Specifically, the amplifying circuit comprises a first N-type MOS tube, a second N-type MOS tube and a third N-type MOS tube;
the grid electrode of the first N-type MOS tube, the drain electrode of the first N-type MOS tube and the grid electrode of the second N-type MOS tube are connected in parallel;
the drain electrode of the second N-type MOS tube is connected with the grid electrode of the third N-type MOS tube in parallel;
and the source electrode of the second N-type MOS tube is connected with the frequency trimming device in series.
It can be understood that the sources of the first N-type MOS transistor and the third N-type MOS transistor are output ends of the amplifying circuit.
Correspondingly, the drains of the second P-type MOS transistor, the third P-type MOS transistor and the fourth P-type MOS transistor are connected to the input terminal of the amplifying circuit, specifically:
the drain electrode of the second P-type MOS tube is connected with the grid electrode of the first N-type MOS tube, the drain electrode of the first N-type MOS tube and the grid electrode of the second N-type MOS tube in parallel;
the drain electrode of the third P-type MOS tube is connected with the drain electrode of the second N-type MOS tube and the grid electrode of the third N-type MOS tube in parallel;
and the drain electrode of the fourth P-type MOS tube is connected with the drain electrode of the third N-type MOS tube.
The utility model provides three kinds of concrete implementation, amplifier circuit's output is connected ring oscillator circuit's input specifically is:
the ring oscillator circuit is formed by connecting odd inverters end to end;
and the input end of the ring oscillator circuit is connected with the source electrode of the first N-type MOS tube and the source electrode of the third N-type MOS tube in parallel.
The utility model also provides a preferred embodiment, the ring oscillator also comprises an output buffer; the input end of the output buffer is connected with the output end of the ring oscillator circuit.
The output buffer and the gate circuit of the buffer are added, and the anti-interference performance is improved by 10% of power supply voltage. In addition, the gate circuit with the buffer has the advantages of symmetrical output waveform, large alternating voltage gain, narrow bandwidth, small input capacitance and the like.
It should be noted that the bias current source only provides a current bias, and does not affect the oscillation frequency; therefore, the requirement for the precision and the temperature characteristic of the bias current source is not high, and the bias current source can be a positive temperature coefficient current, a negative temperature coefficient current or a zero temperature coefficient current.
Referring to fig. 1, the present invention provides an embodiment of a ring oscillator, which includes four P-type MOS transistors, three N-type MOS transistors, a resistor, an output buffer, and odd number of inverters; the odd inverters are connected end to form an oscillation ring to form a ring oscillator circuit.
The source electrodes of the first P-type MOS tube, the second P-type MOS tube, the third P-type MOS tube and the fourth P-type MOS tube are connected with a power supply VCC; the grid electrodes of the first P-type MOS tube, the second P-type MOS tube, the third P-type MOS tube and the fourth P-type MOS tube are connected with the drain electrode of the first P-type MOS tube and the anode of a bias current source I1 to form a current source circuit;
the amplifying circuit comprises three N-type MOS tubes; the grid electrode of the first N-type MOS tube, the drain electrode of the first N-type MOS tube, the grid electrode of the second N-type MOS tube and the drain electrode of the second P-type MOS tube are connected; the drain electrode of the second N-type MOS tube, the drain electrode of the third P-type MOS tube and the grid electrode of the third N-type MOS tube are connected; the drain electrode of the fourth P-type MOS tube is connected with the drain electrode of the third N-type MOS tube; the source electrode of the second N-type MOS tube is connected with the positive end of the first resistor;
the odd inverters are connected end to form a ring oscillator circuit, a power supply of the ring oscillator circuit is connected with a source electrode of the first N-type MOS tube and a source electrode of the third N-type MOS tube, and the ring oscillator circuit further comprises odd load capacitors corresponding to the inverters.
The cathode of the bias current source I1, the first resistor, the ground of the odd-numbered end-to-end inverters, the grounding end of the output buffer and the negative ends of the odd-numbered load capacitors are all connected to the ground GND; the positive ends of the odd load capacitors are respectively connected with the output of each stage of inverter; the power end of the output buffer is connected with a power supply VCC, and the input of the output buffer is connected with the outputs of odd end-to-end direction devices.
In the embodiment, the circuit design is simple and the number of electronic devices is small, so that the ring oscillator circuit is simple and practical in overall structure, easy to build and cost-saving.
Further, the output clock frequency of the scheme is analyzed as follows:
the currents of the second P-type MOS tube, the third P-type MOS tube and the fourth P-type MOS tube are all mirrored from the current of the first P-type MOS tube. Assuming that the current proportional relationship between the currents of the second P-type MOS tube, the third P-type MOS tube and the fourth P-type MOS tube and the current proportional relationship between the currents of the first P-type MOS tube are as follows:
wherein WP1、WP2、WP3、WP4The width of a channel of each of the first P-type MOS tube, the second P-type MOS tube, the third P-type MOS tube and the fourth P-type MOS tube is respectively greater than the width of the channel of the first P-type MOS tube; l isP1、LP2、LP3、LP4The channel lengths of the first P-type MOS tube, the second P-type MOS tube, the third P-type MOS tube and the fourth P-type MOS tube are respectively.
Since the current of the first P-type MOS transistor is equal to the bias current source I1, the current values of the second P-type MOS transistor, the third P-type MOS transistor and the fourth P-type MOS transistor are respectively K4*I1、K3*I1、K2*I1。
The expression of the drain current of the MOS tube working in the saturation region is as follows:
therefore, the first and second electrodes are formed on the substrate,
wherein, IDIs drain current, μ is carrier mobility, CoxIs the unit capacitance of the gate oxide layer,
is the width-to-length ratio of MOS tube, VGSIs a gate-source voltage, VTHIs the threshold voltage.
Therefore, the gate-source voltages of the first N-type MOS transistor, the second N-type MOS transistor, and the third N-type MOS transistor are respectively:
the width-to-length ratios of the first N-type MOS tube, the second N-type MOS tube and the third N-type MOS tube are ensured to meet the following proportion:
it is possible to obtain:
VGSN1＝VCSN2＝VGSN3
namely, the gate-source voltages of the first N-type MOS tube, the second N-type MOS tube and the third N-type MOS tube are equal. Since the gate of the first N-type MOS transistor and the gate of the second N-type MOS transistor are connected together, the source voltage of the first N-type MOS transistor and the source voltage of the second N-type MOS transistor are equal, that is, the positive terminal voltage of the first resistor R1 and the power supply voltage VDD of the oscillation ring are equal.
Therefore, in a preferred embodiment of the present invention, the ratio of the width-to-length ratio of the first N-type MOS transistor, the second N-type MOS transistor, and the third N-type MOS transistor is equal to the ratio of the width-to-length ratio of the second P-type MOS transistor, the third P-type MOS transistor, and the fourth P-type MOS transistor.
Since the power consumed by the device can be expressed as:
where P is the power, V is the voltage across the device, I is the current flowing through the device, and R is the device resistance.
Therefore, the first and second electrodes are formed on the substrate,
the power dissipated by the first resistor R1 is:
and the power consumed by the oscillation ring is:
PRING＝VDD(K2+K4)I1＝CVDD 2f
wherein, PR1Is the power consumption, P, of the resistor R1RINGIs the power consumption of the oscillating ring, VDDIs the power supply voltage of the oscillation ring, C is the load capacitance of the inverter at each stage of the oscillation ring, R is the resistance of the resistor R1, and f is the oscillation frequency.
According to the above PR1And PRINGThe expression of (c) may be:
wherein, K2、K3、K4Is a constant in design.
From the expression of the clock oscillation frequency, the clock frequency is independent of the power supply voltage, independent of the MOS tube process parameters, and only dependent on the resistor R1 and the load capacitor C of each stage of the inverter loop. The oscillation frequency is related to the process deviation of the resistor and the capacitor at normal temperature, and the oscillation frequency can be adjusted to an accurate frequency value through the adjusting resistor R1. Because the temperature coefficient of the capacitor is very small, the resistor R1 can use low temperature drift resistance or use different temperature coefficient resistor combination, so the scheme can generate the accurate oscillation frequency with very low temperature coefficient.
The foregoing is a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, a plurality of improvements and decorations can be made without departing from the principle of the present invention, and these improvements and decorations are also considered as the protection scope of the present invention.
Claims (10)
1. A ring oscillator is characterized by comprising a current source circuit, an amplifying circuit, a frequency trimming device and a ring oscillator circuit formed by connecting phase inverters;
the output end of the current source circuit is connected with the input end of the amplifying circuit;
the adjusting end of the amplifying circuit is connected with the frequency trimming device in series and then grounded, and meanwhile, the output end of the amplifying circuit is connected with the input end of the ring oscillator circuit.
2. The ring oscillator of claim 1, wherein the current source circuit comprises a bias current source and a current mirror; the bias current source is connected with the current mirror and provides bias current.
3. The ring oscillator of claim 1, wherein the amplification circuit comprises at least a first follower circuit for stabilizing a voltage of the frequency trimmer and a second follower circuit for stabilizing an input voltage of the ring oscillator circuit.
4. The ring oscillator of claim 2, wherein the current mirror comprises a first P-type MOS transistor, a second P-type MOS transistor, a third P-type MOS transistor, a fourth P-type MOS transistor;
the source electrodes of the first P-type MOS tube, the second P-type MOS tube, the third P-type MOS tube and the fourth P-type MOS tube are all connected with a power supply;
the grids of the first P-type MOS tube, the second P-type MOS tube, the third P-type MOS tube and the fourth P-type MOS tube are all connected with the anode of the bias current source;
the drain electrode of the first P-type MOS tube is connected with the anode of the bias current source;
the drain electrodes of the second P-type MOS tube, the third P-type MOS tube and the fourth P-type MOS tube are connected to the input end of the amplifying circuit.
5. The ring oscillator of claim 4, wherein the amplification circuit comprises a first N-type MOS transistor, a second N-type MOS transistor, a third N-type MOS transistor;
the grid electrode of the first N-type MOS tube, the drain electrode of the first N-type MOS tube, the grid electrode of the second N-type MOS tube and the drain electrode of the second P-type MOS tube are connected in parallel;
the drain electrode of the second N-type MOS tube, the grid electrode of the third N-type MOS tube and the drain electrode of the third P-type MOS tube are connected in parallel;
and the drain electrode of the fourth P-type MOS tube is connected with the drain electrode of the third N-type MOS tube.
6. The ring oscillator of claim 5, wherein the output of the amplification circuit is connected to the input of the ring oscillator circuit, and specifically:
the ring oscillator circuit is formed by connecting odd inverters end to end;
and the input end of the ring oscillator circuit is connected with the source electrode of the first N-type MOS tube and the source electrode of the third N-type MOS tube in parallel.
7. The ring oscillator of claim 1, further comprising an output buffer; the input end of the output buffer is connected with the output end of the ring oscillator circuit.
8. The ring oscillator of any of claims 1 to 7 wherein the frequency trimmer is a low temperature coefficient of resistance.
9. The ring oscillator of any of claims 1 to 7 wherein the frequency trimmer is a combination of a positive temperature coefficient resistor and a negative temperature coefficient resistor.
10. The ring oscillator of any of claims 1 to 7, wherein the frequency trimmer is a field effect transistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202021623149.2U CN213126008U (en) | 2020-08-06 | 2020-08-06 | Ring oscillator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202021623149.2U CN213126008U (en) | 2020-08-06 | 2020-08-06 | Ring oscillator |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN213126008U true CN213126008U (en) | 2021-05-04 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202021623149.2U Active CN213126008U (en) | 2020-08-06 | 2020-08-06 | Ring oscillator |
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|---|---|
| CN (1) | CN213126008U (en) |
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2020
- 2020-08-06 CN CN202021623149.2U patent/CN213126008U/en active Active
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