CN213042170U - Low dropout linear voltage stabilizing circuit for realizing current-limiting protection - Google Patents
Low dropout linear voltage stabilizing circuit for realizing current-limiting protection Download PDFInfo
- Publication number
- CN213042170U CN213042170U CN202022225783.7U CN202022225783U CN213042170U CN 213042170 U CN213042170 U CN 213042170U CN 202022225783 U CN202022225783 U CN 202022225783U CN 213042170 U CN213042170 U CN 213042170U
- Authority
- CN
- China
- Prior art keywords
- transistor
- current
- operational amplifier
- unit
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn - After Issue
Links
Images
Landscapes
- Continuous-Control Power Sources That Use Transistors (AREA)
Abstract
The utility model discloses a low-dropout linear voltage stabilizing circuit for realizing current-limiting protection, which comprises an operational amplifier unit, a current-limiting modulation current unit and a low-voltage modulation current unit, the input end of the operational amplifier unit is connected with a reference voltage Vref, the output end of the operational amplifier unit is connected with a current-limiting modulation current unit, the current-limiting modulation current unit comprises a triode Q, a transistor PM1, a transistor PM2, a transistor NM1 and a transistor NM2, the base electrode of the triode Q is connected with the output end of the operational amplifier unit, the collector electrode of the triode Q is used as the input end of a bias current I1, the emitter electrode of the triode Q is connected with a transistor NM1, a transistor NM1 and a transistor NM2 jointly form a current mirror circuit, and both are connected to a low voltage modulation current unit comprising an OTA circuit, the operating region of transistor PM1, which is a high voltage tube, is driven at different voltages by the OTA circuit. The utility model discloses a current-limiting protection to low dropout linear voltage regulator circuit under different input voltage is used.
Description
Technical Field
The utility model relates to a voltage stabilizing circuit specifically is a realize current-limiting protection's linear voltage stabilizing circuit of low dropout.
Background
The low dropout regulator is a new generation of integrated circuit regulator, and the biggest difference between the low dropout regulator and a three-terminal regulator is that the low dropout regulator is a micro system on a chip with low self-consumption. The low-dropout linear regulator can be used for controlling a current main channel and has the functions of overcurrent protection, overtemperature protection, a precision reference source, a differential amplifier, a delayer and the like.
The current low dropout linear regulator in the market can not realize the current limiting protection of the regulator, so that the regulator can not obtain corresponding protection under different input voltages.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide a realize current-limiting protection's low dropout linear voltage regulator circuit to be applicable to the current-limiting protection effect of low dropout linear voltage regulator circuit under different input voltage.
The utility model adopts the technical proposal that: a low dropout linear voltage regulator circuit for realizing current-limiting protection comprises an operational amplifier unit, a current-limiting modulation current unit and a low-voltage modulation current unit, the input end of the operational amplifier unit is connected with a reference voltage Vref, the output end of the operational amplifier unit is connected with a current-limiting modulation current unit, the current-limiting modulation current unit includes a transistor Q, a transistor PM1, a transistor PM2, a transistor NM1, a transistor NM2, the base electrode of the triode Q is connected with the output end of the operational amplifier unit, the collector electrode of the triode Q is used as the input end of the bias current I1, the emitter electrode of the triode Q is connected with the transistor NM1, the transistor NM1 and the transistor NM2 together form a current mirror circuit, the transistor PM1 and the transistor PM2 are connected in series, and both are connected to a low voltage modulation current unit comprising an OTA circuit, the operating region of transistor PM1, which is a high voltage tube, is driven at different voltages by the OTA circuit.
Further, the operational amplifier unit comprises an operational amplifier U1, wherein a non-inverting input end of the operational amplifier U1 is connected with a reference voltage Vref, an inverting input end of the operational amplifier U1 is grounded through a resistor R4, an output end of the operational amplifier U is connected with a base electrode of the triode Q, and meanwhile, the output end of the operational amplifier U1 is connected with the inverting input end through a capacitor C1 and a resistor R2 which are connected in series.
Further, the gates of the transistor NM1 and the transistor NM2 are connected to each other, the sources of the transistor NM1 and the transistor NM2 are connected to each other, while the drain of the transistor NM1 is connected to the gate thereof and to the emitter of the transistor Q via the resistor R1, the drain of the transistor NM2 is connected to the drain of the transistor PM1, and the source of the transistor PM1 is connected to the drain of the transistor PM 2.
Further, the low-voltage modulation current unit comprises an operational amplifier U2 and a transistor PM3, wherein a non-inverting input terminal of the operational amplifier U2 is connected with a power supply VDD and a drain of the transistor PM3 and is connected to an inverting input terminal of the operational amplifier U1 through a resistor R3, an inverting input terminal of the operational amplifier U2 is connected with a source of the transistor PM1 and a drain of the transistor PM2, an output terminal of the operational amplifier U2 is connected with a gate of the transistor PM1, a gate of the transistor PM3 is connected with a gate of the transistor PM2, a source of the transistor PM3 is connected with a source of the transistor PM2, and a source of the transistor PM3 and a source of the transistor PM2 are simultaneously connected to an output terminal of the operational amplifier U2 through a capacitor.
Further, the triode Q is an NPN type triode.
The utility model has the advantages that: the utility model discloses a to the current-limiting protection effect of low dropout linear voltage regulator circuit under different input voltage, improved the stability and the reliability of whole power regulator.
Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
Drawings
FIG. 1 is a circuit diagram of a current limiting protected low dropout linear voltage regulator circuit.
Fig. 2 is a circuit diagram of a current-limited modulated current unit.
Fig. 3 is a circuit diagram of a low voltage modulated current unit.
Fig. 4 is a voltage variation operation diagram.
Detailed Description
The present invention will be described in detail below with reference to the accompanying drawings and specific embodiments.
As shown in fig. 1 to 3, a low dropout linear voltage regulator circuit for implementing current-limiting protection includes an operational amplifier unit, a current-limiting modulation current unit and a low-voltage modulation current unit, the input end of the operational amplifier unit is connected with a reference voltage Vref, the output end of the operational amplifier unit is connected with a current-limiting modulation current unit, the current-limiting modulation current unit includes a transistor Q, a transistor PM1, a transistor PM2, a transistor NM1, a transistor NM2, the base electrode of the triode Q is connected with the output end of the operational amplifier unit, the collector electrode of the triode Q is used as the input end of the bias current I1, the emitter electrode of the triode Q is connected with the transistor NM1, the transistor NM1 and the transistor NM2 together form a current mirror circuit, the transistor PM1 and the transistor PM2 are connected in series, and both are connected to a low voltage modulation current unit comprising an OTA circuit, the operating region of transistor PM1, which is a high voltage tube, is driven at different voltages by the OTA circuit.
In this embodiment, the operational amplifier unit includes an operational amplifier U1, a non-inverting input terminal of the operational amplifier U1 is connected to a reference voltage Vref, an inverting input terminal is grounded through a resistor R4, an output terminal is connected to a base of a transistor Q, and an output terminal is connected to the inverting input terminal through a capacitor C1 and a resistor R2 connected in series. The gates of the transistors NM1 and NM2 are connected to each other, the sources of the transistors NM1 and NM2 are connected to each other, while the drain of the transistor NM1 is connected to the gate thereof and to the emitter of the transistor Q via a resistor R1, the drain of the transistor NM2 is connected to the drain of the transistor PM1, and the source of the transistor PM1 is connected to the drain of the transistor PM 2.
In this embodiment, the low-voltage modulation current unit includes an operational amplifier U2 and a transistor PM3, a non-inverting input terminal of the operational amplifier U2 is connected to a power supply VDD and a drain of the transistor PM3 and is connected to an inverting input terminal of the operational amplifier U1 through a resistor R3, an inverting input terminal of the operational amplifier U2 is connected to a source of the transistor PM1 and a drain of the transistor PM2, an output terminal of the operational amplifier U2 is connected to a gate of the transistor PM1, a gate of the transistor PM3 is connected to a gate of the transistor PM2, a source of the transistor PM3 is connected to a source of the transistor PM2, and a source of the transistor PM3 and a source of the transistor PM2 are simultaneously connected to an output terminal of the operational amplifier U2 through.
In summary, the reference voltage generating circuit provides the reference voltage Vref for the positive terminal of the operational amplifier circuit, and the negative terminal of the operational amplifier circuit is the feedback voltage. The bias current generating circuit provides a bias current I1 for the circuit, and the resistor R1 is used as loop gain adjustment. The reference voltage Vref compensates the loop stability through a resistor R2 and a capacitor C1 (Miller compensation) by an operational amplifier circuit, the output voltage can be adjusted by adjusting the voltage division of resistors R3 and R4, the voltage at the A point (the voltage at the drain end of the high voltage pipe PM 2) and the voltage at the VDD point (the voltage at the drain end of the power pipe PM 3) drive the working area of the high voltage pipe PM1 under different voltage conditions through an OTA (operational Transmission Amplifier) circuit, and the gate capacitor C2 is stabilized as a compensation loop at an OTA circuit module. Under the condition that the circuit works under an external voltage load, current amplification is carried out through a current mirror formed by NM1 and NM2, namely the current of the high-voltage pipe PM2 is limited by the current mirror of the high-voltage pipe PM2 and the power pipe PM3 through the external load.
The utility model discloses utilize the characteristic of electric current-limiting, bias current is through self requirement, can adjust input current through adjusting the electric current, and the electric current that the assumed standard passes through resistance R1 is I1, and bias current carries out the current replication through the current mirror that NM1 and NM2 constitute, and the electric current through NM2 is bias current I1's proportion, and the electric current is restricted by the bias current to the effect of current-limiting protection has been reached.
As shown in fig. 4, when the circuit operates at the scan voltage, with point X as a boundary, when the operating voltage is before point X, the power tube PM3 operates in the saturation region, the voltage at point a (the source terminal voltage of PM 1) through the OTA circuit is higher than the voltage at point VDD (the drain terminal voltage of PM 3) of the OTA circuit, and the voltage driving point B, that is, the high voltage tube PM1 operates in the linear region, and the high voltage tube PM2 and the power tube PM3 constitute a proportional current mirror. The working voltage of the circuit is reduced, after the working voltage is at the point X, the power tube PM3 works in a linear region, the OTA circuit keeps the voltage at the point A (the source end voltage of PM 1) and the VDD voltage of the OTA circuit (the drain end voltage of PM 3) the same, the voltage at the point B is driven, namely the high-voltage tube PM1 works in a saturation region, and at the moment, the high-voltage tube PM1 works in the saturation region and is used for maintaining the current mirror proportion formed by the high-voltage tube PM2 and the power tube PM 3. The loop adjustment enables the power tube PM3 to provide an external current load, and meanwhile the maximum current of the PM3 is limited to a fixed multiple of I1 to achieve current limiting protection.
The foregoing illustrates and describes the principles, general features, and advantages of the present invention. It should be understood by those skilled in the art that the above embodiments do not limit the scope of the present invention in any way, and all technical solutions obtained by using equivalent substitution modes and the like fall within the scope of the present invention.
The utility model discloses the part that does not relate to all is the same with prior art or can adopt prior art to realize.
Claims (5)
1. A low dropout linear voltage regulator circuit for realizing current-limiting protection is characterized by comprising an operational amplifier unit, a current-limiting modulation current unit and a low-voltage modulation current unit, the input end of the operational amplifier unit is connected with a reference voltage Vref, the output end of the operational amplifier unit is connected with a current-limiting modulation current unit, the current-limiting modulation current unit includes a transistor Q, a transistor PM1, a transistor PM2, a transistor NM1, a transistor NM2, the base electrode of the triode Q is connected with the output end of the operational amplifier unit, the collector electrode of the triode Q is used as the input end of the bias current I1, the emitter electrode of the triode Q is connected with the transistor NM1, the transistor NM1 and the transistor NM2 together form a current mirror circuit, the transistor PM1 and the transistor PM2 are connected in series, and both are connected to a low voltage modulation current unit comprising an OTA circuit, the operating region of transistor PM1, which is a high voltage tube, is driven at different voltages by the OTA circuit.
2. The low dropout linear voltage regulator circuit with current-limiting protection as claimed in claim 1, wherein said operational amplifier unit comprises an operational amplifier U1, a non-inverting input terminal of said operational amplifier U1 is connected to a reference voltage Vref, an inverting input terminal is connected to ground through a resistor R4, an output terminal is connected to a base of a transistor Q, and the output terminal is connected to the inverting input terminal through a capacitor C1 and a resistor R2 connected in series.
3. The low dropout linear voltage regulator circuit for realizing current limiting protection of claim 1, wherein the gates of said transistor NM1 and NM2 are connected to each other, the sources of said transistor NM1 and NM2 are connected to each other, while the drain of said transistor NM1 is connected to its gate and to the emitter of said transistor Q via a resistor R1, the drain of said transistor NM2 is connected to the drain of a transistor PM1, and the source of said transistor PM1 is connected to the drain of a transistor PM 2.
4. The low dropout linear voltage regulator circuit for realizing current-limiting protection of claim 1 or 3, wherein said low voltage modulation current unit comprises an operational amplifier U2 and a transistor PM3, a non-inverting input terminal of said operational amplifier U2 is connected to a power supply VDD and a drain of a transistor PM3 and is connected to an inverting input terminal of an operational amplifier U1 through a resistor R3, an inverting input terminal of an operational amplifier U2 is connected to a source of a transistor PM1 and a drain of a transistor PM2, an output terminal of an operational amplifier U2 is connected to a gate of a transistor PM1, a gate of a transistor PM3 is connected to a gate of a transistor PM2, a source of a transistor PM3 is connected to a source of a transistor PM2, and a source of a transistor PM3 and a source of a transistor PM2 are simultaneously connected to an output terminal of an operational amplifier U2 through a capacitor C2.
5. The low dropout linear voltage regulator circuit of claim 1, wherein said transistor Q is an NPN transistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202022225783.7U CN213042170U (en) | 2020-10-09 | 2020-10-09 | Low dropout linear voltage stabilizing circuit for realizing current-limiting protection |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202022225783.7U CN213042170U (en) | 2020-10-09 | 2020-10-09 | Low dropout linear voltage stabilizing circuit for realizing current-limiting protection |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN213042170U true CN213042170U (en) | 2021-04-23 |
Family
ID=75536074
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202022225783.7U Withdrawn - After Issue CN213042170U (en) | 2020-10-09 | 2020-10-09 | Low dropout linear voltage stabilizing circuit for realizing current-limiting protection |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN213042170U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116774766A (en) * | 2023-07-26 | 2023-09-19 | 北京中科格励微科技有限公司 | High-voltage output linear voltage stabilizer circuit with current limiting protection function |
-
2020
- 2020-10-09 CN CN202022225783.7U patent/CN213042170U/en not_active Withdrawn - After Issue
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116774766A (en) * | 2023-07-26 | 2023-09-19 | 北京中科格励微科技有限公司 | High-voltage output linear voltage stabilizer circuit with current limiting protection function |
| CN116774766B (en) * | 2023-07-26 | 2024-03-26 | 北京中科格励微科技有限公司 | High-voltage output linear voltage stabilizer circuit with current limiting protection function |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN112269420A (en) | Low dropout linear voltage stabilizing circuit for realizing current-limiting protection | |
| US7402987B2 (en) | Low-dropout regulator with startup overshoot control | |
| CN108345556B (en) | Signal regulating circuit of electronic product control device | |
| CN1848019B (en) | Constant voltage power supply circuit and method of testing the same | |
| CN101308391B (en) | High precision low pressure difference linear voltage-stabilizing circuit | |
| JP2019135610A (en) | Overcurrent limiting circuit, overcurrent limiting method, and power supply circuit | |
| CN101739051A (en) | Dynamic resistance-capacitance compensating device for bipolar low-pressure difference linear voltage regulator | |
| CN111309089B (en) | Linear voltage-stabilized power supply | |
| CN213042170U (en) | Low dropout linear voltage stabilizing circuit for realizing current-limiting protection | |
| CN106444947A (en) | Compensating circuit for capacitor-less LDO | |
| CN203386099U (en) | Band-gap reference circuit and television set | |
| CN111552343B (en) | Low-voltage low-current bias current circuit | |
| US20230104737A1 (en) | Temperature compensation circuit of power amplifier and temperature compensation method | |
| CN109818257B (en) | CMOS (complementary Metal oxide semiconductor) process laser driving circuit | |
| CN110554728A (en) | Low dropout linear voltage stabilizing circuit | |
| CN217183181U (en) | Constant voltage power supply circuit | |
| CN114690833B (en) | Linear voltage stabilizer for realizing overcurrent protection and short-circuit protection functions | |
| JP5799826B2 (en) | Voltage regulator | |
| US6879608B1 (en) | High compliance laser driver | |
| CN210244187U (en) | Low dropout linear voltage stabilizing circuit | |
| CN113031694B (en) | Low-power-consumption low-dropout linear regulator and control circuit thereof | |
| CN216490407U (en) | Temperature protection circuit of radio frequency amplifier | |
| CN220586159U (en) | High-voltage pre-modulation circuit | |
| CN219143338U (en) | Linear voltage stabilizer and system on chip | |
| CN220290114U (en) | Constant current source circuit and battery protection board tester |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| AV01 | Patent right actively abandoned |
Granted publication date: 20210423 Effective date of abandoning: 20210918 |
|
| AV01 | Patent right actively abandoned |
Granted publication date: 20210423 Effective date of abandoning: 20210918 |
|
| AV01 | Patent right actively abandoned | ||
| AV01 | Patent right actively abandoned |