CN212935772U

CN212935772U - RS485 communication automatic receiving and dispatching improved circuit

Info

Publication number: CN212935772U
Application number: CN202022311353.7U
Authority: CN
Inventors: 杨杰; 段青华; 张建峰; 刘增强; 国新影
Original assignee: Hebei Hengyuan Water Technology Co ltd
Current assignee: Hebei Hengyuan Water Technology Co ltd
Priority date: 2020-10-16
Filing date: 2020-10-16
Publication date: 2021-04-09
Anticipated expiration: 2030-10-16

Abstract

The utility model belongs to the technical field of embedded 485 communication, a automatic receiving and dispatching improvement circuit of RS485 communication is provided, including the 485 chip, MCU's receiving pin RXDO is connected to the RO pin of 485 chip, and diode D5's negative pole is connected to the sending pin DXDO of MCU chip, and the DI pin of 485 chip and the input that the low level switched on the circuit are connected respectively to diode D5's positive pole, and the DE pin and the RE pin of charge-discharge circuit and 485 chip are connected respectively to the output that the low level switched on the circuit, the A pin and the B pin of 485 chip all with communications facilities's interface connection. The utility model relates to an automatic receiving and dispatching improvement circuit of RS485 communication can effectively improve the waveform duty cycle, improves communication quality, reduces the consumption of electric energy.

Description

RS485 communication automatic receiving and dispatching improved circuit

Technical Field

The utility model relates to an embedded 485 communication technology field, concretely relates to automatic receiving and dispatching of RS485 communication improves circuit.

Background

The embedded 485 communication circuit is a communication circuit commonly used in the process of equipment connection and use, long-distance transmission of about 1200 meters can be realized by 485 communication, and signal transmission is stable, so that the embedded 485 communication circuit is widely applied. Because 485 communication belongs to half-duplex communication, under the control action of the enabling pin, the communication can only be in a sending or receiving state at the same time.

At present, an existing embedded 485 communication circuit is designed as shown in fig. 1, a DI pin of a 485 chip is mainly grounded, and is connected with an NPN-type triode through an output terminal TXD pin of an MCU, and the NPN-type triode is used for performing level inversion to control the high and low levels of a DE pin or an RE pin to perform automatic conversion of signal receiving and transmitting, and the circuit design has two disadvantages: (1) the output end of the 485 chip needs to use a pull-up and pull-down circuit as an initial level, when a low level exists, the 485 chip can carry out push-pull output, and when a high level is output, the high level can only be reset through the pull-up and pull-down circuit, so that the 485 communication waveform generates pull-up waveform deformation after 38400 baud rate, and the deformation degree can also be changed due to different pull-up and pull-down resistors, which is not beneficial to long-distance stable transmission of data, as shown in fig. 2, when the baud rate is 115200 and the resistance value of the pull-up resistor and the pull-down resistor is 1K or 4.7K, the serious deformation of the pull-up level and the pull-down level can be clearly seen through the test waveform of an oscilloscope, the; (2) because the output terminal TXD pin of the MCU defaults to high level, the NPN tube is in a conducting state when not sending data, the consumption of electric energy is inevitably caused, and the effect of energy conservation is not achieved.

SUMMERY OF THE UTILITY MODEL

To the defect among the prior art, the utility model provides a pair of automatic receiving and dispatching of RS485 communication improves the circuit, can effectively improve the waveform duty cycle, improves communication quality, reduces the consumption of electric energy.

In order to solve the technical problem, the utility model provides a following technical scheme:

the utility model provides an automatic receiving and dispatching of RS485 communication improves circuit, includes the 485 chip, MCU's receiving pin RXDO is connected to the RO pin of 485 chip, and diode D5's negative pole is connected to MCU chip's sending pin DXDO, and diode D5's positive pole connects the DI pin of 485 chip respectively and the input that the circuit was switched on to the low level, and the output that the circuit was switched on to the low level connects the DE pin and the RE pin of charge-discharge circuit and 485 chip respectively, the A pin and the B pin of 485 chip all with communication equipment's interface connection.

Further, the low-level conduction circuit comprises a PNP type triode Q2, the base of the PNP type triode Q2 is connected with the anode of the diode D5 through the resistor R12, the emitter of the PNP type triode Q2 is connected with the anode of the diode D5 through the resistor R10, and the collector of the PNP type triode Q2 is connected with the charging and discharging loop and the DE pin and the RE pin of the 485 chip through the resistor R75.

Furthermore, the charge-discharge circuit comprises a capacitor C9 and a resistor R11, the capacitor C9 is connected with the resistor R11 in parallel, one end of the capacitor C9 and one end of the resistor R11 are respectively connected with the resistor R75, and the other end of the capacitor C9 and the other end of the resistor R11 are grounded.

Furthermore, the pin a of the 485 chip is connected with a pull-up resistor R21, the pull-up resistor R21 is connected with the cathode of the diode D10, the anode of the diode D10 is connected with the VCC terminal of the 485 chip and the capacitor C7, and the capacitor C7 is grounded.

Further, a resistor R30 is connected between the pin A and the pin B of the 485 chip.

Further, the pin A of the 485 chip is connected with the cathode of a diode D19, and the anode of a diode D19 is grounded; the pin B of the 485 chip is connected with the cathode of a diode D18, and the anode of a diode D18 is grounded.

According to the above technical scheme, the beneficial effects of the utility model are that: (1) under the condition that the DXDO of the MCU is defaulted to be high level, a diode D5 and a low level conducting circuit are arranged between the DXDO of the MCU and the DE pin and the RE pin of the 485 chip, when the output end of the MCU does not transmit data, the DXDO of the MCU and the DE pin and the RE pin of the 485 chip are in a cut-off state, and the phenomenon that continuous current exists between the DXDO of the MCU and the DE pin and the RE pin of the 485 chip to cause excessive energy consumption under the condition that the MCU does not transmit data is avoided; (2) the output end of the low-level conduction circuit is provided with a charge-discharge loop, the charge-discharge loop is simultaneously connected with a DE pin and an RE pin of the 485 chip, in the signal transmission process, when a sending pin DXDO of the MCU is in a low level, the diode D5 and the low-level conduction circuit are in a conduction state, the output end of the low-level conduction circuit is in a high level, the DE pin and the RE pin of the 485 chip are in a high level state, at the moment, the DI pin is in a sending state, and meanwhile, the charge-discharge loop charges; when the dxddo of the MCU is at a high level, the diode D5 and the low level conducting circuit are in a cut-off state, and the output terminal of the low level conducting circuit is at a low level, at this time, the charge and discharge circuit discharges, during the discharge of the charge and discharge circuit, the DE pin and the RE pin of the 485 chip are still kept at a high level, and the DI pin is still in a sending active state, so as to output a high level and push off the output, and the waveform duty cycle can be effectively improved, the communication quality is improved, and the power consumption is reduced.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the embodiments or the technical solutions in the prior art will be briefly described below. Throughout the drawings, like elements or portions are generally identified by like reference numerals. In the drawings, elements or portions are not necessarily drawn to scale.

FIG. 1 is a diagram of a conventional embedded 485 communication circuit;

FIG. 2 is a test waveform at a baud rate of 115200;

fig. 3 is a circuit diagram of the present invention;

fig. 4 is a test waveform diagram of the present invention.

Detailed Description

Embodiments of the present invention will be described in detail below with reference to the accompanying drawings. The following examples are only for illustrating the technical solutions of the present invention more clearly, and therefore are only examples, and the protection scope of the present invention is not limited thereby.

Referring to fig. 3-4, the RS485 communication automatic transceiving improved circuit provided in this embodiment includes a 485 chip, an RO pin of the 485 chip is connected to a receiving pin RXDO of an MCU, a sending pin DXDO of the MCU chip is connected to a cathode of a diode D5, an anode of a diode D5 is connected to a DI pin of the 485 chip and an input end of a low-level conduction circuit, an output end of the low-level conduction circuit is connected to a charge-discharge loop and a DE pin and an RE pin of the 485 chip, a pin a and a pin B of the 485 chip are both connected to an interface of a communication device, and the model STC3485EESA of the 485 chip is described.

In practical use, under the condition that the DXDO of the MCU defaults to a high level, the diode D5 and the low-level conducting circuit are arranged between the DXDO of the MCU and the DE pin and the RE pin of the 485 chip, and when the output end of the MCU does not transmit data, the DXDO of the MCU and the DE pin and the RE pin of the 485 chip are in a cut-off state, so that the phenomenon that continuous current exists between the DXDO of the MCU and the DE pin and the RE pin of the 485 chip to cause excessive energy consumption under the condition that the MCU does not transmit data is avoided; the output end of the low-level conduction circuit is provided with a charge-discharge loop, the charge-discharge loop is simultaneously connected with a DE pin and an RE pin of the 485 chip, in the signal transmission process, when a sending pin DXDO of the MCU is in a low level, the diode D5 and the low-level conduction circuit are in a conduction state, the output end of the low-level conduction circuit is in a high level, the DE pin and the RE pin of the 485 chip are in a high level state, at the moment, the DI pin is in a sending state, and meanwhile, the charge-discharge loop charges; when the dxddo of the MCU is at a high level, the diode D5 and the low level conducting circuit are in a cut-off state, and the output terminal of the low level conducting circuit is at a low level, at this time, the charge and discharge circuit discharges, during the discharge of the charge and discharge circuit, the DE pin and the RE pin of the 485 chip are still kept at a high level, and the DI pin is still in a sending active state, so as to output a high level and push off the output, and the waveform duty cycle can be effectively improved, the communication quality is improved, and the power consumption is reduced.

In this embodiment, the low-level turn-on circuit includes a PNP transistor Q2, a base of the PNP transistor Q2 is connected to an anode of a diode D5 through a resistor R12, an emitter of the PNP transistor Q2 is connected to an anode of a diode D5 through a resistor R10, and a collector of the PNP transistor Q2 is connected to the charging and discharging circuit and a DE pin and an RE pin of the 485 chip through a resistor R75, respectively.

In practical use, when the emitter of the PNP triode Q2 is at a low level, the PNP triode Q2 is turned on, the collector of the PNP triode Q2 is at a high level, the DE pin and the RE pin of the 485 chip are at a high level, the DI pin of the 485 chip is in a transmitting state, and meanwhile, the charging and discharging loop charges; when the emitter of the PNP type triode Q2 is at a high level, the PNP type triode Q2 is cut off, the collector of the PNP type triode Q2 is at a low level, at the moment, the charge-discharge loop discharges, the DE pin and the RE pin of the 485 chip still keep at a high level, and the DI pin of the 485 chip is still in a sending state, so that the sending time of the DI pin of the 485 chip is prolonged, and the waveform duty ratio is improved; in addition, R75 is the protection resistor of PNP transistor Q2.

In this embodiment, the charge and discharge circuit includes a capacitor C9 and a resistor R11, the capacitor C9 is connected in parallel with the resistor R11, one end of the capacitor C9 and one end of the resistor R11 are respectively connected to the resistor R75, and the other end of the capacitor C9 and the other end of the resistor R11 are grounded.

In practical use, when the baud rate is 115200, 820pF is selected as the capacitive reactance of the capacitor C9, 41.2K Ω is selected as the resistance of the resistor R75, and the discharge time of the charge-discharge circuit is adjusted, so that the pull-up reset level is output in 40uS push-pull, the waveform duty ratio is uniform, the waveform basically has no deformation, and the signal transmission is safe and reliable during long-distance communication.

In this embodiment, the pin a of the 485 chip is connected to the pull-up resistor R21, the pull-up resistor R21 is connected to the cathode of the diode D10, the anode of the diode D10 is connected to the VCC terminal of the 485 chip and the capacitor C7, and the capacitor C7 is grounded.

In practical use, the pin A of the 485 chip is connected with the diode D10 in series through the pull-up resistor R21, so that the voltage on the output signal line AB is prevented from being fed back to the VCC end of the 485 chip, and the voltage at the VCC end of the 485 chip is higher, thereby influencing the circuit device of the 485 chip.

In this embodiment, a resistor R30 is connected between the pin a and the pin B of the 485 chip, and the resistor R30 has the function of adjusting the amplitude of the waveform ratio and reducing the height of the duty cycle.

In this embodiment, the pin a of the 485 chip is connected to the cathode of the diode D19, and the anode of the diode D19 is grounded; the pin B of the 485 chip is connected with the cathode of the diode D18, the anode of the diode D18 is grounded, and the diode D19 and the diode D18 have the functions of noise reduction and static electricity prevention.

Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the scope of the embodiments of the present invention, and are intended to be covered by the claims and the specification.

Claims

1. The utility model provides an automatic receiving and dispatching improvement circuit of RS485 communication, includes the 485 chip, its characterized in that: the RO pin of the 485 chip is connected with the RXDO receiving pin of the MCU, the DXDO sending pin of the MCU chip is connected with the cathode of the diode D5, the anode of the diode D5 is respectively connected with the DI pin of the 485 chip and the input end of the low level conducting circuit, the output end of the low level conducting circuit is respectively connected with the charge-discharge loop and the DE pin and the RE pin of the 485 chip, and the pin A and the pin B of the 485 chip are both connected with the interface of the communication equipment.

2. The improved RS485 communication automatic transceiving circuit of claim 1, wherein: the low-level conducting circuit comprises a PNP type triode Q2, the base electrode of the PNP type triode Q2 is connected with the anode of a diode D5 through a resistor R12, the emitting electrode of the PNP type triode Q2 is connected with the anode of a diode D5 through a resistor R10, and the collecting electrode of the PNP type triode Q2 is connected with a charging and discharging loop and the DE pin and the RE pin of a 485 chip respectively through a resistor R75.

3. The improved RS485 communication automatic transceiving circuit of claim 2, wherein: the charge-discharge loop comprises a capacitor C9 and a resistor R11, the capacitor C9 is connected with the resistor R11 in parallel, one end of the capacitor C9 and one end of the resistor R11 are connected with the resistor R75 respectively, and the other ends of the capacitor C9 and the resistor R11 are grounded.

4. The improved RS485 communication automatic transceiving circuit of claim 1, wherein: the pin A of the 485 chip is connected with a pull-up resistor R21, a pull-up resistor R21 is connected with the cathode of a diode D10, the anode of the diode D10 is respectively connected with the VCC end of the 485 chip and a capacitor C7, and a capacitor C7 is grounded.

5. The improved RS485 communication automatic transceiving circuit of claim 1, wherein: and a resistor R30 is connected between the pin A and the pin B of the 485 chip.

6. The improved RS485 communication automatic transceiving circuit of claim 1, wherein: the pin A of the 485 chip is connected with the cathode of a diode D19, and the anode of a diode D19 is grounded; the pin B of the 485 chip is connected with the cathode of a diode D18, and the anode of a diode D18 is grounded.