CN212784765U - Start-up instant output voltage overshoot suppression circuit and power supply module - Google Patents
Start-up instant output voltage overshoot suppression circuit and power supply module Download PDFInfo
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- CN212784765U CN212784765U CN202021696247.9U CN202021696247U CN212784765U CN 212784765 U CN212784765 U CN 212784765U CN 202021696247 U CN202021696247 U CN 202021696247U CN 212784765 U CN212784765 U CN 212784765U
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Abstract
The utility model discloses a start output voltage suppression circuit and power module that overshoot in twinkling of an eye, include: the auxiliary load, the first triode, the second triode, the MOS tube and the ninth capacitor; one end of the auxiliary load is respectively connected with one output voltage of the power supply module and the source electrode of the MOS tube, and the other end of the auxiliary load is connected with the collector electrode of the first triode; the base electrode of the first triode is connected with a first level signal; the grid electrode of the MOS tube is connected with the collector electrode of the second triode, and the drain electrode of the MOS tube is connected with a power receiving device to supply power; and the base electrode of the second triode is connected with a delay conduction circuit to carry out delay conduction, and the emitting electrode of the second triode is connected with the base electrode of the second triode through the ninth capacitor. The utility model discloses can restrain the overshoot that output voltage probably appears when starting under the extremely light load condition, avoid causing the influence to the powered device.
Description
Technical Field
The utility model relates to a power supply technical field, in particular to start output voltage suppression circuit and power module that overshoot in the twinkling of an eye.
Background
Along with the multifunctionalization of electronic products, the output voltage specification of a single power supply module is increasing. Multi-specification output voltages are increasingly required for functionalization and cost reduction. However, under the voltage condition with multiple output specifications, most engineers stabilize the output voltage by adopting single feedback or double feedback of the output voltage, or stabilize the output voltage by changing a transformer winding method, but the output voltage without a feedback group is often far higher than the output specification when the machine is started under the condition of extremely light load, so that the designed output specification cannot be reached, the influence on the powered device is caused, and meanwhile, the standby power consumption is not increased.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to overcome prior art not enough, provide a start output voltage suppression circuit and power module that overshoot in twinkling of an eye, can restrain the overshoot that output voltage probably appears when starting under the extremely light-load condition, avoid causing the influence to the powered device, have the characteristics that do not increase standby power consumption simultaneously.
The utility model adopts the following technical scheme:
on the one hand, the utility model relates to a start output voltage suppression circuit that overshoots in twinkling of an eye, include: the auxiliary load, the first triode, the second triode, the MOS tube and the ninth capacitor; one end of the auxiliary load is respectively connected with one output voltage of the power supply module and the source electrode of the MOS tube, and the other end of the auxiliary load is connected with the collector electrode of the first triode; the base electrode of the first triode is connected with a first level signal; the grid electrode of the MOS tube is connected with the collector electrode of the second triode, and the drain electrode of the MOS tube is connected with a power receiving device to supply power; and the base electrode of the second triode is connected with a delay conduction circuit to carry out delay conduction, and the emitting electrode of the second triode is connected with the base electrode of the second triode through the ninth capacitor.
Preferably, the first level signal is connected with the MCU control unit.
Preferably, the auxiliary load is composed of a resistor.
Preferably, the auxiliary load comprises two or more resistors connected in parallel.
Preferably, the time-delay conducting circuit includes:
a first transformer; a power supply switch on the primary side of the first transformer is connected with the first level signal; and the secondary side output of the first transformer is connected with the base electrode of the second triode.
Preferably, the time-delay conducting circuit includes:
a second level signal and a delay unit; the delay unit is connected with the second level signal to delay the second level signal; the second level signal is connected with the MCU control unit.
Preferably, the start-up transient output voltage overshoot suppression circuit further includes:
a first resistor and a second resistor; the first level signal is connected with the base electrode of the first triode through the first resistor; the first resistor is connected with the emitting electrode of the first triode through the second resistor.
Preferably, the start-up transient output voltage overshoot suppression circuit further includes:
a sixth resistor and an eighth resistor; the delay conducting circuit is connected with the base electrode of the second triode through the sixth resistor; and the base electrode of the second triode is connected with the emitting electrode of the second triode through the eighth resistor.
Preferably, the start-up transient output voltage overshoot suppression circuit further includes:
a ninth resistor and a tenth resistor; the source electrode of the MOS tube is connected with the grid electrode of the MOS tube through the ninth resistor; and the grid electrode of the MOS tube is connected with the collector electrode of the second triode through the tenth resistor.
On the other hand, the utility model discloses a power supply module, which comprises a second transformer; further comprising: the voltage overshoot suppression circuit is output at the starting moment; and the input end of the starting instant output voltage overshoot suppression circuit is connected with one output voltage at the secondary side of the second transformer.
Compared with the prior art, the beneficial effects of the utility model are as follows:
the utility model introduces the switch control circuit (comprising the first triode, the second triode and the MOS tube) between the rectification of the transformer and the powered equipment to inhibit the overshoot when starting the machine under the condition of light load, thereby avoiding the influence on the powered equipment; when the system is in standby, the auxiliary load is controlled to be disconnected so as to reduce standby power consumption.
The above description is only an overview of the technical solutions of the present invention, and in order to make the technical means of the present invention more clearly understood, the present invention can be implemented according to the content of the description, and in order to make the above and other objects, features, and advantages of the present invention more obvious and understandable, the following description lists the embodiments of the present invention.
The above and other objects, advantages and features of the present invention will become more apparent to those skilled in the art from the following detailed description of specific embodiments thereof, taken in conjunction with the accompanying drawings.
Drawings
Fig. 1 is a circuit diagram of a first embodiment of the present invention;
fig. 2 is an acquisition circuit of VCC4 according to a first embodiment of the present invention;
fig. 3 is a circuit diagram of a second embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer, embodiments of the present invention will be described in further detail with reference to the accompanying drawings.
Example one
Referring to fig. 1 and 2, in one aspect, the present invention provides a circuit for suppressing overshoot of output voltage at startup time, including: the auxiliary load, the first triode V1, the second triode V2, the MOS transistor V3 and the ninth capacitor C9; one end of the auxiliary load is respectively connected with one output voltage of the power supply module and the source electrode of the MOS transistor V3, and the other end of the auxiliary load is connected with the collector electrode of the first triode V1; the base electrode of the first triode V1 is connected with a first level signal PON; the grid electrode of the MOS tube V3 is connected with the collector electrode of the second triode V2, and the drain electrode of the MOS tube V3 is connected with a power receiving device for supplying power; the base of the second triode V2 is connected to a delay conducting circuit for conducting delay, and the emitter of the second triode V2 is connected to the base of the second triode V2 through the ninth capacitor C9.
In this embodiment, the first level signal PON is connected to an MCU control unit, and the MCU control unit controls the first level signal PON to output a high level or a low level.
Further, the auxiliary load is composed of a resistor. In this embodiment, the auxiliary load includes four resistors (a third resistor R3, a fourth resistor R4, a fifth resistor R5, and a seventh resistor R7) connected in parallel.
In this embodiment, the delay conducting circuit includes:
a first transformer T504; a power supply switch on the primary side of the first transformer T504 is connected to the first level signal PON; the secondary side output of the first transformer T504 is connected with the base of the second triode V2.
In this embodiment, the overshoot suppression circuit for the output voltage at the startup moment further includes:
a first resistor R1 and a second resistor R2; the first level signal PON is connected with the base of the first triode V1 through the first resistor R1; the first resistor R1 is connected with the emitter of the first triode V1 through the second resistor R2.
In this embodiment, the overshoot suppression circuit for the output voltage at the startup moment further includes:
a sixth resistor R6 and an eighth resistor R8; the time delay conducting circuit is connected with the base electrode of the second triode V2 through the sixth resistor R6; the base of the second triode V2 is connected with the emitter of the second triode V2 through the eighth resistor R8.
In this embodiment, the overshoot suppression circuit for the output voltage at the startup moment further includes:
a ninth resistor R9 and a tenth resistor R10; the source electrode of the MOS transistor V3 is connected with the gate electrode of the MOS transistor V3 through the ninth resistor R9; the gate of the MOS transistor V3 is connected to the collector of the second transistor V2 through the tenth resistor R10.
The utility model discloses the theory of operation of circuit as follows:
when the circuit works normally, the MCU control unit controls the first level signal PON to output a high level, so that the first triode V1 is conducted, and the auxiliary load resistors R3-R7 are accessed, so that the group of output voltages are not in an extremely light load state; further, the first level signal PON controls a power supply switch on the primary side of the first transformer T504 to be closed, so that a certain time delay exists between a secondary output power VCC4 of the first transformer T504, the voltage output time from the PON signal to VCC4 is different due to the chip start time, which is approximately 50-150ms, VCC4 controls the conduction of the second triode V2 after the power output, so as to turn on the MOS transistor, after the MOS transistor V3 is conducted, the power VCC3 is output to the powered device, the conduction time of the second triode V2 to the MOS transistor V3 is regulated by the value of the ninth capacitor C9, which can be actually selected according to the overshoot voltage time;
when the device is in standby operation, the MCU control unit controls the first level signal PON to output low level, so that the first triode V1 is cut off, the connection with the auxiliary load resistors R3-R7 is cut off, the output voltage of the group is in extremely light load, and the standby power consumption can be effectively reduced; further, the first level signal PON controls the power supply switch on the primary side of the first transformer T504 to be turned off, so that there is a certain time delay when the output power VCC4 is turned off on the secondary side of the first transformer T504, the voltage output time from the PON signal to the VCC4 is different due to the chip start time, which is approximately between 50 and 150ms, the VCC4 controls the second triode V2 to be turned off after no power is output, so as to turn off the MOS transistor, after the MOS transistor V3 is turned off, no power is output to the powered device, the time from the second triode V2 to the MOS transistor V3 is turned off, which can be adjusted by the value of the ninth capacitor C9, and can be actually selected according to the overshoot voltage time of the overshoot.
On the other hand, the utility model relates to a power supply module, including second transformer T503; further comprising: the voltage overshoot suppression circuit is output at the starting moment; the input end of the start-up instant output voltage overshoot suppression circuit is connected with one path of output voltage on the secondary side of the second transformer T503.
Example two
The difference between the second embodiment and the first embodiment is the delay conducting circuit.
Specifically, referring to fig. 3, in one aspect, the present invention provides a circuit for suppressing overshoot of output voltage at the moment of power-on, including: the auxiliary load, the first triode V1, the second triode V2, the MOS transistor V3 and the ninth capacitor C9; one end of the auxiliary load is respectively connected with one output voltage of the power supply module and the source electrode of the MOS transistor V3, and the other end of the auxiliary load is connected with the collector electrode of the first triode V1; the base electrode of the first triode V1 is connected with a first level signal PON; the grid electrode of the MOS tube V3 is connected with the collector electrode of the second triode V2, and the drain electrode of the MOS tube V3 is connected with a power receiving device for supplying power; the base of the second triode V2 is connected to a delay conducting circuit for conducting delay, and the emitter of the second triode V2 is connected to the base of the second triode V2 through the ninth capacitor C9.
In this embodiment, the first level signal PON is connected to an MCU control unit, and the MCU control unit controls the first level signal PON to output a high level or a low level.
Further, the auxiliary load is composed of a resistor. In this embodiment, the auxiliary load includes four resistors connected in parallel.
In this embodiment, the delay conducting circuit includes:
a second level signal BON and a delay unit; the delay unit is connected with the second level signal BON to delay the second level signal BON; the second level signal BON is connected with the MCU control unit, and the MCU control unit controls the second level signal BON to output a high level or a low level.
It should be noted that the first level signal PON and the second level signal BON are controlled by different I/O ports of the MCU control unit. On one hand, the delay unit may be a software delay unit, the MCU control unit controls the first level signal PON to output a high level signal or a low level signal first, and controls the second level signal BON to output a high level signal or a low level signal after a certain delay time, and the second level signal BON is directly output to the second transistor V2; on the other hand, the delay unit may be a hardware delay unit, and the MCU control unit controls the first level signal PON and the second level signal BON to output a high level signal or a low level signal at the same time, but the second level signal BON needs to pass through a hardware delay unit before being output to the second triode V2.
By adopting the delay conducting circuit in the second embodiment, the time for the power receiving equipment to be powered on can be more accurately controlled.
In this embodiment, the overshoot suppression circuit for the output voltage at the startup moment further includes:
a first resistor R1 and a second resistor R2; the first level signal PON is connected with the base of the first triode V1 through the first resistor R1; the first resistor R1 is connected with the emitter of the first triode V1 through the second resistor R2.
In this embodiment, the overshoot suppression circuit for the output voltage at the startup moment further includes:
a sixth resistor R6 and an eighth resistor R8; the time delay conducting circuit is connected with the base electrode of the second triode V2 through the sixth resistor R6; the base of the second triode V2 is connected with the emitter of the second triode V2 through the eighth resistor R8.
In this embodiment, the overshoot suppression circuit for the output voltage at the startup moment further includes:
a ninth resistor R9 and a tenth resistor R10; the source electrode of the MOS transistor V3 is connected with the gate electrode of the MOS transistor V3 through the ninth resistor R9; the gate of the MOS transistor V3 is connected to the collector of the second transistor V2 through the tenth resistor R10.
The utility model discloses the theory of operation of circuit as follows:
when the circuit works normally, the MCU control unit controls the first level signal PON to output a high level, so that the first triode V1 is conducted, and the auxiliary load resistors R3-R7 are accessed, so that the group of output voltages are not in an extremely light load state; after the preset delay time (such as 500-1000ms), the second level signal BON outputs a high level to control the conduction of the second triode V2, so as to start the MOS transistor, after the MOS transistor V3 is conducted, the power VCC3 is output to the powered device, the turn-on time from the conduction of the second triode V2 to the conduction of the MOS transistor V3 can be adjusted by the value of the ninth capacitor C9, and can be actually selected according to the overshoot voltage time of the overshoot;
when the device is in standby operation, the MCU control unit controls the first level signal PON to output low level, so that the first triode V1 is cut off, the connection with the auxiliary load resistors R3-R7 is cut off, the output voltage of the group is in extremely light load, and the standby power consumption can be effectively reduced; after the preset delay time (such as 500-1000ms), the second level signal BON outputs a low level to control the cut-off of the second triode V2, and further control the MOS transistor V3 to be cut off, after the MOS transistor V3 is cut off, no power is output to the powered device, the time from the cut-off of the second triode V2 to the cut-off of the MOS transistor V3 can be adjusted by the value of the ninth capacitor C9, and can be actually selected according to the overshoot voltage time of the overshoot.
On the other hand, the utility model relates to a power supply module, including second transformer T503; further comprising: the voltage overshoot suppression circuit is output at the starting moment; the input end of the start-up instant output voltage overshoot suppression circuit is connected with one path of output voltage on the secondary side of the second transformer T503.
The above-mentioned be the utility model discloses a concrete implementation way, nevertheless the utility model discloses a design concept is not limited to this, and the ordinary use of this design is right the utility model discloses carry out immaterial change, all should belong to the act of infringement the protection scope of the utility model.
Claims (10)
1. A kind of start-up moment output voltage overshoots the suppression circuit, characterized by, comprising: the auxiliary load, the first triode, the second triode, the MOS tube and the ninth capacitor; one end of the auxiliary load is respectively connected with one output voltage of the power supply module and the source electrode of the MOS tube, and the other end of the auxiliary load is connected with the collector electrode of the first triode; the base electrode of the first triode is connected with a first level signal; the grid electrode of the MOS tube is connected with the collector electrode of the second triode, and the drain electrode of the MOS tube is connected with a power receiving device to supply power; and the base electrode of the second triode is connected with a delay conduction circuit to carry out delay conduction, and the emitting electrode of the second triode is connected with the base electrode of the second triode through the ninth capacitor.
2. The output voltage overshoot suppression circuit at startup instant according to claim 1, wherein the first level signal is connected to the MCU control unit.
3. The turn-on transient output voltage overshoot suppression circuit of claim 1, wherein said auxiliary load is comprised of a resistor.
4. The turn-on transient output voltage overshoot suppression circuit of claim 3, wherein said auxiliary load comprises two or more parallel resistors.
5. The overshoot suppression circuit for the power-on transient output voltage according to claim 1, wherein the delay conducting circuit comprises:
a first transformer; a power supply switch on the primary side of the first transformer is connected with the first level signal; and the secondary side output of the first transformer is connected with the base electrode of the second triode.
6. The overshoot suppression circuit for the power-on transient output voltage according to claim 1, wherein the delay conducting circuit comprises:
a second level signal and a delay unit; the delay unit is connected with the second level signal to delay the second level signal; and the second level signal is connected with the MCU control unit.
7. The turn-on transient output voltage overshoot suppression circuit of claim 1, wherein the turn-on transient output voltage overshoot suppression circuit further comprises:
a first resistor and a second resistor; the first level signal is connected with the base electrode of the first triode through the first resistor; the first resistor is connected with the emitting electrode of the first triode through the second resistor.
8. The turn-on transient output voltage overshoot suppression circuit of claim 1, wherein the turn-on transient output voltage overshoot suppression circuit further comprises:
a sixth resistor and an eighth resistor; the delay conducting circuit is connected with the base electrode of the second triode through the sixth resistor; and the base electrode of the second triode is connected with the emitting electrode of the second triode through the eighth resistor.
9. The turn-on transient output voltage overshoot suppression circuit of claim 1, wherein the turn-on transient output voltage overshoot suppression circuit further comprises:
a ninth resistor and a tenth resistor; the source electrode of the MOS tube is connected with the grid electrode of the MOS tube through the ninth resistor; and the grid electrode of the MOS tube is connected with the collector electrode of the second triode through the tenth resistor.
10. A power supply module includes a second transformer; it is characterized by also comprising: the power-on instant output voltage overshoot suppression circuit according to any one of claims 1 to 9; and the input end of the starting instant output voltage overshoot suppression circuit is connected with one output voltage at the secondary side of the second transformer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202021696247.9U CN212784765U (en) | 2020-08-14 | 2020-08-14 | Start-up instant output voltage overshoot suppression circuit and power supply module |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202021696247.9U CN212784765U (en) | 2020-08-14 | 2020-08-14 | Start-up instant output voltage overshoot suppression circuit and power supply module |
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| Publication Number | Publication Date |
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| CN212784765U true CN212784765U (en) | 2021-03-23 |
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| CN202021696247.9U Active CN212784765U (en) | 2020-08-14 | 2020-08-14 | Start-up instant output voltage overshoot suppression circuit and power supply module |
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| CN (1) | CN212784765U (en) |
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