CN212782727U - Storage device and device power-down test system thereof - Google Patents

Abstract

The application discloses a storage device and a device power failure test system thereof, wherein the storage device comprises a first charging interface and a second charging interface; the first charging interface is coupled to an interface of the storage device, and the standby power supply is charged through the first charging interface; the second charging interface is coupled with an external power supply, the external power supply supplies power or charges for the standby power supply through the second charging interface, and the standby power supply supplies power for the storage device.

Description

Storage device and device power-down test system thereof

Technical Field

The application relates to a test technology, in particular to a test device and a test system for testing whether a response meets a design target when a storage device is powered down.

Background

FIG. 1 illustrates a block diagram of a storage device. The storage device 102 is coupled to a host for providing storage capabilities to the host. The host and the storage device 102 may be coupled by various methods, including but not limited to, connecting the host and the storage device 102 by, for example, SATA (Serial Advanced Technology Attachment), SCSI (Small Computer System Interface), SAS (Serial Attached SCSI), IDE (Integrated Drive Electronics), USB (Universal Serial Bus), PCIE (Peripheral Component Interconnect Express), NVMe (NVM Express, high speed nonvolatile storage), ethernet, fibre channel, wireless communication network, etc. The host may be an information processing device, such as a personal computer, tablet, server, portable computer, network switch, router, cellular telephone, personal digital assistant, etc., capable of communicating with the storage device in the manner described above. The Memory device 102 includes an interface 103, a control unit 104, one or more NVM chips 105, a DRAM (Dynamic Random Access Memory) 110, and a standby power supply 150.

NAND flash Memory, phase change Memory, FeRAM (Ferroelectric RAM), MRAM (magnetoresistive Memory), RRAM (Resistive Random Access Memory), XPoint Memory, and the like are common NVM.

The interface 103 may be adapted to exchange data with a host by means such as SATA, IDE, USB, PCIE, NVMe, SAS, ethernet, fibre channel, etc.

The control unit 104 is used to control data transfer between the interface 103, the NVM chip 105, and the DRAM 110, and also used for memory management, host logical address to flash physical address mapping, erase leveling, bad block management, and the like. The control component 104 can be implemented in various manners of software, hardware, firmware, or a combination thereof, for example, the control component 104 can be in the form of an FPGA (Field-programmable gate array), an ASIC (Application-Specific Integrated Circuit), or a combination thereof. The control component 104 may also include a processor or controller in which software is executed to manipulate the hardware of the control component 104 to process IO (Input/Output) commands. The control component 104 may also be coupled to the DRAM 110 and may access data of the DRAM 110. FTL tables and/or cached IO command data may be stored in the DRAM.

Control section 104 includes a flash interface controller (or referred to as a media interface controller, a flash channel controller) that is coupled to NVM chip 105 and issues commands to NVM chip 105 in a manner that conforms to an interface protocol of NVM chip 105 to operate NVM chip 105 and receive command execution results output from NVM chip 105. Known NVM chip interface protocols include "Toggle", "ONFI", etc.

The host provides power to the storage device 102 through the interface 103 to operate the storage device 102. The backup power supply 150 provides emergency power to the storage device 102 in the event of a host power interruption or failure to the storage device 102. So that the storage device 102 can continue to execute the IO command that is not completed, and also record the operating status of the storage device by using the power provided by the backup power source, so that the storage device can continue to operate normally after the power supply is restored through the interface 103.

The backup power source 150 is rechargeable, such as a rechargeable battery or capacitor. Backup power source 150 includes a charging interface. The charging interface is coupled to the interface 103. When power is supplied to the storage device through the interface 103, the standby power supply 150 is also charged through the charging interface.

The backup power supply 150 has a limited amount of capacitance for cost, reliability, etc., and the time it supplies power to support the operation of the components of the memory device 102 is limited.

SUMMERY OF THE UTILITY MODEL

The capacity of the backup power supply of the storage device generally only supports the completion of the processing of the IO command being processed after the power failure occurs, and records the necessary state information of the storage device, without providing additional energy to support the storage device to complete other unnecessary operations. However, a series of processes after the power-down occurs, which are still implemented by the control part of the storage device along with other parts, exist in software and/or hardware to control these processes after the power-down. During a development phase of, for example, a storage device, it is desirable to obtain a log of a process after a power loss to assist in identifying the correctness of the process. There is also a need to obtain logs of processes after a power loss when the storage device is delivered to a customer and used on site at the customer. Logging consumes additional power and the power provided by backup power supply 150 is insufficient to support the need to log after a power loss occurs. It may be desirable to log and/or otherwise perform other operations on processes after a power loss occurs without increasing the capacity of backup power source 150.

The log and/or status information of the storage device is typically obtained by a debug tool. The debugging tool has stronger dependence on the debugged object. For example, processor a and IP Core (reusable integrated circuit element) B of the control unit need to use a debugging tool dedicated to processor a and IP Core B. The debugging tool usually has strong dependence on the operating system (such as Windows, Linux, etc.), device interface (such as USB, PCIe, UART, etc.), driver and debugging software of the computer. For this reason, a dedicated software computer needs to be provided for each piece of debugging equipment. As the number of memory devices to be debugged increases and the number of control components to be used increases, the number of required debugging devices and computers also increases, which increases the complexity of the system, increases the debugging cost, and also easily introduces defects and reduces reliability.

According to a first aspect of the present application, there is provided a first storage device according to the first aspect of the present application, including a first charging interface and a second charging interface; the first charging interface is coupled to an interface of the storage device, and the standby power supply is charged through the first charging interface; the second charging interface is coupled with an external power supply, the external power supply supplies power or charges for the standby power supply through the second charging interface, and the standby power supply supplies power for the storage device.

According to the first storage device of the first aspect of the present application, there is provided the second storage device of the first aspect of the present application, wherein the second charging interface further comprises a current limiting diode, an anode of the current limiting diode is coupled to the external power source, and a cathode of the current limiting diode is coupled to the backup power source.

According to the first storage device of the first aspect of the present application, there is provided the third storage device of the first aspect of the present application, wherein the external power supply further includes a current limiting diode.

According to the storage device of any one of the first to third aspects of the present application, there is provided the fourth storage device of the first aspect of the present application, wherein the storage device identifies whether power supply to the storage device is abnormal only through the first charging interface; the backup power supply supplies power to the storage device in response to a power supply abnormality to the storage device.

According to a fourth storage device of the first aspect of the present application, there is provided the fifth storage device of the first aspect of the present application, wherein whether power supply to the storage device is abnormal is identified by a voltage of the first charging interface.

According to the memory device of any one of the first to fifth aspects of the present application, there is provided the sixth memory device of the first aspect of the present application, wherein the second charging interface is electrically isolated from the first charging interface.

According to the storage device of any one of the first to sixth aspects of the present application, there is provided the seventh storage device of the first aspect of the present application, wherein the external power supply supplies power to the backup power supply through the second charging interface or the charging does not affect the result of identifying whether the power supply to the storage device through the first charging interface is abnormal.

According to a second aspect of the present application, there is provided a first electronic device power-down testing system of the second aspect of the present application, wherein the system comprises a testing host, a testing controller and a power supply; the test host is used for applying a test case to the tested equipment; the power supply is coupled with the tested equipment through the first switch and used for supplying power to the tested equipment, and the first switch turns on or off the power supply to supply power to the tested equipment; the test control machine is coupled to the first switch and controls the first switch to be turned on or off.

According to the second aspect of the present invention, there is provided a second electronic device power-down testing system, wherein the test controller is coupled to the device under test to obtain the log and/or the status information from the device under test.

According to the first or second electronic device power-down test system of the second aspect of the present application, a third electronic device power-down test system of the second aspect of the present application is provided, wherein the test host is coupled to the device under test through a second switch, and the second switch turns on or off a power supply and/or a test case provided to the device under test by the test host; the test control machine is coupled to the second switch and controls the on or off of the two switches.

According to the power down test system of the electronic device of any one of the first to third aspects of the present application, there is provided the fourth power down test system of the electronic device of the second aspect of the present application, wherein the test host is coupled to the device under test through a PCIe interface.

According to a fourth electronic device power-down test system of the second aspect of the present application, there is provided the fifth electronic device power-down test system of the second aspect of the present application, wherein the PCIe interface of the test host includes a PCIe power pin for transmitting power and a PCIe signal pin for transmitting a command.

According to a fifth electronic device power-down test system of the second aspect of the present application, there is provided the sixth electronic device power-down test system of the second aspect of the present application, wherein the PCIe power pin is coupled to the device under test through the second switch, and the PCIe signal pin is directly coupled to the device under test; the second switch turns on or off power supplied from the PCIe power pin to the device under test.

According to a sixth electronic device power down test system of the second aspect of the present application, there is provided the seventh electronic device power down test system of the second aspect of the present application, wherein the PCIe power pin and the PCIe signal pin are both coupled to the device under test through the second switch.

According to the power-down test system for the electronic device of any one of the first to seventh aspects of the present application, there is provided the eighth power-down test system for an electronic device of the second aspect of the present application, wherein the test controller communicates with the device under test through an MCTP protocol and/or is coupled to the device under test through an SMBus bus, an I2C bus, or a serial port.

According to the power-down test system for electronic equipment in any one of the first to eighth aspects of the present application, there is provided the ninth power-down test system for electronic equipment in the second aspect of the present application, wherein the test controller is further coupled to the test host to obtain a state of a test script running on the test host, and/or to inform the test host of a working progress of the test controller.

According to the electronic device power-down test system of any one of the first to ninth aspects of the present application, there is provided the tenth electronic device power-down test system of the second aspect of the present application, wherein the device under test includes a first charging interface and a second charging interface; the test host is coupled with the tested equipment through the first charging interface and the second switch; the power supply is coupled with the tested equipment through the second charging interface and the first switch.

According to the tenth electronic device power-down test system of the second aspect of the present application, there is provided the eleventh electronic device power-down test system of the second aspect of the present application, wherein the first charging interface is coupled to an interface of the device under test, and the test host applies the test case to the device under test through the interface of the device under test.

According to the electronic device power-down test system of any one of the first to eleventh aspects of the present application, there is provided the twelfth electronic device power-down test system of the second aspect of the present application, wherein the device under test is a storage device of one of the above.

According to a twelfth power down test system of electronic equipment of the second aspect of the present application, there is provided the thirteenth power down test system of electronic equipment of the second aspect of the present application, wherein the interface of the device under test is a PCIe interface; the first charging interface is a PCIe power pin of the PCIe interface.

According to the electronic device power-down test system of any one of the first to thirteenth aspects of the present application, there is provided the fourteenth electronic device power-down test system of the second aspect of the present application, wherein two or more devices under test are included; the test host couples two or more devices under test and applies test cases to each device under test.

According to a fourteenth power down test system for electronic equipment of the second aspect of the present application, there is provided the fifteenth power down test system for electronic equipment of the second aspect of the present application, wherein each device under test is coupled to a test controller, and the test controller obtains log and/or status information from each device under test.

According to a fifteenth electronic device power down test system of the second aspect of the present application, there is provided the sixteenth electronic device power down test system of the second aspect of the present application, wherein each device under test includes a first and a second charging interface, respectively.

According to a sixteenth electronic device power-down test system of the second aspect of the present application, there is provided the seventeenth electronic device power-down test system of the second aspect of the present application, wherein the seventeenth electronic device power-down test system comprises a plurality of first switches and a plurality of second switches; the power supply is coupled with one of the tested devices corresponding to the first switch through one of the first switches and is used for supplying power to the tested devices; the test host is coupled with one of the tested devices corresponding to the second switch through one of the second switches, and is used for supplying power to the tested devices and providing test cases.

According to a seventeenth electronic device power down test system of the second aspect of the present application, there is provided the eighteenth electronic device power down test system of the second aspect of the present application, wherein the test controller is coupled to each of the plurality of first switches and controls on or off of each of the first switches; a test control engine is coupled to each of the plurality of second switches and controls the turning on or off of each of the second switches.

According to the eighteenth electronic device power-down test system of the second aspect of the present application, there is provided the nineteenth electronic device power-down test system of the second aspect of the present application, wherein the power supply is coupled to the second charging interface of one of the plurality of devices under test corresponding to the first switch through one of the plurality of first switches; the test host is coupled with a first charging interface of one of the tested devices corresponding to the second switch through one of the second switches; one of the first switches is connected or disconnected with the power supply of the power supply to the second charging interface coupled with the first switch; one of the second switches respectively turns on or off the power supply of the test host to the second charging interface of the tested device coupled with the second switch.

According to a fourteenth to nineteenth electronic device power down test system of the second aspect of the present application, there is provided the twentieth electronic device power down test system of the second aspect of the present application, wherein the test host comprises a PCIe interface, and the test host is coupled to the plurality of devices under test through an interface hub.

According to a twentieth electronic device power-down test system of the second aspect of the present application, there is provided the twenty-first electronic device power-down test system of the second aspect of the present application, wherein the interface hub is a PCIe hub and is coupled to a PCIe interface of the test host.

According to the power-down test system for the electronic device of any one of the fourteenth to twenty-first aspects of the present application, there is provided the power-down test system for the twenty-second electronic device of the second aspect of the present application, wherein the test host runs a test script or a test program to apply a test case to each device under test.

According to a twenty-third electronic device power-down test system of the second aspect of the present application, there is provided the twenty-third electronic device power-down test system of the second aspect of the present application, wherein the interface hub is coupled to the first device under test through a fifth switch, the interface hub is coupled to the second device under test through a sixth switch, and the fifth switch and the sixth switch turn on or off electrical connection of the interface hub to the first device under test and the second device under test.

According to a twenty-third electronic device power-down test system of the second aspect of the present application, there is provided the twenty-fourth electronic device power-down test system of the second aspect of the present application, wherein the test controller is coupled to the fifth switch and the sixth switch, and controls on or off of the fifth switch and the sixth switch.

According to the first to twenty-fourth electronic device power-down test systems of the second aspect of the present application, there is provided a twenty-fifth electronic device power-down test system of the second aspect of the present application, wherein the test host and the test controller are both virtual machines operating in the first host; the first host comprises a first interface and a second interface; the test host is bound with the first interface and is coupled with the tested equipment through the first interface; the test control machine is bound with the second interface and coupled with the tested equipment through the second interface.

According to a twenty-fifth electronic device power-down test system of the second aspect of the present application, there is provided the twenty-sixth electronic device power-down test system of the second aspect of the present application, wherein the second test controller is further included; the second test control machine is a virtual machine running in the first host machine; the first host comprises a third interface; the second test controller is bound with the third interface and coupled with the tested equipment through the second interface; the second test control machine does not use the second interface and the test control machine does not use the third interface.

According to a twenty-fifth or twenty-sixth electronic device power-down test system of the second aspect of the present application, there is provided a twenty-seventh electronic device power-down test system of the second aspect of the present application, wherein the first interface is a PCIe interface, and the second interface is a network interface, an I2C interface, a USB interface, and/or a serial port.

According to a twenty-seventh electronic device power-down test system of the second aspect of the present application, there is provided the twenty-eighth electronic device power-down test system of the second aspect of the present application, wherein the first interface is coupled to the interface hub; the interface hub couples the plurality of devices under test to the first interfaces, respectively.

According to a twenty-seventh or twenty-eighth power down test system of the second aspect of the present application, there is provided a twenty-ninth power down test system of the second aspect of the present application, wherein the test host accesses the plurality of devices under test through the first interface; the first host mounts the plurality of devices to be tested to the testing host, and the testing host accesses the plurality of devices to be tested and applies the test cases to the plurality of devices to be tested.

According to a twenty-eighth electronic device power-down test system of the second aspect of the present application, there is provided the thirty-eighth electronic device power-down test system of the second aspect of the present application, wherein the interface hub is electrically connected to the plurality of devices under test through the plurality of seventh switches, respectively, and the plurality of seventh switches turn on or off the electrical connection of the interface hub and the devices under test.

According to a thirty-first electronic device power-down test system of the second aspect of the present application, there is provided the thirty-first electronic device power-down test system of the second aspect of the present application, wherein the plurality of devices under test are electrically connected to the power supply through a plurality of eighth switches, respectively, and the eighth switches turn on or off the electrical connection between the devices under test and the power supply.

According to a thirty-first or thirty-second electronic device power-down test system of the second aspect of the present application, there is provided the thirty-second electronic device power-down test system of the second aspect of the present application, wherein the first host includes a plurality of second interfaces; each of the plurality of test control machines couples one of the plurality of devices under test, one of the plurality of seventh switches, and one of the plurality of eighth switches through one of the plurality of second interfaces.

According to a thirty-second electronic device power-down test system of the second aspect of the present application, there is provided the thirty-third electronic device power-down test system of the second aspect of the present application, wherein the plurality of test controllers control opening or closing of the plurality of seventh switches and the plurality of eighth switches, and further run the debug tool to acquire log and/or status information from the device under test.

According to the power-down test system for the electronic equipment of any one of the twenty-fifth to thirty-third aspects of the present application, there is provided the power-down test system for the thirty-fourth electronic equipment of the second aspect of the present application, wherein each test controller controls a certain seventh switch and a certain eighth switch coupled thereto and is coupled with the tested equipment, and each test controller, together with the test host, the seventh switch and the eighth switch, performs a test on the tested equipment.

According to a thirty-fourth electronic device power-down test system of the second aspect of the present application, there is provided the thirty-fifth electronic device power-down test system of the second aspect of the present application, wherein each test controller runs a debugging tool of a corresponding device under test.

According to a thirty-fifth electronic device power-down test system of the second aspect of the present application, there is provided the thirty-sixth electronic device power-down test system of the second aspect of the present application, wherein each test controller is separately installed with software on which a debugging tool corresponding to a device under test is operated.

According to a thirty-sixth electronic device power-down test system of the second aspect of the present application, there is provided the thirty-seventh electronic device power-down test system of the second aspect of the present application, wherein the test controller further couples the test host through a network.

According to the thirty-sixth electronic device power-down test system of the second aspect of the present application, there is provided the thirty-eighth electronic device power-down test system of the second aspect of the present application, wherein when it is not necessary to perform a test on a certain device under test, the corresponding test controller is also turned off.

According to a third aspect of the present application, there is provided a first electronic device power-down testing system of the third aspect of the present application, wherein the system comprises a first switch, a second switch, a test controller and a power supply; the test control machine is coupled to the first switch and the second switch and controls the connection or disconnection of the first switch and the second switch respectively; the first switch is used for coupling a power supply to the tested equipment, the power supply is used for supplying power to the tested equipment, and the first switch is used for switching on or off the power supply for supplying power to the tested equipment; the second switch is used for coupling the tested equipment to the test host; the second switch turns on or off the power supply of the test host to the tested equipment.

According to the first electronic device power-down test system of the third aspect of the present application, there is provided the second electronic device power-down test system of the third aspect of the present application, wherein the test controller is coupled to the device under test to obtain the log and/or the status information from the device under test; the test host is used for applying test cases to the tested equipment.

Drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments described in the present application, and other drawings can be obtained by those skilled in the art according to the drawings.

FIG. 1 illustrates a block diagram of a prior art storage device;

FIG. 2 illustrates a block diagram of a storage device according to an embodiment of the present application;

FIG. 3A illustrates a block diagram of a test system according to an embodiment of the present application;

FIG. 3B illustrates a block diagram of a test system according to yet another embodiment of the present application;

FIG. 4 illustrates a flow chart of a testing method according to an embodiment of the present application;

FIG. 5 illustrates a block diagram of a test system according to yet another embodiment of the present application.

Detailed Description

The technical solutions in the embodiments of the present application are clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some, but not all, embodiments of the present application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

FIG. 2 is a block diagram of a storage device according to an embodiment of the present application.

According to the storage device of the embodiment of the application, compared with the prior art, the standby power supply comprises two charging interfaces (210 and 240). The charging interface 210 is coupled to the interface 203 of the storage device, and charges the backup power source with power supplied from the interface 203 when the storage device is normally operated.

The charging interface 240 is not used when the storage device is operating normally. The charging interface 240 may be coupled to an external power source. The external power supply is for example independent of the host to which the interface 203 is coupled. When additional logs need to be acquired after a power failure, an external power source is coupled to the charging interface 240, and the backup power source is powered or charged through the charging interface 240. Such that after the storage device is powered down, although interface 203 is no longer providing power to the storage device, the backup power source utilizes its stored power to power the storage device, and the external power source also provides power to the backup power source and/or the storage device through charging interface 240. At this point, the external power source acts as a backup to the backup power source, or a secondary backup to the storage device, in this manner increasing the available power to the storage device after a power loss, thereby allowing logging and/or other operations to be performed.

Optionally, the charging interface 240 further comprises a current limiting diode. The positive pole of the current-limiting diode is coupled with an external power supply, and the negative pole is coupled with a standby power supply, so that the situation that the power of the standby power supply flows backwards to the external power supply when the external power supply supplies power to the standby power supply is avoided. Still optionally, the external power source comprises a current limiting diode to prevent power of the backup power source from flowing backwards to the external power source when the external power source is supplying power to the backup power source.

It will be appreciated that embodiments in accordance with the present application are applicable to a wide variety of other electronic devices including a backup power source, in addition to memory devices.

FIG. 3A illustrates a block diagram of a test system according to an embodiment of the present application.

The test system according to the embodiment of the present application includes a device under test 310, a test host 320, a test control engine 340, and a power supply 350.

The device under test 310 is a storage device, such as a PCIe interface, or other electronic device that includes a backup power source. The device under test 310 includes two charging interfaces, and fig. 3A only shows the second charging interface 315. The device under test 310 is coupled to the test host 320 and accessed or used by the test host 320. The test host 320 is coupled to the device under test 310. The interface of the test host 320 to couple the device under test 310 is different from the second charging interface 315.

Second charging interface 315 is coupled to power source 350 through, for example, switch 344. Switch 344 switches on or off power from power source 350 to second charging interface 315. The second charging interface 315 is coupled to and supplies power to a backup power source of the device under test 310, for example, for charging the backup power source. The test control engine 340 is coupled to the switch 344 and controls the switch 344 to be turned on or off.

The test host 320 is, for example, a computer or server. The test host 320 includes, for example, a PCIe interface 322. The device under test 310 is coupled to the test host 320 through a PCIe interface 322. The test host 320 runs, for example, a test script or a test program to apply test cases to the device under test 310.

By way of example, the PCIe interface 322 includes PCIe power pins to transmit power and PCIe signal pins to transmit commands. In one embodiment, the PCIe power pins are coupled to the device under test 310 through the switch 342, while the PCIe signal pins are coupled directly to the device under test 310. The switch 342 turns on or off power supplied to the device under test 310 from the PCIe power pin. The test control engine 340 is coupled to the switch 342 and controls the switch 342 to be turned on or off. In yet another embodiment, both the PCIe power pins and the PCIe signal pins are coupled to the device under test 310 through the switch 342.

Test control engine 340 is, for example, a computer, server, or embedded computer such as a raspberry pi. The test computer 340 also couples to the device under test 310 to obtain, for example, logs and/or status information from the device under test 310. The test control engine 340 couples the device under test through a debug tool or the test control engine 340 includes a modulation tool. By way of example, the test control engine 340 communicates with the device under test 310 via, for example, MCTP (Management Component Transport Protocol), available in, for example, https:// www.dmtf.org/sites/default/files/standards/documents/DSP0236_1.3.1. pdf, and is coupled to the device under test 310 via, for example, an SMBus (System Management Bus) Bus, an I2C (Inter-Integrated Circuit) Bus, or a Serial Port (UART). Thus, the test control engine 340 communicates with the device under test 310 independently of the test host 320 communicating with the device under test 310.

Optionally, the test control engine 340 is also coupled to the test host 320 to obtain, for example, the status of test scripts running on the test host 320 and/or to inform the test host 320 of the operational progress of the test control engine 340.

FIG. 3B illustrates a block diagram of a test system according to yet another embodiment of the present application.

To improve testing efficiency, in the embodiment of FIG. 3B, the test host 370 couples two or more devices under test (shown as devices under test 360 and 365) to the test control machine 390 and applies test cases to each device under test. Test control engine 390 controls the power to each test device.

The test system according to the embodiment of FIG. 3B includes devices under test 360 and 365, a test host 370, a test control machine 390, and a power supply 380.

The device under test (360, 365) is a storage device, such as a PCIe interface, or other electronic device that includes a backup power source. The devices under test (360, 365) each include two charging interfaces, only the second of which is shown in fig. 3B. The interface of the test host 370 coupling the device under test (360, 365) is different from the second charging interface.

The second charging interface of the device under test 360 is coupled to the power supply 380 through, for example, a switch 396. The second charging interface of the device under test 365 is coupled to the power supply 380 through, for example, a switch 398. Switch 396 and switch 398 each turn on or off power from power source 380 to the second charging interface to which they are coupled. The second charging interface is coupled to and supplies power to a standby power supply of the device under test. Test control machine 390 is coupled to switch 396 and switch 398 and controls the conduction or disconnection of switch 396 and switch 398.

The test host 370 is, for example, a computer or server. The test host 370 includes, for example, a PCIe interface. To couple more devices under test, the test host 370 is coupled to the devices under test through an interface hub. For example, the interface hub is a PCIe hub and couples to a PCIe interface of the test host 370. The test host 370 runs, for example, a test script or test program to apply test cases to the respective devices under test (360, 365). The test host 370 may independently control each device under test. So that the testing process for each device under test is independent of each other.

The interface hub is coupled to the device under test through the switch. In the example of FIG. 3B, the interface hub couples the device under test 360 through switch 392 and couples the device under test 365 through switch 394. Switches (392, 394) make or break electrical connections of the interface hub to the device under test (360, 365).

Test control engine 390 is coupled to switch 392 and switch 394 and controls the conduction or disconnection of switch 392 and switch 394.

The test computer 390 is also coupled to the device under test (360, 365) to obtain, for example, log and/or status information from the device under test (360, 365).

Optionally, test control machine 390 is also coupled to test host 370 to obtain, for example, the status of test scripts running on test host 370 and/or to inform test host 370 of the operational progress of test control machine 390.

FIG. 4 shows a flow chart of a testing method according to an embodiment of the present application.

Before the test is started, the switch coupling the test host and the tested device is closed, and the switch coupling the tested device and the power supply is opened. In the example of fig. 3A, switch 342 is closed and switch 344 is open before the test begins. In the example of fig. 3B, switch 392 is closed with switch 394 and switch 396 is open with switch 398.

A test process according to an embodiment of the application begins with a test host applying test stimuli to a device under test (410). The test host applies test stimuli to the device under test 310 in, for example, a prior art test implementation. During the process that the test host tests the device to be tested, the test control machine cuts off the power (420) provided by the test host to the device to be tested by controlling the switch to be switched off, so that the device to be tested can experience a power-down event and start a power-down processing flow. For example, in the example of FIG. 3A, the test controller 340 opens the switch 342; in the example of FIG. 3B, test control engine 390 opens switch 392 and/or switch 394. The test controller 390 may turn off either switch 392 or switch 394, or both switch 392 and switch 394.

Next, the test controller supplies power (430) to the standby power supply of the device under test using the external power source to supplement the power of the standby power supply to ensure that the standby power supply can provide sufficient power to the device under test to perform the additional operations required for the test. For purposes of cost, safety and/or technical standards, the backup power supply of the device under test can only provide limited power to support the device under test to complete necessary operations after power down. These necessary operations do not include logging and/or status information after a power loss for testing or development purposes.

In the example of FIG. 3A, the test control engine 340 closes the switch 344 to cause the power supply 350 to provide power to the device under test 310 via the second interface 315; in the example of FIG. 3B, test control engine 390 closes switch 396 and/or switch 398 to allow power supply 380 to provide power to device under test 360 via the second interface and to provide power to device under test 365 via the second interface.

Therefore, after the test host stops supplying power to the tested equipment, the tested equipment obtains extra power, and logs and/or state information can be recorded in the power failure processing process under the condition that a power supply circuit and a power failure processing flow are not changed. The logged log and/or status information may be stored in a storage medium of the device under test or sent to the test control engine (440). Therefore, the test controller can obtain the processing process of the tested equipment after power failure, so as to analyze whether the power failure processing process meets the expectation.

In response to completion of testing the process following the power loss, the test control engine closes a switch coupling the test host and the device under test to restore power to the device under test from the test host (450). And optionally, the test control engine also opens a switch coupling the external power supply to the second interface of the device under test to cut off power from the external power supply to the backup power supply of the device under test.

Still optionally, under the control of the test controller, the processing flow shown in fig. 4 is repeated to perform power-down test on the device under test for multiple times.

FIG. 5 illustrates a block diagram of a test system according to yet another embodiment of the present application.

To improve testing efficiency, it is desirable to perform testing for multiple devices under test. In some cases, each test device needs to use its corresponding debugging device, and a corresponding test controller needs to be provided for each debugging preparation. Thereby increasing the number of test control machines and introducing complexity.

In the embodiment of fig. 5, all devices under test are coupled by a host running multiple virtual machines, reducing the number of hosts required and reducing cost.

Referring to fig. 5, the test system includes a plurality of devices under test (510, 512, 514, and 516), a host computer 520, a power supply 580, switches (550, 552, 554, and 556), and switches (570, 572, 574, and 576). The host computer 520 is coupled to a plurality of devices under test (510, 512, 514, and 516) through an interface hub 524.

Host 520 includes a plurality of virtual machines (522, 540, 542, 544, and 546). The virtual machine 522 is a test host, and each of the plurality of virtual machines (540, 542, 544, and 546) serves as a test controller.

Host 520 also includes a peripheral interface such as a PCIe interface. Host 520 is coupled to interface hub 524 through a PCIe interface. The interface hub 524 couples the devices under test (510, 512, 514, and 516) to the PCIe interface of the host 520.

The test host 522 accesses a plurality of devices under test (510, 512, 514, and 516) through the PCIe interface of the host 520. The host 520 mounts the devices under test (510, 512, 514 and 516) to the virtual machine 522, so that the virtual machine 522 accesses the devices under test (510, 512, 514 and 516) in a device access manner, and the virtual machine 522 applies test cases to the devices under test (510, 512, 514 and 516).

A switch 550 is interposed between the interface hub 524 and the device under test 510 such that the switch 550 electrically connects or disconnects the interface hub 524 to the device under test 510. Similarly, switch 552 electrically connects or disconnects interface hub 524 to the device under test 512, switch 554 electrically connects or disconnects interface hub 524 to the device under test 514, and switch 556 electrically connects or disconnects interface hub 524 to the device under test 516.

Switches (570, 572, 574, and 576) are interposed between the devices under test (510, 512, 514, and 516) and the power supply 580. The switch 570 thereby electrically connects or disconnects the device under test 510. Similarly, switch 572 makes or breaks electrical connection to the device under test 512, switch 574 makes or breaks electrical connection to the device under test 514, and switch 576 makes or breaks electrical connection to the device under test 516. It is to be appreciated that the switches (570, 572, 574, and 576) couple the power supply 580 to the respective second charging interfaces of the corresponding devices under test (510, 512, 514, and 516) to power their backup power supplies.

The devices under test (510, 512, 514, and 516), the switches (550, 552, 554, and 556), and the switches (570, 572, 574, and 576) are each further coupled to a virtual machine (542, 544, 546, and 548) that is a test control machine. The test control machines (548, 542, 544 and 546) control the opening or closing of the switches (550, 552, 554 and 556) and the switches (570, 572, 574 and 576), and also run the debug tool to obtain log and/or status information from the devices under test (510, 512, 514 and 516).

In the example of fig. 5, the virtual machine 542 controls the switch 550 and the switch 570, and couples the device under test 510, so that the virtual machine 542 performs a test on the device under test 510 together with the virtual machine 522, the switch 550, and the switch 570, for example, by the flow illustrated in fig. 4. Similarly, the virtual machine 544, together with the virtual machine 522, the switch 552, and the switch 572, performs a test on the device under test 512; the virtual machine 546, together with the virtual machine 522, the switch 554, and the switch 574, performs a test on the device under test 514; the virtual machine 548, in conjunction with the virtual machine 522, the switch 556, and the switch 576, performs testing on the device under test 516.

The debug tool of the device under test couples the device under test to the test controller by typically using a physical interface such as a serial port, a USB interface, a network interface, etc. Still by way of example, the host 520 includes a plurality of physical interfaces, such as a serial port (UART 0) and 3 USB interfaces (denoted as USB 0, USB 1, and USB 2, respectively). According to an embodiment of the present application, a serial port (UART 0) is bound to the virtual machine 542, and 3 USB interfaces (USB 0, USB 1, and USB 2) are bound to each of the 3 virtual machines (544, 546, and 548), respectively. The test control machine provided by the virtual machines (542, 544, 546, and 548) thus accesses the device under test using only the physical interfaces of the host machine 520 bound to the virtual machine in which it is located.

The virtual machines (542, 544, 546, and 548) each also install other software (e.g., operating systems and/or drivers) on which the debug tool running the corresponding device under test depends. For example, virtual machine 542 runs the Linux operating system, while virtual machines (544, 546, and 548) run the Windows operating system. Therefore, according to the embodiment of the application, a dedicated virtual machine is provided for each debugging tool corresponding to the tested device, and the debugging tool and other software depended on the debugging tool are installed in the virtual machine, so that the deployment of a debugging environment is simplified. In use, according to a debugging tool required by the tested device, starting a virtual machine provided with the debugging tool, and binding a physical interface of a host machine which runs the virtual machine and is coupled with the tested device to the virtual machine so as to provide a debugging environment. Optionally, the virtual machine as the test control machine is also coupled to the virtual machine as the test host through, for example, a network. Further, when the test of some tested device is not needed, the corresponding virtual machine is also closed, so that the resources of the host machine can be used by other virtual machines, and the physical interface of the host machine can be bound to other virtual machines to implement other tests.

While the preferred embodiments of the present application have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all alterations and modifications as fall within the scope of the application. It will be apparent to those skilled in the art that various changes and modifications may be made in the present application without departing from the spirit and scope of the application. Thus, if such modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is intended to include such modifications and variations as well.

Claims (9)

1. The storage device is characterized by comprising a first charging interface and a second charging interface;

the first charging interface is coupled to an interface of the storage device, and the standby power supply is charged through the first charging interface;

the second charging interface is coupled with an external power supply, the external power supply supplies power or charges for the standby power supply through the second charging interface, and the standby power supply supplies power for the storage device.

2. The memory device according to claim 1, wherein the memory device recognizes whether power supply to the memory device is abnormal only through the first charging interface; the backup power supply supplies power to the storage device in response to a power supply abnormality to the storage device.

3. The memory device of claim 1 or 2, wherein the second charging interface is electrically isolated from the first charging interface.

4. A power failure test system for electronic equipment is characterized by comprising a test host, a test controller, a power supply and tested equipment; the device under test is a storage device according to one of claims 1 to 3;

the test host is used for applying a test case to the tested equipment;

the power supply is coupled with the tested equipment through the first switch and used for supplying power to the tested equipment, and the first switch turns on or off the power supply to supply power to the tested equipment;

the test control machine is coupled to the first switch and controls the first switch to be turned on or off.

5. The power down test system for electronic devices of claim 4, wherein the test control engine is coupled to the device under test to obtain log and/or status information from the device under test.

6. The power-down test system for the electronic equipment as claimed in claim 4 or 5, wherein the test host is coupled with the tested equipment through a second switch, and the second switch turns on or off power supply and/or test cases provided by the test host to the tested equipment; the test control machine is coupled to the second switch and controls the on or off of the two switches.

7. The power-down test system for electronic equipment according to claim 4, wherein the test host and the test control machine are virtual machines operating in the first host;

the first host comprises a first interface and a second interface;

the test host is bound with the first interface and is coupled with the tested equipment through the first interface;

the test control machine is bound with the second interface and coupled with the tested equipment through the second interface.

8. The power down test system for electronic devices of claim 7, further comprising a second test control machine;

the second test control machine is a virtual machine running in the first host machine; the first host comprises a third interface;

the second test controller is bound with the third interface and coupled with the tested equipment through the second interface;

the second test control machine does not use the second interface and the test control machine does not use the third interface.

9. A power failure test system for electronic equipment is characterized by comprising a first switch, a second switch, a test controller, a power supply and tested equipment; the device under test is a storage device according to one of claims 1 to 3;

the test control machine is coupled to the first switch and the second switch and controls the connection or disconnection of the first switch and the second switch respectively;

the first switch is used for coupling a power supply to the tested equipment, the power supply is used for supplying power to the tested equipment, and the first switch is used for switching on or off the power supply for supplying power to the tested equipment;

the second switch is used for coupling the tested equipment to the test host; the second switch turns on or off the power supply of the test host to the tested equipment.

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