CN212733114U - Coated silicon wafer sorting system and silicon wafer coating system - Google Patents

Coated silicon wafer sorting system and silicon wafer coating system Download PDF

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Publication number
CN212733114U
CN212733114U CN202020893115.9U CN202020893115U CN212733114U CN 212733114 U CN212733114 U CN 212733114U CN 202020893115 U CN202020893115 U CN 202020893115U CN 212733114 U CN212733114 U CN 212733114U
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silicon wafer
coated silicon
coating
testing
data processing
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CN202020893115.9U
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李荣瑞
刘昌杰
苏晶晶
侯玉
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Canadian Solar Inc
CSI Cells Co Ltd
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CSI Cells Co Ltd
Atlas Sunshine Power Group Co Ltd
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Abstract

The utility model provides a coated silicon wafer selects separately system and silicon chip coating system, coated silicon wafer selects separately system including transport mechanism, the accredited testing organization, sorting mechanism and the data processing and the control mechanism that set gradually along transport mechanism that are used for conveying coated silicon wafer, accredited testing organization is used for testing coated silicon wafer, data processing and control mechanism with accredited testing organization and sorting mechanism signal connection, data processing and control mechanism basis accredited testing organization's test result control sorting mechanism is right coated silicon wafer selects separately. By the arrangement, a large number of coated silicon wafers can be tested and sorted on a production line, the testing efficiency is high, and the production efficiency and the quality of the battery piece are further improved.

Description

Coated silicon wafer sorting system and silicon wafer coating system
Technical Field
The utility model relates to a photovoltaic production field especially relates to a coating film silicon chip selects separately system and silicon chip coating film system.
Background
With the increasing pressure of energy crisis and environmental protection, new energy has become a trend of social development, and solar cells have gained more and more acceptance as an important component of new energy.
The manufacturing process of the crystalline silicon solar cell in the prior art comprises the following steps: cleaning and texturing the surface of a silicon wafer, diffusing, cleaning, etching, removing edges, plating a passivation film, plating an antireflection film, performing screen printing, and sintering to form ohmic contact and testing. The manufacturing process is relatively simple, has low cost, and is suitable for industrial and automatic production, thereby being widely applied. The method comprises the following steps of coating a passivation film and a reflection reducing film, wherein the passivation film and the reflection reducing film are key steps in the manufacturing process of the solar cell, the color and the conversion efficiency of the cell are directly influenced by the thickness of the coating film, and the refractive index is also a key index influencing the property of the cell.
The existing film plating modes mainly comprise a tubular film plating mode and a plate film plating mode. After the coating is finished, an operator extracts the silicon wafer according to a certain rule and a certain frequency, then the coating thickness and the refractive index of the silicon wafer are measured, when the measured data is abnormal, the operator can feed back the measured data to a coating engineer, the coating engineer can adjust process parameters according to the measured data to enable the coating to be restored to a normal range, and the generated defective products are reworked by field operators. The disadvantages of the above-mentioned method are: the testing of the coated silicon wafers is performed by random sampling, and each coated silicon wafer cannot be detected, so that if the silicon wafers which are missed to be detected are defective products, the silicon wafers cannot be fed back to a process engineer, the process intervention is performed in time, and more defective products are produced. Further, the defective products that are missed to be inspected flow to the subsequent process, and defective battery pieces are generated. In addition, the method needs an operator to manually measure the film thickness and the refractive index, and also needs to manually select the abnormal sheet, so that the field labor cost is increased. Moreover, because the test instrument is arranged off-line, a large amount of test data can not be collected on site, so that an engineer can not accurately judge the abnormality, and the proportion of processing time to defective products is increased.
Therefore, there is a need to design a sorting system for coated silicon wafers and a silicon wafer coating system to solve the above problems.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide a coating film silicon chip sorting system that can test coating film silicon chip in a large number.
In order to achieve the above purpose, the utility model adopts the following technical scheme: a coated silicon wafer sorting system comprises a conveying mechanism for conveying coated silicon wafers, a testing mechanism, a sorting mechanism and a data processing and controlling mechanism, wherein the testing mechanism, the sorting mechanism and the data processing and controlling mechanism are sequentially arranged along the conveying mechanism, the testing mechanism is used for testing the coated silicon wafers, the data processing and controlling mechanism is in signal connection with the testing mechanism and the sorting mechanism, and the data processing and controlling mechanism controls the sorting mechanism to sort the coated silicon wafers according to a testing result of the testing mechanism.
As the utility model discloses further modified technical scheme, sorting mechanism include the derailment device, with defective products unloading portion and yields unloading portion that the derailment device links to each other, the derailment device with data processing and control mechanism signal connection, data processing and control mechanism basis accredited testing organization's test result control the derailment device will the coating film silicon chip turns to defective products unloading portion or yields unloading portion.
As the utility model discloses further modified technical scheme, transport mechanism includes drive arrangement and conveyer belt, accredited testing organization locates the top of conveyer belt works as the conveyer belt drives the coating film silicon chip process during accredited testing organization, accredited testing organization tests the coating film silicon chip.
As a further improved technical scheme of the utility model, accredited testing organization includes first tester, first tester is used for measuring the coating film thickness of coating film silicon chip.
As a further improved technical scheme of the utility model, accredited testing organization includes the second tester, the second tester is used for measuring the refracting index of coating film silicon chip.
The utility model also aims to provide a silicon chip coating system of adjusting coating film technological parameter by oneself.
In order to achieve the above purpose, the utility model adopts the following technical scheme: the silicon wafer coating sorting system comprises a coating mechanism and any one of the coating silicon wafer sorting systems, wherein the coating mechanism is used for coating a silicon wafer, the data processing and controlling mechanism is in signal connection with the coating mechanism, and the data processing and controlling mechanism adjusts the coating technological parameters of the coating mechanism according to the test result of the testing mechanism.
As a further improved technical scheme of the utility model, during the coating film, the coating film silicon chip bears in the graphite boat, the coating film silicon chip is in positional information in the coating film mechanism is saved in the data processing and control mechanism, the coating film silicon chip sorting system still includes the manipulator, the manipulator will the coating film silicon chip place in order in transport mechanism.
As the utility model discloses further modified technical scheme is when the process the coating film silicon chip of accredited testing organization is when the defective products, data processing and control mechanism basis the positional information adjustment of defective products the technological parameter of this position department in the coating film mechanism, the technological parameter is membrane deposition temperature or membrane deposition speed.
As the utility model discloses further modified technical scheme, the device of shunting will the defective products turn to defective products unloading portion.
As the utility model discloses further modified technical scheme is when passing through accredited testing organization's coating film silicon chip is the yields, the device of shunting will the yields turns to yields unloading portion.
According to the technical scheme, the coated silicon wafer sorting system of the utility model connects the data processing and control system with the testing mechanism and the sorting mechanism, controls the operation of the sorting mechanism according to the testing number of the testing mechanism, so that good products and defective products can be completely separated, the defective products are prevented from flowing into the subsequent process, and the quality of the battery piece is improved; in addition, the coated silicon wafers are conveyed by the conveying belt, so that a large number of coated silicon wafers can be tested on a production line, additional measuring personnel are not required, the labor cost is saved, 100% detection can be guaranteed, and the accuracy is high.
Drawings
FIG. 1 is a schematic view of the silicon wafer coating system of the present invention.
Fig. 2 is a schematic diagram of the simulation image of the coating mechanism of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer, the present invention will be described in detail with reference to the accompanying drawings and specific embodiments.
Please refer to fig. 1, the utility model provides a silicon wafer coating system, which comprises a coating mechanism 1 and a coated silicon wafer sorting system, wherein the coating mechanism 1 is used for coating a film on a silicon wafer to generate a coated silicon wafer, and the coating mechanism 1 comprises a coating host and a precipitation furnace. In the utility model, the silicon chip is loaded on the graphite boat and then is placed in the coating mechanism 1 for coating.
The coated silicon wafer sorting system comprises a manipulator, a conveying mechanism 2 for conveying the coated silicon wafers, testing mechanisms 3 and 4, a sorting mechanism 5 and a data processing and controlling mechanism 6, wherein the testing mechanisms 3 and 4, the sorting mechanism 5 and the data processing and controlling mechanism are sequentially arranged along the conveying mechanism 2. Transport mechanism 2 includes drive arrangement and conveyer belt, and testing mechanism 3, 4 locate the top of conveyer belt, and when the conveyer belt drove the coating film silicon chip through testing mechanism 3, 4, testing mechanism 3, 4 tested each item parameter of coating film silicon chip. The manipulator is used for placing the coated silicon wafers on the graphite boat on the conveying mechanism 2 in sequence. The testing mechanisms 3 and 4 comprise a first tester 3 and a second tester 4, and the first tester 3 is used for measuring the coating thickness of the coated silicon wafer; the second tester 4 is used for measuring the refractive index of the coated silicon wafer.
The data processing and controlling mechanism 6 is respectively in signal connection with the testing mechanisms 3 and 4 and the sorting mechanism 5, and is used for analyzing the testing data of the testing mechanisms 3 and 4 and controlling the sorting mechanism 5 to sort the coated silicon wafers according to the testing data. Specifically, the sorting mechanism 5 includes a shunting device 51, a good product blanking portion 52 and a defective product blanking portion 53 connected to the shunting device 51, the shunting device 51 is in signal connection with the data processing and controlling mechanism 6, and the data processing and controlling mechanism 6 controls the shunting device 51 to divert the coated silicon wafers to the defective product blanking portion 53 or the good product blanking portion 52 according to the test results of the testing mechanisms 3 and 4. Specifically, when the coated silicon wafer passing through the testing mechanisms 3 and 4 is a defective product, the shunting device 51 diverts the defective product to a defective product blanking part; when the coated silicon wafer passing through the testing mechanisms 3 and 4 is good, the transfer device 51 transfers the good to the good blanking portion 52.
In addition, the data processing and control mechanism 6 is also in signal connection with the film coating mechanism 1, and the data processing and control mechanism 6 adjusts the film coating process parameters of the film coating mechanism 1 according to the test results of the test mechanisms 3 and 4. During film coating, the position information of the coated silicon wafer in the coating mechanism 1 is stored in the data processing and control mechanism 6. Because the mechanical arm sequentially grabs the coated silicon wafers and places the coated silicon wafers on the conveying belt, and the positions of the coated silicon wafers on the graphite boat are also fixed. When the coated silicon wafer passes through the testing mechanisms 3 and 4 in sequence, the testing data of each coated silicon wafer can accurately correspond to the position of the coated silicon wafer on the graphite boat, and further can correspond to the position of the coated silicon wafer in the coating mechanism, analysis results are fed back to the coating host through the processing of the data processing and control mechanism 6, and meanwhile, a simulation image is generated, so that the coated silicon wafer can be conveniently checked by an operator.
Referring to fig. 2, which is a schematic view of a simulation image, a region in a deposition furnace is divided into two regions a and B, each region is divided into sub-regions arranged in a matrix, in this embodiment, 8 rows and 20 columns, each sub-region corresponds to a corresponding position in the deposition furnace, wherein the 1 st row corresponds to a furnace mouth direction of the deposition furnace, and the 8 th row corresponds to a furnace tail direction of the deposition furnace. The sub-area 10 is defined as an area A01 1, the sub-area 20 is defined as an area B12, and the rest of the sub-areas are analogized, when the coated silicon wafers passing through the testing mechanisms 3 and 4 are defective products, the data processing and control mechanism 6 adjusts the process parameters at the position in the coating mechanism 1 according to the position information of the defective products, wherein the process parameters are specifically the film deposition temperature or the film deposition speed. And further, the defective products are quickly corresponding to the position in the precipitation furnace through the data processing and controlling machine 6, and the technological parameters of the position are adjusted.
When the silicon wafer coating machine works, after a silicon wafer subjected to film coating is carried by the graphite boat and comes out of the film coating mechanism 1, the mechanical arm takes out the coated silicon wafer and places the coated silicon wafer on the conveying belt. The coated silicon wafer is transmitted to the lower parts of the first tester 3 and the second tester 4 through a conveyor belt, the coating thickness and the refractive index are tested, and the test result is fed back to the data processing and control mechanism 6 to be stored and analyzed; the data processing and control mechanism 6 controls the switch device 51 to sort the coated silicon wafers according to the analysis result, and in addition, the data processing and control mechanism 6 forms the analysis result into a simulation image and displays the simulation image on a coating host machine, and meanwhile, the data processing and control mechanism adjusts the process parameters in the precipitation furnace corresponding to the defective products. Preferably, each sub-area is displayed in different colors according to the test result, so that an operator can quickly detect abnormal conditions and timely process the abnormal conditions.
To sum up, the utility model connects the data processing and control system with the testing mechanism and the sorting mechanism, controls the operation of the sorting mechanism according to the testing number of the testing mechanism, so that the good products and the defective products can be completely separated, prevents the defective products from flowing into the subsequent process, and improves the quality of the battery piece; in addition, the coated silicon wafer is conveyed by the conveying belt, so that a large number of coated silicon wafers can be tested on a production line, additional measurement personnel are not required, the labor cost is saved, 100% detection can be guaranteed, and the accuracy is high; furthermore, the measured data can be automatically analyzed by arranging the data processing and control system, the coating condition in the coating mechanism can be judged, the technological parameters in the coating mechanism can be adjusted according to the position of the defective product, the abnormal condition can be quickly and accurately processed, and more defective products are prevented from being generated.
The above embodiments are only used for illustrating the present invention and not for limiting the technical solutions described in the present invention, and the understanding of the present specification should be based on the technical personnel in the technical field, and although the present specification has described the present invention in detail with reference to the above embodiments, the skilled personnel in the art should understand that the technical personnel in the technical field can still modify or substitute the present invention, and all the technical solutions and modifications thereof that do not depart from the spirit and scope of the present invention should be covered within the scope of the claims of the present invention.

Claims (10)

1. The coated silicon wafer sorting system is characterized in that: the system comprises a conveying mechanism for conveying coated silicon wafers, a testing mechanism, a sorting mechanism and a data processing and controlling mechanism, wherein the testing mechanism, the sorting mechanism and the data processing and controlling mechanism are sequentially arranged along the conveying mechanism, the testing mechanism is used for testing the coated silicon wafers, the data processing and controlling mechanism is in signal connection with the testing mechanism and the sorting mechanism, and the data processing and controlling mechanism controls the sorting mechanism to sort the coated silicon wafers according to a testing result of the testing mechanism.
2. The coated silicon wafer sorting system of claim 1, wherein: the sorting mechanism comprises a shunting device, a defective product discharging part and a non-defective product discharging part which are connected with the shunting device, the shunting device is in signal connection with the data processing and controlling mechanism, and the data processing and controlling mechanism controls the shunting device to divert the coated silicon wafers to the defective product discharging part or the non-defective product discharging part according to a test result of the testing mechanism.
3. The coated silicon wafer sorting system of claim 1, wherein: the conveying mechanism comprises a driving device and a conveying belt, the testing mechanism is arranged above the conveying belt, and when the conveying belt drives the coated silicon wafer to pass through the testing mechanism, the testing mechanism tests the coated silicon wafer.
4. The coated silicon wafer sorting system of claim 1, wherein: the testing mechanism comprises a first tester, and the first tester is used for measuring the coating thickness of the coated silicon wafer.
5. The coated silicon wafer sorting system of claim 1, wherein: the testing mechanism comprises a second tester, and the second tester is used for measuring the refractive index of the coated silicon wafer.
6. A silicon chip coating system is characterized in that: the sorting system comprises a coating mechanism and the coated silicon wafer sorting system according to any one of claims 1 to 5, wherein the coating mechanism is used for coating a silicon wafer, the data processing and control mechanism is in signal connection with the coating mechanism, and the data processing and control mechanism adjusts the coating process parameters of the coating mechanism according to the test result of the test mechanism.
7. The silicon wafer coating system of claim 6, wherein: during film coating, the coated silicon wafers are loaded in the graphite boat, the position information of the coated silicon wafers in the film coating mechanism is stored in the data processing and control mechanism, the coated silicon wafer sorting system further comprises a manipulator, and the manipulator places the coated silicon wafers in the conveying mechanism in sequence.
8. The silicon wafer coating system of claim 7, wherein: and when the coated silicon wafer passing through the testing mechanism is a defective product, the data processing and control mechanism adjusts the process parameter at the position in the coating mechanism according to the position information of the defective product, wherein the process parameter is the film deposition temperature or the film deposition speed.
9. The silicon wafer coating system of claim 8, wherein: and the defective products are turned to a defective product blanking part by a rail turning device of the sorting mechanism.
10. The silicon wafer coating system of claim 6, wherein: and when the coated silicon wafer passing through the testing mechanism is good, the good product is turned to a good product discharging part by the transfer device of the sorting mechanism.
CN202020893115.9U 2020-05-25 2020-05-25 Coated silicon wafer sorting system and silicon wafer coating system Active CN212733114U (en)

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Application Number Priority Date Filing Date Title
CN202020893115.9U CN212733114U (en) 2020-05-25 2020-05-25 Coated silicon wafer sorting system and silicon wafer coating system

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Application Number Priority Date Filing Date Title
CN202020893115.9U CN212733114U (en) 2020-05-25 2020-05-25 Coated silicon wafer sorting system and silicon wafer coating system

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113714150A (en) * 2021-11-02 2021-11-30 晶科能源(海宁)有限公司 Solar cell sorting method and photovoltaic module

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113714150A (en) * 2021-11-02 2021-11-30 晶科能源(海宁)有限公司 Solar cell sorting method and photovoltaic module

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