CN212627727U

CN212627727U - Intelligent power module

Info

Publication number: CN212627727U
Application number: CN202021565002.2U
Authority: CN
Inventors: 冯锴雄; 杨忠添
Original assignee: Guangdong Huixin Semiconductor Co Ltd
Current assignee: Guangdong Huixin Semiconductor Co Ltd
Priority date: 2020-07-31
Filing date: 2020-07-31
Publication date: 2021-02-26
Anticipated expiration: 2030-07-31

Abstract

The application provides an intelligent power module, includes: an HVIC chip, it includes VSS port, high side output port and low side output port, the high side output port only has HO1 port and HO2 port, the low side output port only has LO1 port and LO2 port; the inverter unit is only provided with a first insulated gate bipolar transistor, a second insulated gate bipolar transistor, a third insulated gate bipolar transistor and a fourth insulated gate bipolar transistor; the intelligent power module provided by the application can reduce the area of the occupied chip and improve the space utilization rate by adopting the single HVIC chip to control the single-phase full bridge circuit formed by the two groups of insulated gate bipolar transistors.

Description

Intelligent power module

Technical Field

The application relates to the field of circuits, in particular to an intelligent power module.

Background

An intelligent Power module, i.e., ipm (intelligent Power module), is a Power driving product combining Power electronics and integrated circuit technology. The intelligent power module integrates a power switch device and a high-voltage driving circuit and is internally provided with fault detection circuits such as overvoltage, overcurrent and overheat. The intelligent power module receives a control signal of the MCU to drive a subsequent circuit to work on one hand, and sends a state detection signal of the system back to the MCU on the other hand. Compared with the traditional discrete scheme, the intelligent power module wins a bigger and bigger market with the advantages of high integration degree, high reliability and the like, is particularly suitable for a frequency converter of a driving motor and various inverter power supplies, and is an ideal power electronic device for variable-frequency speed regulation, metallurgical machinery, electric traction, servo drive and variable-frequency household appliances.

At present, aiming at a low-power motor, the IPM circuit topology has no single-phase full-bridge structure, two paths are wasted when one 3-path three-phase full-bridge driving IC is adopted, and although a single-phase full-bridge circuit can be realized when two half-bridge driving ICs are adopted, each half-bridge driving IC needs to be designed with protection circuits such as undervoltage, overcurrent, enabling, error reporting and the like, and the protection circuits repeatedly cause the area waste of modules; in addition, each IC requires a non-functional region such as a scribe line or a seal (i.e., a seal ring), and the larger the number of ICs, the larger the non-functional region is, the more the IC is, the more the area of the IC can be used most effectively.

Therefore, the prior art has defects and needs to be improved urgently.

SUMMERY OF THE UTILITY MODEL

An object of the embodiments of the present application is to provide an intelligent power module, which can increase the effective usable area of a chip.

The embodiment of the application provides an intelligent power module, include:

an HVIC chip including VSS ports, high side output ports and low side output ports, the high side output ports having only HO1 ports and HO2 ports, the low side output ports having only LO1 ports and LO2 ports;

the inverter unit is only provided with a first insulated gate bipolar transistor, a second insulated gate bipolar transistor, a third insulated gate bipolar transistor and a fourth insulated gate bipolar transistor;

the grid electrode of the first insulated gate bipolar transistor is connected with the HO1 port, the drain electrode of the first insulated gate bipolar transistor is connected with a point P, and the source electrode of the first insulated gate bipolar transistor is connected with a point A;

the grid electrode of the second insulated gate bipolar transistor is connected with the LO1 port, the drain electrode of the second insulated gate bipolar transistor is connected with the source electrode of the first insulated gate bipolar transistor, and the source electrode of the second insulated gate bipolar transistor is connected with the VSS port of the HVIC chip;

the grid electrode of the third insulated gate bipolar transistor is connected with the HO2 port, the drain electrode of the third insulated gate bipolar transistor is connected with the drain electrode of the first insulated gate bipolar transistor, and the source electrode of the third insulated gate bipolar transistor is connected with a point B;

and the grid electrode of the fourth insulated gate bipolar transistor is connected with the LO2 port, the drain electrode of the fourth insulated gate bipolar transistor is connected with the source electrode of the third insulated gate bipolar transistor, and the source electrode of the fourth insulated gate bipolar transistor is connected with the source electrode of the second insulated gate bipolar transistor.

Preferably, the intelligent power module according to the embodiment of the present application further includes a first bootstrap capacitor;

the HVIC chip further comprises a VB1 port and a VS1 port; the VB1 port is connected with the VS1 port through the first bootstrap capacitor.

Preferably, the intelligent power module according to the embodiment of the present application further includes a second bootstrap capacitor; the HVIC chip further comprises a VB2 port and a VS2 port;

the VB2 port is connected with the VS2 port through a second bootstrap capacitor.

Preferably, the intelligent power module of the embodiment of the present application further includes a sampling resistor;

the second insulated gate bipolar transistor is connected with the VSS port through the sampling resistor;

and an over-current protection circuit is arranged in the HVIC chip and is used for stopping working when the current collected by the sampling resistor exceeds a set threshold value.

Preferably, in the intelligent power module according to the embodiment of the present application, an over-temperature protection switch is further disposed in the HVIC chip.

Preferably, in the intelligent power module according to the embodiment of the present application, an overvoltage protection switch is further disposed in the HVIC chip.

Preferably, the intelligent power module of the embodiment of the present application further includes a first fast recovery diode;

the positive electrode of the first fast recovery diode is connected with the source electrode of the first insulated gate bipolar transistor, and the negative electrode of the first fast recovery diode is connected with the drain electrode of the first insulated gate bipolar transistor.

Preferably, the intelligent power module of the embodiment of the present application further includes a second fast recovery diode;

and the anode of the second fast recovery diode is connected with the source electrode of the second insulated gate bipolar transistor, and the cathode of the second fast recovery diode is connected with the drain electrode of the second insulated gate bipolar transistor.

Preferably, the intelligent power module of the embodiment of the present application further includes a third fast recovery diode;

and the anode of the third fast recovery diode is connected with the source electrode of the third insulated gate bipolar transistor, and the cathode of the third fast recovery diode is connected with the drain electrode of the third insulated gate bipolar transistor.

Preferably, the intelligent power module of the embodiment of the present application further includes a fourth fast recovery diode;

and the anode of the fourth fast recovery diode is connected with the source electrode of the fourth insulated gate bipolar transistor, and the cathode of the fourth fast recovery diode is connected with the drain electrode of the fourth insulated gate bipolar transistor.

According to the intelligent power module provided by the embodiment of the application, the single-phase full bridge circuit formed by the two groups of insulated gate bipolar transistors is controlled by the single HVIC chip, so that the area occupied by the chip can be reduced, and the space utilization rate is improved.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments of the present application will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and that those skilled in the art can also obtain other related drawings based on the drawings without inventive efforts.

Fig. 1 is a schematic structural diagram of an intelligent power module in an embodiment of the present application.

Fig. 2 is a schematic diagram of an HVIC chip of an intelligent power module in an embodiment of the present application.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application.

In the description of the present application, it should be noted that the terms "inside", "outside", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings or orientations or positional relationships that the products of the application usually place when using, and are only used for convenience in describing the present application and simplifying the description, but do not indicate or imply that the devices or elements that are referred to must have a specific orientation, be constructed in a specific orientation, and operate, and thus, should not be construed as limiting the present application. Furthermore, the terms "first," "second," and the like are used merely to distinguish one description from another, and are not to be construed as indicating or implying relative importance.

It should also be noted that, unless expressly stated or limited otherwise, the terms "disposed" and "connected" are to be construed broadly, e.g., as meaning fixedly connected, detachably connected, or integrally connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present application can be understood in a specific case by those of ordinary skill in the art.

Referring to fig. 1, fig. 1 is a circuit structure diagram of an intelligent power module in some embodiments of the present application, and it should be noted that the outer frame line 88 in fig. 1 is only a packaging schematic line of the intelligent power module in the embodiments of the present application, and does not refer to a connection line of each component or each pin in the intelligent power module in the embodiments of the present application. This intelligent power module includes: an HVIC chip 10 including VSS ports, high side output ports with and only HO1 ports and HO2 ports, and low side output ports with and only LO1 ports and LO2 ports; an inverter unit having and only having a first insulated gate bipolar transistor 20, a second insulated gate bipolar transistor 30, a third insulated gate bipolar transistor 40 and a fourth insulated gate bipolar transistor 50. The first igbt 20 has a gate connected to HO1 port, a drain connected to point P, and a source connected to point a; a second igbt 30 having a gate connected to the LO1 port, a drain connected to the source of the first igbt 20, and a source connected to the VSS port of the HVIC chip 10; a third igbt 40 whose gate is connected to the HO2 port, drain is connected to the drain of the first igbt 20, and source is connected to the point B; the fourth igbt 50 has its gate connected to the LO2 port, its drain connected to the source of the third igbt 40, and its source connected to the source of the second igbt 30. In practical applications, the HO1 port, the HO2 port, the LO1 port, and the LO2 port correspond to the control signal input terminals of the first igbt 20, the second igbt 30, the third igbt 40, and the fourth igbt 50, respectively.

As shown in fig. 1, a point P is a high-voltage input end of the intelligent power module in the embodiment of the present application, a point a is a first output end a of the intelligent power module in the embodiment of the present application, a point B is a second output end B of the intelligent power module in the embodiment of the present application, and a point N is a low-voltage reference end of the intelligent power module in the embodiment of the present application. In practical applications, the first output terminal a and the second output terminal B are interfaces of the motor load, the point P is used for accessing a power supply of the motor load, and the point N is connected to the sources of the second igbt 30 and the fourth igbt 50.

In some embodiments, the HVIC chip 10 further includes a VCC port, a HIN1 port, a HIN2 port, a LIN1 port, and a LIN2 port, which lead out a VCC pin, a HIN1 pin, a HIN2 pin, a LIN1 pin, and a LIN2 pin, respectively, as the entire smart power module. And a VSS pin which is used as the whole intelligent power module is led out from the VSS port. The VCC pin, the VSS pin, the HIN1 pin, the HIN2 pin, the LIN1 pin and the LIN2 pin are all connected with the MCU and used for receiving corresponding control signals given by the MCU. The VCC pin is a power supply signal end of the HVIC chip, and the VSS pin is a common grounding end of the intelligent power module. In practical applications, the voltage between the VCC pin and the VSS pin is generally set to 15V, and of course, the voltage at this point may be set according to practical needs, and is not limited herein.

It should be noted that, referring to fig. 1 and fig. 2, fig. 2 is a schematic diagram of an HVIC chip 10 of an intelligent power module in some embodiments of the present application. The VCC pin of the intelligent power module is connected to a power supply circuit inside the HVIC chip 10 through a VCC port of the HVIC chip 10 to provide a working power supply to the HVIC chip 10. The HIN1 pin of the intelligent power module is connected with a first high-side driving circuit in the HVIC chip 10 through an HIN1 port of the HVIC chip 10, and outputs a control signal through an HO1 port of the HVIC chip 10 so as to determine the on-off of the first insulated gate bipolar transistor 20; a HIN2 pin of the intelligent power module is connected with a second high-side driving circuit in the HVIC chip 10 through an HIN2 port of the HVIC chip 10, and outputs a control signal through an HO2 port of the HVIC chip 10 so as to determine the on-off of the third insulated gate bipolar transistor 40; the LIN1 pin of the intelligent power module is connected with a first low-side drive circuit inside the HVIC chip 10 through the LIN1 port of the HVIC chip 10, and outputs a control signal through the LO1 port of the HVIC chip 10 to determine the on-off of the second igbt 30; the LIN2 pin of the smart power module is connected to the second low-side driver circuit inside the HVIC chip 10 through the LIN2 port of the HVIC chip 10, and outputs a control signal through the LO2 port of the HVIC chip 10 to determine the on/off of the fourth igbt 50. Among them, the HIN1 pin, the HIN2 pin, the LIN1 pin, and the LIN2 pin of the smart power module receive input signals of 0V or 5V. Of course, the input signal with other voltage amplitudes may be received according to actual needs, and the selection is specifically performed according to the actual device connected to the circuit.

It should be further noted that, an under-voltage power protection circuit is further disposed inside the HVIC chip 10, and is connected to the power circuit to protect the smart power module and the device. And the two high-side driving circuits are also connected with a high-side undervoltage protection circuit to protect the intelligent power module and the device.

The second igbt 30 and the first igbt 20 form a full bridge circuit a 1. The third igbt 40 and the fourth igbt 50 form a full bridge circuit a 2. The first insulated gate bipolar transistor 20 and the second insulated gate bipolar transistor 30 in the full bridge circuit A1 can only be conducted by one; the third igbt 40 and the fourth igbt 50 in the full bridge circuit a2 can only be turned on alternatively. Therefore, the first igbt 20 and the fourth igbt 50 form a set of paths, and are driven by the same set of signals, and are turned on/off at the same time; the third igbt 40 and the second igbt 30 form another set of channels, which are driven by the same set of signals and turned on/off at the same time.

It should be noted that, correspondingly, an interlock circuit and a dead-zone circuit are respectively disposed between the first high-side driver circuit and the first low-side driver circuit and between the second high-side driver circuit and the second low-side driver circuit in the HVIC chip 10, so that two igbts in the full-bridge circuit can only be selectively turned on to prevent short circuit.

Further, in some embodiments, the smart power module further includes a first bootstrap capacitor 101 and a second bootstrap capacitor 102. The HVIC chip 10 further includes a VB1 port and a VS1 port, a VB2 port and a VS2 port. The VB1 port is connected with the VS1 port through the first bootstrap capacitor 101. The VB2 port is connected with the VS2 port through the second bootstrap capacitor 102. The port VB1 is the positive end of the power supply of the first bootstrap capacitor 101, and the port VS1 is the negative end of the power supply of the first bootstrap capacitor 101; the VB2 port is the positive power supply terminal of the second bootstrap capacitor 102, and the VS2 port is the negative power supply terminal of the second bootstrap capacitor 102. The first bootstrap capacitor 101 and the second bootstrap capacitor 102 are used for storing energy and supplying power (or boosting voltage) to provide boosting voltage for the power supply of the HVIC chip 10. The intelligent power module further comprises two bootstrap diodes, a VCC port of the HVIC chip 10 is connected with anodes of the two bootstrap diodes through the power supply circuit, cathodes of the two bootstrap diodes are correspondingly connected with the first bootstrap capacitor 101 and the second bootstrap capacitor 102 through a VB1 port and a VB2 port, respectively, and the bootstrap diodes are used for rectification to prevent current from flowing backwards so as to protect the power supply circuit. In current intelligent power module, its setting is mostly a three-way three-phase full-bridge drive IC +6 insulated gate bipolar transistors for the packaging area of module is too big, is difficult to set up this high-power device of bootstrap capacitor inside the module, can only pass through the external corresponding bootstrap capacitor of pin, but external bootstrap capacitor can lead to the ease for use of module poor, and the reliability also worsens.

In some embodiments, the intelligent power module further includes a sampling resistor 55, and the VSS port of the HVIC chip 10 is sequentially connected to the source 30 of the second igbt, the source of the fourth igbt 50, and the low voltage reference terminal N of the intelligent power module through the sampling resistor 55. Further, the HVIC chip 10 is provided with an itrep port, from which an itrep pin is led out as an intelligent power module, and the itrep pin of the intelligent power module is an overcurrent protection terminal. An overcurrent protection circuit is provided in the HVIC chip 10, the overcurrent protection circuit is connected to the ITRIP port and the VSS port, and the sampling resistor 55 is connected to the overcurrent protection circuit through the VSS port. When the sampling resistor 55 detects the voltage at the N point of the low voltage reference terminal of the intelligent power module, the voltage is fed back to the MCU through the ITRIP terminal of the intelligent power module, the MCU converts the voltage into a corresponding current, compares the current with a set current threshold, and inputs a corresponding control signal through the ITRIP terminal if the current exceeds the set threshold, and stops the operation of the HVIC chip 10 by controlling the overcurrent protection circuit, thereby stopping the operation of the intelligent power module and protecting the devices.

Of course, it is understood that in some embodiments, an over-temperature protection switch, an over-voltage protection switch, an enable protection switch, an error reporting circuit, etc. are also disposed within the HVIC chip 10. Aiming at an over-temperature protection switch, an overvoltage protection switch, an enable protection switch and an error reporting circuit, the HVIC chip 10 is correspondingly provided with a VTS port, an OV port, an EN port and an FO port, the VTS port, the OV port, the EN port and the FO port are correspondingly led out of a VTS pin, an OV pin, an EN pin and an FO pin of an intelligent power module, and the VTS pin, the OV pin, the EN pin and the FO pin correspondingly receive or feed back corresponding signals to the MCU. Wherein, the overtemperature protection switch is a positive temperature coefficient temperature protection switch.

Of course, it is understood that in some embodiments, the smart power module further includes a first fast recovery diode 60, a second fast recovery diode 70, a third fast recovery diode 80, and a fourth fast recovery diode 90; the anode of the first fast recovery diode 60 is connected to the source of the first igbt 20, and the cathode of the first fast recovery diode 60 is connected to the drain of the first igbt 20. The anode of the second fast recovery diode 70 is connected to the source of the second igbt 30, and the cathode of the second fast recovery diode 70 is connected to the drain of the second igbt 30. The anode of the third fast recovery diode 80 is connected to the source of the third igbt 40, and the cathode of the third fast recovery diode 80 is connected to the drain of the third igbt 40. The anode of the fourth fast recovery diode 90 is connected to the source of the fourth igbt 50, and the cathode of the fourth fast recovery diode 90 is connected to the drain of the fourth igbt 50.

In practical application, the utility model discloses an intelligence power module's work flow as follows: the module receives level signals sent by the MCU through a HIN1 pin, a HIN2 pin, a LIN1 pin and a LIN2 pin, and controls the on-off of the four insulated gate bipolar transistors through the level signals output by an HO1 port, an H02 port, an LO1 port and an LO2 port of the HVIC chip 10. And one of the first insulated gate bipolar transistor 20 and the fourth insulated gate bipolar transistor 50 which form one group of channels and the third insulated gate bipolar transistor 40 and the second insulated gate bipolar transistor 30 which form the other group of channels is selected to be conducted, so that the variable frequency driving of the low-power motor is realized.

According to the intelligent power module, a single HVIC chip is adopted to control a single-phase full bridge circuit formed by two groups of insulated gate bipolar transistors, and the intelligent power module can be suitable for small-power motor loads with two interfaces; the single HVIC chip is only provided with two high-side driving circuits and two low-side driving circuits, and is suitable for small-power motor loads without waste, the single HVIC chip integrates four driving circuits, and functional circuits such as an enabling circuit, an undervoltage protection circuit, an overcurrent protection circuit, an overvoltage protection circuit, an over-temperature protection circuit, an error reporting circuit and the like, and a bootstrap circuit, and a module is also integrated with an insulated gate bipolar transistor, a fast recovery diode, a bootstrap capacitor and a sampling resistor to form a function to complete an IPM circuit, so that the complete function of a single-phase full-bridge IPM is realized, the area of the chip can be utilized most effectively, the repeated design of protection functions can not be caused, the occupied area proportion of a scribing channel, a SEALRIR and the like is minimized, and the space utilization rate is improved.

The above description is only an example of the present application and is not intended to limit the scope of the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A smart power module, comprising:

2. The smart power module of claim 1 further comprising a first bootstrap capacitor;

3. The smart power module of claim 2 further comprising a second bootstrap capacitor;

the HVIC chip further comprises a VB2 port and a VS2 port; the VB2 port is connected with the VS2 port through a second bootstrap capacitor.

4. The smart power module of claim 1 further comprising a sampling resistor;

5. The smart power module of claim 1, wherein an over-temperature protection switch is further disposed within the HVIC chip.

6. The smart power module of claim 1, wherein an over-voltage protection switch is further disposed within the HVIC chip.

7. The smart power module of claim 1 further comprising a first fast recovery diode;

8. The smart power module of claim 1 further comprising a second fast recovery diode;

9. The smart power module of claim 1 further comprising a third fast recovery diode;

10. The smart power module of claim 1 further comprising a fourth fast recovery diode;