CN212627726U

CN212627726U - Intelligent power module of integrated control chip

Info

Publication number: CN212627726U
Application number: CN202021564984.3U
Authority: CN
Inventors: 冯锴雄; 杨忠添
Original assignee: Guangdong Huixin Semiconductor Co Ltd
Current assignee: Guangdong Huixin Semiconductor Co Ltd
Priority date: 2020-07-31
Filing date: 2020-07-31
Publication date: 2021-02-26
Anticipated expiration: 2030-07-31

Abstract

The application provides an intelligent power module of integrated control chip, includes: the control chip comprises a general I/O interface and a first VSS port; an HVIC chip including a second VSS port, a high side input port, a low side input port, a high side output port and a low side output port; the high-side input port only has a HIN1 port and a HIN2 port, the low-side input port only has a LIN1 port and a LIN2 port, the high-side output port only has a HO1 port and a HO2 port, the low-side output port only has a LO1 port and a LO2 port, the second VSS port is connected with the first VSS port, and the HIN1 port, the HIN2 port, the LIN1 port and the LIN2 port are all connected with the general I/O interface; an inverter unit having only a first three-pole transistor, a second three-pole transistor, a third three-pole transistor and a fourth three-pole transistor.

Description

Intelligent power module of integrated control chip

Technical Field

The application relates to the field of circuits, in particular to an intelligent power module of an integrated control chip.

Background

An intelligent Power module, i.e., ipm (intelligent Power module), is a Power driving product combining Power electronics and integrated circuit technology. The intelligent power module integrates a power switch device and a high-voltage driving circuit and is internally provided with fault detection circuits such as overvoltage, overcurrent and overheat. The intelligent power module receives the control signal of the control chip to drive the subsequent circuit to work on one hand, and sends the state detection signal of the system back to the control chip on the other hand. Compared with the traditional discrete scheme, the intelligent power module wins a bigger and bigger market with the advantages of high integration degree, high reliability and the like, is particularly suitable for a frequency converter of a driving motor and various inverter power supplies, and is an ideal power electronic device for variable-frequency speed regulation, metallurgical machinery, electric traction, servo drive and variable-frequency household appliances.

Aiming at a low-power motor, the current IPM circuit topology has no single-phase full-bridge inverter structure, and further has no IPM integrating the single-phase full-bridge inverter structure and a control chip, when the intelligent power module is controlled by the control chip to drive the motor and other loads, the intelligent power module can be realized only by connecting the discrete control chip, the discrete drive chip and a plurality of triode transistors under a peripheral control circuit, and the realization mode has the problems of complex circuit design and large occupied area of a circuit substrate.

Therefore, the prior art has defects and needs to be improved urgently.

SUMMERY OF THE UTILITY MODEL

An object of the embodiments of the present application is to provide an intelligent power module with an integrated control chip, which can greatly simplify the peripheral circuit design of the module.

The embodiment of the application provides an intelligent power module of integrated control chip, includes:

the control chip comprises a general I/O interface and a first VSS port;

an HVIC chip including a second VSS port, a high side input port, a low side input port, a high side output port and a low side output port; the high-side input port only has a HIN1 port and a HIN2 port, the low-side input port only has a LIN1 port and a LIN2 port, the high-side output port only has a HO1 port and a HO2 port, the low-side output port only has a LO1 port and a LO2 port, the second VSS port is connected with the first VSS port, and the HIN1 port, the HIN2 port, the LIN1 port and the LIN2 port are all connected with the general I/O interface;

an inverter unit having only a first, second, third and fourth triode transistor;

the grid electrode of the first triode transistor is connected with the HO1 port, the drain electrode of the first triode transistor is connected with a point P, and the source electrode of the first triode transistor is connected with a point A;

the second three-pole transistor, the gate of which is connected to the LO1 port, the drain of which is connected to the source of the first three-pole transistor, and the source of which is connected to the second VSS port;

the grid electrode of the third triode transistor is connected with the HO2 port, the drain electrode of the third triode transistor is connected with the drain electrode of the first triode transistor, and the source electrode of the third triode transistor is connected with a point B;

the gate of the fourth three-pole transistor is connected to the LO2 port, the drain of the fourth three-pole transistor is connected to the source of the third three-pole transistor, and the source of the fourth three-pole transistor is connected to the source of the second three-pole transistor.

Preferably, in the intelligent power module integrated with a control chip according to the embodiment of the present application, at least two high-speed operational amplifiers, at least two comparators, at least one a/D converter, at least one D/a converter, a multiplexer, a communication interface module, a core processor, a power module, and a clock module are disposed inside the control chip, the high-speed operational amplifiers, the comparators, the a/D converter, and the D/a converter operational amplifiers are all connected to the core processor through the multiplexer, and the power module is connected to the high-speed operational amplifiers, the comparators, the a/D converter, the D/a converter, the multiplexer, the communication interface module, the core processor, and the clock module, and is configured to supply power to the control chip.

Preferably, in the intelligent power module of the integrated control chip according to the embodiment of the present application, the HVIC chip further includes a Vreg port, and the control chip further includes a VDD port, where the VDD port is connected to the Vreg port.

Preferably, the intelligent power module of the integrated control chip according to the embodiment of the present application further includes a first bootstrap capacitor and a second bootstrap capacitor;

the HVIC chip further comprises a VB1 port and a VS1 port, and the VB1 port is connected with the VS1 port through the first bootstrap capacitor; the HVIC chip further comprises a VB2 port and a VS2 port, and the VB2 port is connected with the VS2 port through a second bootstrap capacitor.

Preferably, the intelligent power module of the integrated control chip in the embodiment of the present application further includes a sampling resistor;

a first end of the sampling resistor is connected with a source electrode of the second triode transistor, and a second end of the sampling resistor is connected with the second VSS port;

and an over-current protection circuit is arranged in the HVIC chip and is used for stopping working when the current collected by the sampling resistor exceeds a set threshold value.

Preferably, the intelligent power module of the integrated control chip according to the embodiment of the present application further includes a first voltage-dividing resistor and a second voltage-dividing resistor connected in series;

the HVIC chip further comprises an ITRIP port, the first voltage-dividing resistor is connected with the source electrode of the second triode transistor, the intermediate connection point of the first voltage-dividing resistor and the second voltage-dividing resistor is connected with the ITRIP port, and the second voltage-dividing resistor is respectively connected with the first VSS port and the second VSS port;

the ITRIP port is pulled down to the second VSS port through a filter capacitor inside the HVIC chip.

Preferably, in the smart power module with an integrated control chip according to an embodiment of the present application, the first, second, third and fourth three-pole transistors are one of IGBT transistors, reverse conducting IGBT transistors or MOSFET transistors.

Preferably, in the intelligent power module with an integrated control chip according to the embodiment of the present application, the first, second, third and fourth three-pole transistors are all IGBT transistors;

each IGBT transistor is connected with a fast recovery diode, the anode of each fast recovery diode is connected with the source electrode of the IGBT transistor, and the cathode of each fast recovery diode is connected with the drain electrode of the IGBT transistor.

Preferably, in the intelligent power module of the integrated control chip according to the embodiment of the present application, a gate of each triode transistor is connected to a gate driving resistor, and the gate driving resistor is disposed inside the HVIC chip.

Preferably, in the intelligent power module of the integrated control chip according to the embodiment of the present application, an overvoltage protection switch, an over-temperature protection switch, an error reporting circuit, and an enabling circuit are further disposed in the HVIC chip.

This application embodiment adopts single HVIC chip to control the single-phase full-bridge circuit that two sets of triode transistors formed to the integration has control chip, only needs external bus energy storage capacitor, power supply circuit etc. just can automatic output load motor drive required PWM waveform after burning the record to control chip procedure, carries out power amplification through HVIC chip and triode transistor, realizes functions such as motor drive, contravariant, need not peripheral connection control chip, and circuit design is simple, convenient to use.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments of the present application will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and that those skilled in the art can also obtain other related drawings based on the drawings without inventive efforts.

Fig. 1 is a schematic structural diagram of an intelligent power module integrated with a control chip in an embodiment of the present application.

Fig. 2 is a schematic diagram of an HVIC chip of an intelligent power module integrated with a control chip according to an embodiment of the present application.

Fig. 3 is a schematic diagram of a control chip of an intelligent power module integrated with the control chip in an embodiment of the present application.

Fig. 4A is a schematic side view of an intelligent power module with an integrated control chip in embodiment 1 of the present application.

Fig. 4B is a schematic side view of an intelligent power module with an integrated control chip in embodiment 2 of the present application.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application.

In the description of the present application, it should be noted that the terms "inside", "outside", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings or orientations or positional relationships that the products of the application usually place when using, and are only used for convenience in describing the present application and simplifying the description, but do not indicate or imply that the devices or elements that are referred to must have a specific orientation, be constructed in a specific orientation, and operate, and thus, should not be construed as limiting the present application. Furthermore, the terms "first," "second," and the like are used merely to distinguish one description from another, and are not to be construed as indicating or implying relative importance.

It should also be noted that, unless expressly stated or limited otherwise, the terms "disposed" and "connected" are to be construed broadly, e.g., as meaning fixedly connected, detachably connected, or integrally connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present application can be understood in a specific case by those of ordinary skill in the art.

Referring to fig. 1, fig. 1 is a circuit structure diagram of an intelligent power module with an integrated control chip in some embodiments of the present application, and it should be noted that an outer frame line 88 in fig. 1 is only a packaging schematic line of the intelligent power module in the embodiments of the present application, and does not refer to a connection line of each component or each pin in the intelligent power module in the embodiments of the present application. This intelligent power module of integrated control chip includes: a control chip 11, which includes a general purpose I/O interface and a first VSS port; a HVIC chip 10 including a second VSS port, a high-side input port with and only a HIN1 port and a HIN2 port, a low-side input port with and only a LIN1 port and a LIN2 port, a high-side output port with and only a HO1 port and a HO2 port, a high-side output port with and only a LO1 port and a LO2 port, and a low-side output port; the second VSS port is connected to the first VSS port, and the HIN1 port, the HIN2 port, the LIN1 port, and the LIN2 port are all connected to a general I/O interface, the general I/O interface is at least one group and is 16 bits, the control chip 11 outputs PWM waves (Pulse Width Modulation, PWM for short) through the HIN1 port, the HIN2 port, the LIN1 port, and the LIN2 port of the HVIC chip 10, so as to control the HVIC chip 10; an inverter unit having and only having a first three-pole transistor 20, a second three-pole transistor 30, a third three-pole transistor 40 and a fourth three-pole transistor 50; a first triode transistor 20 having a gate connected to the port HO1, a drain connected to the point P, and a source connected to the point a; a second triode transistor 30 having a gate connected to the LO1 port, a drain connected to the source of the first triode transistor 20, and a source connected to the second VSS port; a third triode transistor 40 having a gate connected to the port HO2, a drain connected to the drain of the first triode transistor 20, and a source connected to the point B; the fourth three-pole transistor 50 has a gate connected to the LO2 port, a drain connected to the source of the third three-pole transistor 40, and a source connected to the source of the second three-pole transistor 30.

It should be noted that, as shown in fig. 1, point P is a high-voltage input end of the intelligent power module of the integrated control chip in the embodiment of the present application, point a is a first output end a of the intelligent power module of the integrated control chip in the embodiment of the present application, point B is a second output end B of the intelligent power module of the integrated control chip in the embodiment of the present application, and point N is a low-voltage reference end of the intelligent power module of the integrated control chip in the embodiment of the present application. In practical applications, the first output terminal a and the second output terminal B are interfaces of the motor load, the point P is used for accessing a power supply of the motor load, and the point N is connected to the sources of the second three-pole transistor 30 and the fourth three-pole transistor 50.

In some embodiments, as shown in fig. 3, in the intelligent power module integrated with a control chip according to an embodiment of the present disclosure, the control chip 11 is an MCU chip, and at least two high-speed operational amplifiers (OPAs), at least two Comparators (CMPs), at least one a/D converter (ADC), at least one D/a converter (DAC), a Multiplexer (MUX), a communication interface module, a core processor, a power supply module, and a clock module are disposed inside the MCU chip. The high-speed operational amplifier, the comparator, the A/D converter and the D/A converter operational amplifier are all connected with the core processor through the multiplexer, and the power supply module is connected with the high-speed operational amplifier, the comparator, the A/D converter, the D/A converter, the multiplexer, the communication interface module, the core processor and the clock module and used for supplying power to the MCU chip.

It should be noted that the high-speed operational amplifier is used for amplifying a signal received or transmitted by the MCU chip through mathematical operation; the comparator is used for comparing the detection signal received by the MCU chip with a corresponding reference signal, and the MCU chip gives a corresponding control signal according to the comparison result; the A/D converter and the D/A converter are both 12 bits and are used for converting digital-analog or analog-digital signals; the communication interface module comprises UART \ I2C \ SPI and other communication modules; the core processor comprises a CPU, a DSP, an ASIC, an SYS and other units, wherein the SYS comprises at least 32KB Flash and at least 8KB SRAM, a watchdog, an interrupt, a register and the like; the power supply circuit comprises an LDO (low dropout regulator) and a detection protection circuit, and supplies power to the internal circuit; the clock module includes a built-in RC oscillation clock circuit, an external crystal oscillation clock circuit, and a PLL (Phase Locked Loop or Phase Locked Loop) for uniformly integrating clock signals to enable the high-frequency device to normally operate, such as data access of the memory.

The MCU chip further includes a plurality of I/O pins (generally 4-8) for host computer communication and program simulation programming, and crystal oscillator pins led OUT from the clock module, i.e., an OSC _ IN pin and an OSC _ OUT pin IN fig. 1. In addition, the HVIC chip 10 further includes a Vreg port, and the MCU chip further includes a VDD port, and the VDD port is connected to the Vreg port. Wherein, the Vreg port is a reference voltage port of the HVIC chip 10 and provides 5V voltage for the MCU chip. Therefore, in the intelligent power module of the integrated control chip in the embodiment of the application, the MCU chip only needs to lead out 4-8I/O pins and two crystal oscillator pins for upper computer communication and program simulation programming, and the control chip with peripheral access has at least 8-44 pins.

In some embodiments, as shown in fig. 2, fig. 2 is a schematic diagram of an HVIC chip 10 of an intelligent power module in some embodiments of the present application. The HVIC chip 10 also includes a VCC port that leads out a VCC pin as the entire intelligent power module. And the second VSS port is also led out to be used as a VSS pin of the whole intelligent power module. The VCC port is a positive end of a power supply of the HVIC chip 10 and is connected with an external power supply through a VCC pin; the second VSS port is the negative terminal of the power supply of the HVIC chip 10, and the VSS pin is the common ground terminal of the intelligent power module. In practical applications, the voltage between the VCC port and the second VSS port is generally set to 15V, and of course, the voltage at this point may be set according to practical needs, and herein, there is no limitation.

It should be noted that the VCC pin of the intelligent power module is connected to the power circuit inside the HVIC chip 10 through the VCC port of the HVIC chip 10, so as to provide the working power supply for the HVIC chip 10. The HIN1 port of the HVIC chip 10 is connected to a first high side driving circuit inside the HVIC chip 10, and outputs a control signal through the HO1 port of the HVIC chip 10 to determine the on/off of the first triode transistor 20; the HIN2 port of the HVIC chip 10 is connected to a second high side driving circuit inside the HVIC chip 10, and outputs a control signal through the HO2 port of the HVIC chip 10 to determine the on/off of the third triode transistor 40; the LIN1 port of the HVIC chip 10 is connected to a first low-side driver circuit inside the HVIC chip 10, and outputs a control signal through the LO1 port of the HVIC chip 10 to determine the on/off of the second triode transistor 30; the LIN2 port of the HVIC chip 10 is connected to the second low side driver circuit inside the HVIC chip 10, and outputs a control signal through the LO2 port of the HVIC chip 10 to determine the on/off of the fourth triode transistor 50. Among them, the HIN1 port, the HIN2 port, the LIN1 port, and the LIN2 port of the HVIC chip 10 of the intelligent power module of the embodiment of the present application receive control signals of the MCU chip 0V or 5V. Of course, the input signal with other voltage amplitudes may be received according to actual needs, and the selection is specifically performed according to the actual device connected to the circuit.

It should be further noted that, an under-voltage power protection circuit is further disposed inside the HVIC chip 10, and is connected to the power circuit to protect the smart power module and the device. And the two high-side driving circuits are also connected with a high-side undervoltage protection circuit to protect the intelligent power module and the device.

The second triode transistor 30 and the first triode transistor 20 form a full bridge circuit a 1. The third triode transistor 40 and the fourth triode transistor 50 form a full bridge circuit a 2. The first triode transistor 20 and the second triode transistor 30 in the full-bridge circuit a1 can only be turned on alternatively; the third triode transistor 40 and the fourth triode transistor 50 in the full bridge circuit a2 can only be turned on at one time. Thus, the first and fourth triode transistors 20 and 50 constitute a set of paths, driven by the same set of signals, turned on/off at the same time; the third triode transistor 40 and the second triode transistor 30 constitute another set of channels, driven by the same set of signals, turned on/off at the same time.

In practical application, the MCU chip controls the on/off of the four triodes through the PWM waves transmitted from the HIN1 port, the HIN2 port, the LIN1 port, and the LIN2 port, and through the level signals output from the HO1 port, the H02 port, the LO1 port, and the LO2 port of the HVIC chip 10. One of the first three-pole transistor 20 and the fourth three-pole transistor 50 forming one set of paths and the third three-pole transistor 40 and the second three-pole transistor 30 forming the other set of paths is turned on to realize the variable frequency driving of the motor.

It should be noted that, correspondingly, interlock and dead-zone circuits are respectively disposed between the first high-side driver circuit and the first low-side driver circuit and between the second high-side driver circuit and the second low-side driver circuit in the HVIC chip 10, so that only one of the two three-pole transistors in the full-bridge circuit can be turned on to prevent short circuit.

Further, in some embodiments, the smart power module further includes a first bootstrap capacitor 101 and a second bootstrap capacitor 102. The HVIC chip 10 further includes a VB1 port and a VS1 port, a VB2 port and a VS2 port. The VB1 port is connected with the VS1 port through the first bootstrap capacitor 101. The VB2 port is connected with the VS2 port through the second bootstrap capacitor 102. The port VB1 is the positive end of the power supply of the first bootstrap capacitor 101, and the port VS1 is the negative end of the power supply of the first bootstrap capacitor 101; the VB2 port is the positive power supply terminal of the second bootstrap capacitor 102, and the VS2 port is the negative power supply terminal of the second bootstrap capacitor 102. The first bootstrap capacitor 101 and the second bootstrap capacitor 102 are used for storing energy and supplying power (or boosting voltage) to provide boosting voltage for the power supply of the HVIC chip 10. The intelligent power module further comprises two bootstrap diodes, a VCC port of the HVIC chip 10 is connected with anodes of the two bootstrap diodes through the power supply circuit, cathodes of the two bootstrap diodes are correspondingly connected with the first bootstrap capacitor 101 and the second bootstrap capacitor 102 through a VB1 port and a VB2 port, respectively, and the bootstrap diodes are used for rectification to prevent current from flowing backwards so as to protect the power supply circuit. In current intelligent power module, it sets up mostly a three routes three-phase full-bridge drive IC +6 tripolar transistors for the encapsulated area of module is too big, is difficult to set up this high-power device of bootstrap capacitor inside the module, can only be at external corresponding bootstrap capacitor, but external bootstrap capacitor can lead to the ease for use of module poor, and the reliability also worsens.

In some embodiments, the intelligent power module further includes a sampling resistor 55, and the second VSS port is connected to the source 30 of the second three-pole transistor, the source of the fourth three-pole transistor 50, and the low voltage reference terminal N of the intelligent power module through the sampling resistor 55. Further, the HVIC chip 10 is provided with an ITRIP port, which is an overcurrent protection port of the HVIC chip 10. An overcurrent protection circuit is arranged in the HVIC chip 10, the overcurrent protection circuit is connected with an ITRIP port, and the ITRIP port is pulled down to the second VSS port through a filter capacitor in the HVIC chip 10.

Further, the smart power module of the integrated control chip according to the embodiment of the present application further includes a first voltage-dividing resistor 57 and a second voltage-dividing resistor 56 connected in series. The first divider resistor 57 is connected to the source of the second triode transistor, the intermediate connection point between the first divider resistor 57 and the second divider resistor 56 is connected to the ITRIP port, and the second divider resistor 56 is connected to the first VSS port and the second VSS port, respectively. The second voltage divider resistor 56 is also connected to a high-speed operational amplifier inside the MCU chip, which is also connected to the source 30 of the second three-pole transistor and the source of the fourth three-pole transistor 50. When the sampling resistor 55 detects the voltage at the N point of the low voltage reference end of the intelligent power module, the voltage is fed back to the MCU chip through the intelligent power module, and the signal is amplified by the high-speed operational amplifier, the MCU converts the voltage into a corresponding current according to the voltage, compares the current with a set current threshold, and inputs a corresponding control signal through the itrp end if the current exceeds the set threshold, and stops the operation of the HVIC chip 10 by controlling the overcurrent protection circuit, and then stops the operation of the intelligent power module, thereby protecting the device.

Of course, it is understood that in some embodiments, an over-temperature protection switch, an over-voltage protection switch, an enable protection switch, an error reporting circuit, etc. are also disposed within the HVIC chip 10. Aiming at an over-temperature protection switch, an overvoltage protection switch, an enable protection switch and an error reporting circuit, the HVIC chip 10 is correspondingly provided with a VTS port, an OV port, an EN port and an FO port, the VTS port, the EN port and the FO port are also connected with the MCU chip through a universal I/O interface and correspondingly receive or feed back corresponding signals to the MCU chip, the OV port is connected with a high-voltage input end P point, whether the voltage of the high-voltage input end P point exceeds a set threshold value or not is detected, and devices are included. Wherein, the overtemperature protection switch is a positive temperature coefficient temperature protection switch. In addition, the FO port of the HVIC chip 10 is internally pulled up to the VCC port through a resistor.

In some embodiments, the first, second, third and fourth three-pole transistors 20, 30, 40 and 50 of the smart power module of the integrated control chip of the embodiment of the present application are one of IGBT transistors, reverse conducting IGBT transistors or MOSFET transistors.

As shown in fig. 4A, fig. 4A is a schematic side view of an intelligent power module with an integrated control chip in embodiment 1 of the present application. In the embodiment shown in fig. 4A, the first, second, third, and fourth three-pole transistors 20, 30, 40, and 50 are all reverse conducting IGBT transistors or MOSFET transistors, and no parallel fast recovery diodes are required. In the embodiment of fig. 4A, the HVIC chip 10 is bonded to the insulating substrate 15 using ag paste or solder, the reverse conducting IGBT transistor or MOSFET transistor 13 is bonded to the insulating substrate 15 using solder, and the control chip 11 is bonded to the insulating substrate 15 using ag paste or solder; the HVIC chip 10 is connected to the insulating substrate circuit by gold, copper, aluminum and other bonding wires 14, and the IGBT transistor or MOSFET transistor 13 is connected to the insulating substrate circuit or the HVIC chip 10 by aluminum bonding wires; the lead frame 16 is bonded to the insulating substrate 15 with solder; and finally, encapsulating the substrate, all chips and bonding wires by using an epoxy plastic package material 17, and only exposing the pins.

As shown in fig. 4B, fig. 4B is a schematic side view of an intelligent power module with an integrated control chip in embodiment 2 of the present application. In the embodiment shown in fig. 4B, the first three-pole transistor 20, the second three-pole transistor 30, the third three-pole transistor 40, and the fourth three-pole transistor 50 are all IGBT transistors. Each IGBT transistor 13 is connected with a fast recovery diode 18, the anode of the fast recovery diode 18 is connected with the source of the IGBT transistor 13, and the cathode of the fast recovery diode 18 is connected with the drain of the IGBT transistor 13.

Further, in the embodiment shown in fig. 4A and 4B, the gate of each triode transistor is connected to a gate driving resistor, which is disposed inside the HVIC chip 10 and is used to prevent the driving current from being excessively large instantaneously to generate oscillation.

The intelligent power abrasive material of this application embodiment adopts insulating substrate to MCU, HVIC, IGBT, chips such as FRD and lead frame assemble, form complete SIPM circuit through bonding wire connection, through epoxy plastic packaging material encapsulation together, form the physical protection, constitute and have single-phase full-bridge SIPM module of complete system function, single SIPM only needs external generating line energy storage capacitor, power supply circuit etc., MCU chip procedure burns writes the back, can the automatic output motor drive needs the PWM waveform, carry out power amplification through HVIC chip and IGBT chip, just can realize motor drive, functions such as contravariant, simplify circuit design, high durability and convenient use.

The above description is only an example of the present application and is not intended to limit the scope of the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. An intelligent power module of an integrated control chip, comprising:

the control chip comprises a general I/O interface and a first VSS port;

2. The intelligent power module of integrated control chip of claim 1, wherein at least two high speed operational amplifiers, at least two comparators, at least one a/D converter, at least one D/a converter, a multiplexer, a communication interface module, a core processor, a power module and a clock module are disposed inside the control chip, the high speed operational amplifiers, the comparators, the a/D converter and the D/a converter operational amplifiers are all connected with the core processor through the multiplexer, and the power module is connected with the high speed operational amplifiers, the comparators, the a/D converter, the D/a converter, the multiplexer, the communication interface module, the core processor and the clock module for supplying power to the control chip.

3. The intelligent power module of integrated control chip of claim 1, wherein the HVIC chip further comprises a Vreg port, the control chip further comprises a VDD port, and the VDD port is connected to the Vreg port.

4. The smart power module of integrated control chip of claim 1, further comprising a first bootstrap capacitor and a second bootstrap capacitor;

5. The smart power module of claim 1 further comprising a sampling resistor;

6. The smart power module of claim 1 further comprising a first voltage divider resistor and a second voltage divider resistor connected in series;

7. The smart power module of an integrated control chip of claim 1, wherein the first, second, third and fourth three-pole transistors are one of IGBT transistors, reverse conducting IGBT transistors or MOSFET transistors.

8. The smart power module of an integrated control chip of claim 1, wherein the first, second, third and fourth tri-polar transistors are all IGBT transistors;

9. The smart power module of claim 1, wherein the gate of each triode transistor is connected to a gate driving resistor, and the gate driving resistor is disposed inside the HVIC chip.

10. The intelligent power module of the integrated control chip according to claim 1, wherein an over-voltage protection switch, an over-temperature protection switch, an error reporting circuit and an enabling circuit are further disposed in the HVIC chip.