CN212623798U

CN212623798U - Circuit capable of adjusting negative voltage by using digital potential

Info

Publication number: CN212623798U
Application number: CN202022132238.3U
Authority: CN
Inventors: 罗俊英
Original assignee: Individual
Current assignee: Individual
Priority date: 2020-09-25
Filing date: 2020-09-25
Publication date: 2021-02-26
Anticipated expiration: 2030-09-25

Abstract

The utility model discloses a circuit capable of adjusting negative voltage by digital potential, which comprises a voltage adjusting circuit, an application circuit and an application voltage stabilizing circuit; the voltage regulating circuit comprises a resistor R, a transistor Q, a resistor VR and a digital potentiometer, wherein the resistor VR comprises a movable arm VR ▁ W, a fixed arm Vr ▁ A and a fixed arm Vr ▁ B, the B pole of the transistor Q is connected with one end of the movable arm VR ▁ W, and the other end of the movable arm VR ▁ W is movably connected with the resistor VR; the position of a movable arm VR ▁ W is adjusted through a digital potentiometer, in the adjusting process, the E-B potential difference is low, a transistor Q has no bias current, no current exists between C and E, R has no voltage drop, an Out output end is close to-V, Vr _ W goes downwards, the potential between E and B increases along with the increase of the potential between C and E, the voltage drop on a resistor R also increases along with the increase of the current between C and E, and the negative voltage decreases along with the decrease of the voltage, so that the potential at the Out end changes along with the digital potentiometer to play a role in adjusting the negative voltage, and the circuit is suitable for being applied to high voltage and is more suitable for being used for a negative high-.

Description

Circuit capable of adjusting negative voltage by using digital potential

Technical Field

The utility model relates to a voltage regulating circuit technical field specifically is a circuit of available digital potential adjustment negative voltage.

Background

The digital potentiometer (also called digital control programmable resistor) is a new type CMOS digital and analog mixed signal processing integrated circuit which can be substituted for traditional mechanical potentiometer (analog potentiometer). The digital potentiometer is controlled by a digital input and generates an analog output. The tap current maximum can range from a few hundred microamperes to a few milliamperes depending on the digital potentiometer. The digital potentiometer adopts a numerical control mode to adjust the resistance value, has the obvious advantages of flexible use, high adjustment precision, no contact, low noise, difficult contamination, vibration resistance, interference resistance, small volume, long service life and the like, and can replace mechanical potentiometers in many fields.

The digital potentiometer has a wide application range, which is easily controlled by a single chip via a control line and an internal program, but the general digital potentiometer is not suitable for being applied to a high voltage and is not suitable for a negative high voltage circuit, so a circuit capable of adjusting a negative voltage by using the digital potentiometer is provided.

SUMMERY OF THE UTILITY MODEL

An object of the utility model is to provide a circuit of available digital potential adjustment negative voltage to solve the problem that proposes among the above-mentioned background art.

In order to achieve the above object, the utility model provides a following technical scheme: a circuit capable of adjusting negative voltage by using digital potential comprises a voltage adjusting circuit, an application circuit and an application voltage stabilizing circuit, wherein one end of the voltage adjusting circuit is connected with the application circuit, the other end of the voltage adjusting circuit is grounded, one end of the application voltage stabilizing circuit is connected with the application circuit, and the other end of the application voltage stabilizing circuit is grounded;

the voltage regulating circuit comprises a resistor R, a transistor Q, a resistor VR and a digital potentiometer, wherein the resistor VR comprises a movable arm VR ▁ W, a fixed arm Vr ▁ A and a fixed arm Vr ▁ B, the B pole of the transistor Q is connected with one end of the movable arm VR ▁ W, the other end of the movable arm VR ▁ W is movably connected with the resistor VR, one end of the resistor VR is connected with the E pole of the transistor, the other end of the resistor VR is grounded, and the resistor VR is located in the digital potentiometer.

Preferably: and the C electrode of the transistor Q is connected with one end and the output end of the resistor R in parallel, and the other end of the resistor R is connected with the negative electrode.

Preferably: the digital potentiometer comprises a resistor R34, a transistor Q8, a capacitor C3, a resistor R54, a chip U4 and a resistor R27, wherein the C pole of the transistor Q8 is connected with one end of the resistor R34, the other end of the resistor R34 is connected with the negative pole, the E pole of the transistor Q8 is connected with the capacitor C3 and the chip U4 through the resistor R54, the other end of the capacitor C3 is grounded, and the pin P3W of the chip U4 is connected with the B pole of the transistor Q8.

Preferably: the VDD pin and the A1 pin of the chip U4 are respectively connected with two ends of a resistor R27.

Preferably: the application circuit comprises a PLC, and an RD4 pin of the PLC is connected with an application voltage stabilizing circuit.

Preferably: the application voltage stabilizing circuit comprises an adjusting end ADJ, a capacitor C5, a capacitor C31, a capacitor C32, a capacitor C33 and a capacitor C34, wherein the capacitor C5, the capacitor C31, the capacitor C32, the capacitor C33 and the capacitor C34 are connected in parallel, the capacitor C34, the capacitor C33 and the capacitor C35 are connected with the adjusting end ADJ in parallel, and the other end of the capacitor C34, the capacitor C33 and the capacitor C35 are grounded.

Compared with the prior art, the beneficial effects of the utility model are that: the position of a movable arm VR ▁ W is adjusted through a digital potentiometer, in the adjusting process, the E-B potential difference is low, a transistor Q has no bias current, no current exists between C and E, R has no voltage drop, an Out output end is close to-V, Vr _ W goes downwards, the potential between E and B increases along with the increase of the potential between C and E, the voltage drop on a resistor R also increases along with the increase of the current between C and E, and the negative voltage decreases along with the decrease of the voltage, so that the potential at the Out end changes along with the digital potentiometer to play a role in adjusting the negative voltage, and the circuit is suitable for being applied to high voltage and is more suitable for being used for a negative high-.

Drawings

FIG. 1 is a voltage regulation circuit diagram of the present invention;

fig. 2 is a circuit diagram of a digital potentiometer according to the present invention;

FIG. 3 is a circuit diagram of the present invention;

fig. 4 is a diagram of the voltage stabilizing circuit of the present invention.

Detailed Description

The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.

Examples

Referring to fig. 1-4, the present invention provides a technical solution: a circuit capable of adjusting negative voltage by using digital potential comprises a voltage adjusting circuit, an application circuit and an application voltage stabilizing circuit, wherein one end of the voltage adjusting circuit is connected with the application circuit, the other end of the voltage adjusting circuit is grounded, one end of the application voltage stabilizing circuit is connected with the application circuit, and the other end of the application voltage stabilizing circuit is grounded;

In this embodiment, specifically: the C electrode of the transistor Q is connected with one end and the output end of the resistor R in parallel, and the other end of the resistor R is connected with the negative electrode.

In this embodiment, specifically: the digital potentiometer comprises a resistor R34, a transistor Q8, a capacitor C3, a resistor R54, a chip U4 and a resistor R27, wherein the C pole of the transistor Q8 is connected with one end of the resistor R34, the other end of the resistor R34 is connected with the negative pole, the E pole of the transistor Q8 is connected with the capacitor C3 and the chip U4 through the resistor R54, the other end of the capacitor C3 is grounded, and the pin P3W of the chip U4 is connected with the B pole of the transistor Q8; the transistor Q8 takes the B-terminal current IB as an input to control the operation state of the whole transistor Q8, if the transistor Q8 is in the off-region, IB is close to 0(VBE is also close to 0), the C-terminal and E-terminal are in an approximately off-state, IC is 0, and VCE is VCC. If the transistor Q8 is in the linear region, the B-E junction is forward biased and the B-C junction is reverse biased.

In this embodiment, specifically: the VDD pin and a1 pin of the chip U4 are connected to both ends of the resistor R27, respectively.

In this embodiment, specifically: the application circuit comprises a PLC, an RD4 pin of the PLC is connected with an application voltage stabilizing circuit, and the application voltage stabilizing circuit is used for stabilizing the voltage of the application circuit.

In this embodiment, specifically: the application voltage stabilizing circuit comprises an adjusting end ADJ, a capacitor C5, a capacitor C31, a capacitor C32, a capacitor C33 and a capacitor C34, wherein the capacitor C5, the capacitor C31, the capacitor C32, the capacitor C33 and the capacitor C34 are connected in parallel, the capacitor C34, the capacitor C33 and the capacitor C35 are connected with the adjusting end ADJ in parallel, and the other end of the capacitor C35 is grounded; through setting up a plurality of electric capacity, and parallelly connected each other between electric capacity C5, electric capacity C31, electric capacity C32, electric capacity C33 and the electric capacity C34, form and use voltage stabilizing circuit for digital potentiometer is adjusting negative pressure during operation, and voltage is more stable, improves the safety effect.

The working principle or the structural principle is that when the digital potentiometer is used, the position of a movable arm VR ▁ W is adjusted through the digital potentiometer, in the adjusting process, the potential difference of E-B is low, a transistor Q has no bias current, no current exists between C-E, R has no voltage drop, an Out output end is close to-V, Vr _ W goes downwards, the potential between E and B increases along with the increase of the current between C and E, the voltage drop on a resistor R also increases along with the increase of the current between C and E, and the negative voltage decreases along with the decrease of the current, so that the potential of the Out end changes along with the digital potentiometer to play a role of adjusting the negative voltage, the circuit is suitable for being applied to high voltage and more suitable for being applied to a negative high voltage circuit, the circuit is designed to adapt to such applications, meanwhile, the circuit is provided with a plurality of capacitors, and the capacitors C5, the capacitor C31, the capacitor C32, the capacitor C33 and the capacitor C34 are mutually connected in parallel, the voltage is more stable, and the safety effect is improved.

Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.

Claims

1. The utility model provides a circuit of available digital potential adjustment negative voltage, includes voltage regulating circuit, application circuit and application voltage stabilizing circuit, its characterized in that: one end of the voltage regulating circuit is connected with the application circuit, the other end of the voltage regulating circuit is grounded, one end of the application voltage stabilizing circuit is connected with the application circuit, and the other end of the application voltage stabilizing circuit is grounded;

2. The circuit of claim 1, wherein the digital potential adjustable negative voltage circuit comprises: and the C electrode of the transistor Q is connected with one end and the output end of the resistor R in parallel, and the other end of the resistor R is connected with the negative electrode.

3. The circuit of claim 1, wherein the digital potential adjustable negative voltage circuit comprises: the digital potentiometer comprises a resistor R34, a transistor Q8, a capacitor C3, a resistor R54, a chip U4 and a resistor R27, wherein the C pole of the transistor Q8 is connected with one end of the resistor R34, the other end of the resistor R34 is connected with the negative pole, the E pole of the transistor Q8 is connected with the capacitor C3 and the chip U4 through the resistor R54, the other end of the capacitor C3 is grounded, and the pin P3W of the chip U4 is connected with the B pole of the transistor Q8.

4. The circuit of claim 3, wherein the digital potential adjustable negative voltage circuit comprises: the VDD pin and the A1 pin of the chip U4 are respectively connected with two ends of a resistor R27.

5. The circuit of claim 1, wherein the digital potential adjustable negative voltage circuit comprises: the application circuit comprises a PLC, and an RD4 pin of the PLC is connected with an application voltage stabilizing circuit.

6. The circuit of claim 1, wherein the digital potential adjustable negative voltage circuit comprises: the application voltage stabilizing circuit comprises an adjusting end ADJ, a capacitor C5, a capacitor C31, a capacitor C32, a capacitor C33 and a capacitor C34, wherein the capacitor C5, the capacitor C31, the capacitor C32, the capacitor C33 and the capacitor C34 are connected in parallel, the capacitor C34, the capacitor C33 and the capacitor C35 are connected with the adjusting end ADJ in parallel, and the other end of the capacitor C34, the capacitor C33 and the capacitor C35 are grounded.